b2a5c3fa75
Minor updates:
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* Set slew rate to slow
* SDRAM state engine: Don't wait for data strobes on reads
2022-06-20 15:03:32 +00:00
0a770dc2d6
Drive RAM and Autoconfig cycles with Z3 State machine
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Previously ram_cycle would latch at FCSn asserted and not be cleared until another FCSn assertion happened
This caused issues because FCS_n_sync would lead ram_cycle_sync by 1 clock and this caused false memory cycles to start because ram_cycle_sync would still be true when it shouldn't be.
2022-06-13 15:27:55 +00:00
1fc7c53392
Update Schematic
2022-06-11 08:16:44 +02:00
849941a405
Fixup Autoconfig dtack
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Don't assert DTACK until data time during Autoconfig cycles.
Asserting on Autoconf address decode was too fast for 68040
2022-06-07 18:52:41 +00:00
2c0ebbb932
Qualify BUFOE_n by FCS_n
2022-06-07 18:19:03 +00:00
6b74cff974
Add Z3 state machine to autoconfig component
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Previously it just kept writing the base address which caused issues with an A3640/68040 because it would get trashed at the end of the cycle
2022-06-07 18:17:16 +00:00
d1cbe28505
Remove burst stuff
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Burst feature not working properly and probably not worth the pain
2022-06-07 17:59:50 +00:00
Matt Harlum
83ea78b380
Merge pull request #1 from LIV2/update-readme
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Add License + Documentation
2022-05-13 23:28:18 +02:00
ae81ba2786
Add License + Documentation
2022-05-13 21:26:49 +00:00
6ca15ca666
Make state machine transitions explicit
2022-04-26 10:09:04 +00:00
4419b895f3
Add RAM datasheet & Zorro III Docs
2022-04-24 19:55:11 +02:00
c34c9c7f13
Fixup clock enable
2022-04-23 17:36:13 +00:00
bfd8223689
Tidy up code and add more comments
2022-04-23 15:12:29 +00:00
bc86047ed7
Initial Commit
2022-04-22 18:12:23 +00:00
