LIV2/OpenAmiga500FastRamExpansion
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39 Commits 3 Branches 1 Tag
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39 Commits

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Author SHA1 Message Date
SukkoPera
0ad4c397b7 Fix BSDL stuff 2019-08-22 23:55:57 +02:00
Giorgioggì
978d465b46
Update README.md 2019-08-21 14:24:43 +02:00
Giorgioggì
67c8794109
Update README.md 2019-08-21 10:37:18 +02:00
Giorgioggì
04c5c9ef3a
Update README.md 2019-08-21 10:33:19 +02:00
Giorgioggì
ccbf71ab0f
Add notes about -10JU44 CPLD 2019-08-19 18:09:18 +02:00
Giorgioggì
4edd6bb0b6
Fix typo 2019-08-19 18:02:54 +02:00
Giorgioggì
e8150c0773
Add contributor names to compatibility list 2019-07-22 10:02:40 +02:00
Giorgioggì
9f69c895e5
Update compatibility list 2019-07-22 09:56:32 +02:00
Giorgioggì
404c7d0fd2
Fix link to A500 Chip RAM Expansion 2019-05-21 12:20:50 +02:00
SukkoPera
704bfd48d3 Add doc image v1 2019-05-19 16:10:09 +02:00
SukkoPera
22d15365e3 Add yes/no images 2019-05-19 16:05:17 +02:00
SukkoPera
585e20c06a Revert "Add Yes/No images" 
This reverts commit b87a44d5065ce376d625c41538a7d2bb2d8aebaa.
 2019-05-19 16:04:35 +02:00
SukkoPera
b87a44d506 Add Yes/No images 2019-05-19 15:50:23 +02:00
SukkoPera
f0e21d9de1 Update README.md 2019-05-19 15:49:30 +02:00
SukkoPera
79be49beab Fix #1 and we're ready for V1 2019-05-19 15:38:53 +02:00
SukkoPera
d39c9740f0 Update to KiCad 5.1.2 2019-05-19 15:24:05 +02:00
SukkoPera
b7c7e2cd9d Update README.md 2019-05-19 15:14:14 +02:00
SukkoPera
467d8befbb Update README.md 2019-05-19 15:11:42 +02:00
SukkoPera
cf7b1bb43f Merge branch 'master' of https://github.com/SukkoPera/OpenAmiga500FastRamExpansion 2019-05-19 13:51:36 +02:00
SukkoPera
eab3dc9978 Add CPLD firmware 2019-05-19 13:51:16 +02:00
Giorgioggì
e07e86ca50
Update README.md 2019-03-04 12:06:15 +01:00
SukkoPera
1c7bed805a Remove old pin names 2019-03-04 00:47:09 +01:00
SukkoPera
cd87a8acee Just can't get enough of vias 2019-03-03 11:45:12 +01:00
SukkoPera
d48b327154 Add renders 2019-03-03 11:44:41 +01:00
SukkoPera
664253ad75 Add missing footprint 2019-03-03 11:33:34 +01:00
SukkoPera
74cfa8f891 Ready for prototypes 2019-03-03 11:32:47 +01:00
SukkoPera
30ad40eb80 Add JTAG connector pinout 2019-03-03 01:34:28 +01:00
SukkoPera
ab3d25345b More and more and more and more and more refinements... 2019-03-03 01:25:33 +01:00
SukkoPera
ddf203ce1c Stitched perimeter and more refinements 2019-03-03 00:56:19 +01:00
SukkoPera
dc8568836f Refinements here and there 2019-03-02 16:47:27 +01:00
SukkoPera
c9f53a0d83 Routing complete 
Ground stitching and some refinements TBD
 2019-03-02 12:36:28 +01:00
SukkoPera
d1745fc761 Almost there... 2019-03-02 01:15:34 +01:00
Giorgioggì
e92d533717
Update README.md 2019-03-01 10:19:54 +01:00
Giorgioggì
6e7d86c0b5
Update README.md 2019-03-01 10:16:14 +01:00
Giorgioggì
938dd2a5b9
Update README.md 2019-03-01 10:14:36 +01:00
Giorgioggì
f581a5bd9e
Update README.md 2019-03-01 10:12:15 +01:00
SukkoPera
fb1739712a Completed routing of data bus from CPU to RAM 2019-03-01 01:03:40 +01:00
SukkoPera
d7899fc917 Initial commit, schematic should be OK, PCB routing started 2019-03-01 00:45:08 +01:00
SukkoPera
0c194f7f6b Add .gitignore 2019-03-01 00:43:38 +01:00