mirror of
https://github.com/LIV2/OpenAmiga500FastRamExpansion.git
synced 2025-12-05 22:52:43 +00:00
Add CPLD firmware
This commit is contained in:
SukkoPera
parent
1c7bed805a
commit
eab3dc9978
3668
firmware/4mb/4mb.svf
Normal file
3668
firmware/4mb/4mb.svf
Normal file
File diff suppressed because it is too large
Load Diff
340
firmware/4mb/atf1502as10jc44.jed
Normal file
340
firmware/4mb/atf1502as10jc44.jed
Normal file
@ -0,0 +1,340 @@
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Version 4.45
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JEDEC file for: ATF1502 PLCC44
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Created on: Fri Jan 25 16:46:47 2008
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*
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QF16808* QP44 * F0*
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NOTE
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0 0 0 0 0 *
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L192
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1111111111111111
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1111111111111111111111111111111111011111
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1111111111111111111111110111111111111111* NOTE PT 3 of MC 1(LAB A) *
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L288
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1111111111111111
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1111111111111111111111111111111111101111
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1111111111111111011111111111111111111111* NOTE PT 2 of MC 1(LAB A) *
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L576
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1111111111111111
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1111111111111111111111111111111111101111
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1111111111111111111111111110111111111111* NOTE PT 2 of MC 2(LAB A) *
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L672
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1111111111111111
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1111111111111111111111111111111111011111
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1111111111111111111111101111111111111111* NOTE PT 3 of MC 2(LAB A) *
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L960
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1111111111111111
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1111111111111111111111111111111111111111
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1110111111111111111111111111111111111111* NOTE PT 5 of MC 3(LAB A) *
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L1056
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1111111111111111
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1111111111111111111111111111111111111111
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1111011101111111111111111111111111111111* NOTE PT 4 of MC 3(LAB A) *
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L1152
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1111111111111111
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1111111111111111111111111111111111111111
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1111011111111111111111110111111111111111* NOTE PT 3 of MC 3(LAB A) *
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L1248
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1111111111111111
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1111111111111111111111111111111111111111
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1111101110111111111111101011111111111111* NOTE PT 2 of MC 3(LAB A) *
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L1344
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111110111111111111111111111111111* NOTE PT 1 of MC 3(LAB A) *
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L1536
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1111111111111111
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1101111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 2 of MC 4(LAB A) *
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L2208
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1111111111111111
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1111111111111111111111111111111111111111
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1101011110111011111111111011111111111111* NOTE PT 2 of MC 5(LAB A) *
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L2496
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1111111111111111
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1111111111111111111111111111111111111111
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1101011110111011111111111011111111111111* NOTE PT 2 of MC 6(LAB A) *
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L2592
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1111111111111111
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1111111111111111111111111111111111111111
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1101101110110111111111011011111111111111* NOTE PT 3 of MC 6(LAB A) *
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L2976
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1111111111111111
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1111111111111111111111111111111111111111
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1101011110111011111111111011111111111111* NOTE PT 4 of MC 7(LAB A) *
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L3072
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1111111111111111
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1111111111111111111111111111111111111111
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1101111110111011111111101011111111111111* NOTE PT 3 of MC 7(LAB A) *
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L3168
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1111111111111111
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1111111111111111111111111111111111111111
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1101101110110111111111011011111111111111* NOTE PT 2 of MC 7(LAB A) *
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L3456
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 2 of MC 8(LAB A) *
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L4032
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 3 of MC 9(LAB A) *
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L4128
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111111111* NOTE PT 2 of MC 9(LAB A) *
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L4416
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1111111111111111
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1111111111111111111111101111111111111111
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1111111111111111111111111111111111111111* NOTE PT 2 of MC 10(LAB A) *
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L4512
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 3 of MC 10(LAB A) *
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L5088
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1111111111111111
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1101111111111111111111111111111111111111
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1111111111111111111101111111111111110111* NOTE PT 2 of MC 11(LAB A) *
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L5376
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111111111* NOTE PT 2 of MC 12(LAB A) *
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L5472
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 3 of MC 12(LAB A) *
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L5568
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1111111111111111
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1111111111110111111101111111111111111111
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0111111111111111111111111111111111111011* NOTE PT 4 of MC 12(LAB A) *
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L6048
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1111111111111111
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1101111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 2 of MC 13(LAB A) *
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L6336
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1111111111111111
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1111011111011110111111111111111111111111
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1111110111011101011111111101111011101111* NOTE PT 2 of MC 14(LAB A) *
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L6816
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1111111111111111
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1111111111111111111111111111111111110111
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1111111111111111111111111111111111111111* NOTE PT 4 of MC 15(LAB A) *
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L7008
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1111111111111111
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1111011111011111111111111111111111111111
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1101010110010101011111111101111011101111* NOTE PT 2 of MC 15(LAB A) *
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L7296
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1111111111111111
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1111111111111001111111111111111111111111
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0111111111111111111111111111111111111011* NOTE PT 2 of MC 16(LAB A) *
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L7392
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111110111* NOTE PT 3 of MC 16(LAB A) *
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L7488
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1111111111111111
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1111111111111101111110111111111111111111
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0111111111111111111111111111111111111011* NOTE PT 4 of MC 16(LAB A) *
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L7776
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1111111111111111
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1110111111111111111111111111111111111111
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1111111111111111111111111111111111111111* NOTE PT 4 of MC 17(LAB B) *
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L7872
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1111111111111111
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1111101111111111111110111111011111111111
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1111111111111111111111111111111011011111* NOTE PT 3 of MC 17(LAB B) *
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L7968
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1111111111111111
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1111101111111111111110111111011111111111
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1111111111111111111111111111110111101111* NOTE PT 2 of MC 17(LAB B) *
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L8256
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1111111111111111
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1111101111111111111111101111111111111111
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1111111111111111111111111111111011011111* NOTE PT 2 of MC 18(LAB B) *
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L8352
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1111111111111111
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0110111111111111111111111111111011111111
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1111111111111111111101111111111111111111* NOTE PT 3 of MC 18(LAB B) *
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L8736
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1111111111111111
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1110111111111111111111111111111111111111
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1111111111111111111111111111111111111111* NOTE PT 4 of MC 19(LAB B) *
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L8832
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1111111111111111
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1111101111111011111111111111011111111111
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1111111111111111111111111111111011011111* NOTE PT 3 of MC 19(LAB B) *
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L8928
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1111111111111111
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1111101111111011111111111111011111111111
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1111111111111111111111111111110111101111* NOTE PT 2 of MC 19(LAB B) *
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L9792
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1111111111111111
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0110111111111111111111111111111011111111
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1111111111111111111110111111111111111111* NOTE PT 3 of MC 21(LAB B) *
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L9888
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1111111111111111
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1111101111111111111111101111111111111111
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1111111111111111111111111111110111101111* NOTE PT 2 of MC 21(LAB B) *
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L10176
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1111111111111111
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0110111111111111111111111111110111111111
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1111111111111111111101111111111111111111* NOTE PT 2 of MC 22(LAB B) *
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L10848
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1111111111111111
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0110111111111111111111111111110111111111
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1111111111111111111110111111111111111111* NOTE PT 2 of MC 23(LAB B) *
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L12096
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1111111111111111
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1111111111111111111111111111111111111111
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1111111111111111111111111111111111111111* NOTE PT 2 of MC 26(LAB B) *
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L12192
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1111111111111111
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1111111111111111111111011111111111111111
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1111111111111111111111111111111111111111* NOTE PT 3 of MC 26(LAB B) *
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NOTE macrocell configurations
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0 0 0 0 *
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L15360 1111111111111111*
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L15376 10111101110110011000011110000110* NOTE S16,S12 of block A *
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L15408 00000000011001000000000000000000* NOTE S14,S11 of block A *
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L15440 1111111111111111*
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L15456 10011001100110011001100110001001* NOTE S9 ,S6 of block A *
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L15488 00000010000000000000010000000110* NOTE S13,S10 of block A *
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L15520 1111111111111111*
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L15536 00000100000000000010011000100110* NOTE S20,S18 of block A *
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L15568 00000000000000000000000000000000* NOTE S8 ,S21 of block A *
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L15600 1111111111111111*
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L15616 11001100110011111111111100111111* NOTE S7 ,S19 of block A *
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L15648 11111100111111000000000000100100* NOTE S22,S5 of block A *
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L15680 1111111111111111*
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L15696 11111111111111111111111111111111* NOTE S23,S4 of block A *
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L15728 11111110111111100110011001110010* NOTE S3 ,S15 of block A *
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L15760 1111111111111111*
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L15776 00000000000000000011111100111111* NOTE S0 ,S1 of block A *
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L15808 11111001100110011001100110011001* NOTE S17 ,S2 of block A *
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L15840 1111111111111111*
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L15856 11111111111110111111111011000100* NOTE S16,S12 of block B *
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L15888 01100100011001000000000000000000* NOTE S14,S11 of block B *
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L15920 1111111111111111*
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L15936 10011001100110011001100110011001* NOTE S9 ,S6 of block B *
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L15968 00000001000000011000100110011001* NOTE S13,S10 of block B *
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L16000 1111111111111111*
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L16016 00000000000000000010011000100110* NOTE S20,S18 of block B *
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L16048 00000011000000111100111111111111* NOTE S8 ,S21 of block B *
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L16080 1111111111111111*
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L16096 11111111111100111111111111111111* NOTE S7 ,S19 of block B *
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L16128 11111110111111100101011001100110* NOTE S22,S5 of block B *
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L16160 1111111111111111*
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L16176 11111111111111111111111111111111* NOTE S23,S4 of block B *
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L16208 11111110111111100110011001100110* NOTE S3 ,S15 of block B *
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L16240 1111111111111111*
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L16256 00000000000011000011111100111111* NOTE S0 ,S1 of block B *
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L16288 11111101111111011011100110011001* NOTE S17 ,S2 of block B *
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NOTE UIM for block A and B*
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NOTE 0 0 0*
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L16320 10111* NOTE Mux-39 of block A*
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L16325 10111* NOTE Mux-39 of block B*
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L16330 11110* NOTE Mux-38 of block A*
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L16335 11111* NOTE Mux-38 of block B*
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L16340 01111* NOTE Mux-37 of block A*
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L16345 01111* NOTE Mux-37 of block B*
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||||
L16350 11111* NOTE Mux-36 of block A*
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L16355 11111* NOTE Mux-36 of block B*
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L16360 01111* NOTE Mux-35 of block A*
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||||
L16365 01111* NOTE Mux-35 of block B*
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L16370 11111* NOTE Mux-34 of block A*
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L16375 11111* NOTE Mux-34 of block B*
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L16380 01111* NOTE Mux-33 of block A*
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L16385 11111* NOTE Mux-33 of block B*
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L16390 11101* NOTE Mux-32 of block A*
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L16395 11111* NOTE Mux-32 of block B*
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L16400 11011* NOTE Mux-31 of block A*
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L16405 11111* NOTE Mux-31 of block B*
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L16410 10111* NOTE Mux-30 of block A*
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L16415 10111* NOTE Mux-30 of block B*
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L16420 10111* NOTE Mux-29 of block A*
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L16425 10111* NOTE Mux-29 of block B*
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||||
L16430 01111* NOTE Mux-28 of block A*
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L16435 11111* NOTE Mux-28 of block B*
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L16440 01111* NOTE Mux-27 of block A*
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L16445 11111* NOTE Mux-27 of block B*
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L16450 11011* NOTE Mux-26 of block A*
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L16455 11111* NOTE Mux-26 of block B*
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L16460 01111* NOTE Mux-25 of block A*
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L16465 11111* NOTE Mux-25 of block B*
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||||
L16470 11011* NOTE Mux-24 of block A*
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L16475 11111* NOTE Mux-24 of block B*
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L16480 01111* NOTE Mux-23 of block A*
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L16485 11111* NOTE Mux-23 of block B*
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L16490 11101* NOTE Mux-22 of block A*
|
||||
L16495 11111* NOTE Mux-22 of block B*
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L16500 11011* NOTE Mux-21 of block A*
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L16505 11111* NOTE Mux-21 of block B*
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||||
L16510 10111* NOTE Mux-20 of block A*
|
||||
L16515 11111* NOTE Mux-20 of block B*
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||||
L16520 10111* NOTE Mux-19 of block A*
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L16525 10111* NOTE Mux-19 of block B*
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||||
L16530 11011* NOTE Mux-18 of block A*
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L16535 11111* NOTE Mux-18 of block B*
|
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L16540 10111* NOTE Mux-17 of block A*
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L16545 11111* NOTE Mux-17 of block B*
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L16550 11111* NOTE Mux-16 of block A*
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L16555 11111* NOTE Mux-16 of block B*
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L16560 11111* NOTE Mux-15 of block A*
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L16565 11011* NOTE Mux-15 of block B*
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L16570 11111* NOTE Mux-14 of block A*
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L16575 11101* NOTE Mux-14 of block B*
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||||
L16580 11111* NOTE Mux-13 of block A*
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L16585 11111* NOTE Mux-13 of block B*
|
||||
L16590 11111* NOTE Mux-12 of block A*
|
||||
L16595 11111* NOTE Mux-12 of block B*
|
||||
L16600 11110* NOTE Mux-11 of block A*
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L16605 11110* NOTE Mux-11 of block B*
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L16610 11110* NOTE Mux-10 of block A*
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L16615 11110* NOTE Mux-10 of block B*
|
||||
L16620 10111* NOTE Mux-9 of block A*
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L16625 10111* NOTE Mux-9 of block B*
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L16630 11111* NOTE Mux-8 of block A*
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L16635 11111* NOTE Mux-8 of block B*
|
||||
L16640 11011* NOTE Mux-7 of block A*
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L16645 11111* NOTE Mux-7 of block B*
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L16650 01111* NOTE Mux-6 of block A*
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||||
L16655 01111* NOTE Mux-6 of block B*
|
||||
L16660 11011* NOTE Mux-5 of block A*
|
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L16665 11111* NOTE Mux-5 of block B*
|
||||
L16670 11111* NOTE Mux-4 of block A*
|
||||
L16675 11111* NOTE Mux-4 of block B*
|
||||
L16680 11111* NOTE Mux-3 of block A*
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||||
L16685 11111* NOTE Mux-3 of block B*
|
||||
L16690 11011* NOTE Mux-2 of block A*
|
||||
L16695 11011* NOTE Mux-2 of block B*
|
||||
L16700 11110* NOTE Mux-1 of block A*
|
||||
L16705 11110* NOTE Mux-1 of block B*
|
||||
L16710 11111* NOTE Mux-0 of block A*
|
||||
L16715 11110* NOTE Mux-0 of block B*
|
||||
|
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NOTE 6 global OE
|
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0 0 0*
|
||||
L16720 11101* NOTE GOE5*
|
||||
L16725 11101* NOTE GOE4*
|
||||
L16730 11110* NOTE GOE3*
|
||||
L16735 11110* NOTE GOE2*
|
||||
L16740 11101* NOTE GOE1*
|
||||
L16745 11110* NOTE GOE0*
|
||||
*
|
||||
|
||||
NOTE device configuration bits*
|
||||
NOTE 0 0 0 0*
|
||||
L16750 01110000010011111011000111111111*
|
||||
|
||||
NOTE Special Purpose Bits (JTAG) *
|
||||
L16782 1111*
|
||||
|
||||
NOTE UES bits*
|
||||
L16786 1111111111111111*
|
||||
|
||||
NOTE Reserved bits *
|
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L16802 000000*
|
||||
|
||||
C9221*
|
||||
0000
|
||||
BIN
firmware/4mb/epm7032slc44-10.pof
Normal file
BIN
firmware/4mb/epm7032slc44-10.pof
Normal file
Binary file not shown.
3668
firmware/8mb/8mb.svf
Normal file
3668
firmware/8mb/8mb.svf
Normal file
File diff suppressed because it is too large
Load Diff
360
firmware/8mb/atf1502as10jc44.jed
Normal file
360
firmware/8mb/atf1502as10jc44.jed
Normal file
@ -0,0 +1,360 @@
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||||
Version 4.45
|
||||
JEDEC file for: ATF1502 PLCC44
|
||||
Created on: Sat Jan 05 22:53:52 2008
|
||||
|
||||
*
|
||||
QF16808* QP44 * F0*
|
||||
NOTE
|
||||
0 0 0 0 0 *
|
||||
L192
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111011111
|
||||
1111111111111111111111110111111111111111* NOTE PT 3 of MC 1(LAB A) *
|
||||
L288
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111101111
|
||||
1111111111111111011111111111111111111111* NOTE PT 2 of MC 1(LAB A) *
|
||||
L576
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111101111
|
||||
1111111111111111111111111110111111111111* NOTE PT 2 of MC 2(LAB A) *
|
||||
L672
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111011111
|
||||
1111111111111111111111101111111111111111* NOTE PT 3 of MC 2(LAB A) *
|
||||
L960
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1110111111111111111111111111111111111111* NOTE PT 5 of MC 3(LAB A) *
|
||||
L1056
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111110111111111111111111111111111* NOTE PT 4 of MC 3(LAB A) *
|
||||
L1152
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111011101111111111111111111111111111111* NOTE PT 3 of MC 3(LAB A) *
|
||||
L1248
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111011111111111111111110111111111111111* NOTE PT 2 of MC 3(LAB A) *
|
||||
L1536
|
||||
1111111111111111
|
||||
1101111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 2 of MC 4(LAB A) *
|
||||
L2112
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101011110111011111111111011111111111111* NOTE PT 3 of MC 5(LAB A) *
|
||||
L2208
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101111110111011111111101011111111111111* NOTE PT 2 of MC 5(LAB A) *
|
||||
L2496
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101111110111011111111101011111111111111* NOTE PT 2 of MC 6(LAB A) *
|
||||
L2592
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101011110111011111111111011111111111111* NOTE PT 3 of MC 6(LAB A) *
|
||||
L2688
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101101110110111111111011011111111111111* NOTE PT 4 of MC 6(LAB A) *
|
||||
L2976
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101101110110111111111011011111111111111* NOTE PT 4 of MC 7(LAB A) *
|
||||
L3072
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101011110111011111111111011111111111111* NOTE PT 3 of MC 7(LAB A) *
|
||||
L3168
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1101111110111011111111101011111111111111* NOTE PT 2 of MC 7(LAB A) *
|
||||
L3456
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 2 of MC 8(LAB A) *
|
||||
L4032
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 3 of MC 9(LAB A) *
|
||||
L4128
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 2 of MC 9(LAB A) *
|
||||
L4416
|
||||
1111111111111111
|
||||
1111111111111111111111101111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 2 of MC 10(LAB A) *
|
||||
L4512
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 3 of MC 10(LAB A) *
|
||||
L5088
|
||||
1111111111111111
|
||||
1101111111111111111111111111111111111111
|
||||
1111111111111111111101111111111111110111* NOTE PT 2 of MC 11(LAB A) *
|
||||
L5376
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 2 of MC 12(LAB A) *
|
||||
L5472
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 3 of MC 12(LAB A) *
|
||||
L5568
|
||||
1111111111111111
|
||||
1111111111110111111101111111111111111111
|
||||
0111111111111111111111111111111111111011* NOTE PT 4 of MC 12(LAB A) *
|
||||
L6048
|
||||
1111111111111111
|
||||
1101111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 2 of MC 13(LAB A) *
|
||||
L6336
|
||||
1111111111111111
|
||||
1111011111011110111111111111111111111111
|
||||
1111110111011101011111111101111011101111* NOTE PT 2 of MC 14(LAB A) *
|
||||
L6816
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111110111
|
||||
1111111111111111111111111111111111111111* NOTE PT 4 of MC 15(LAB A) *
|
||||
L7008
|
||||
1111111111111111
|
||||
1111011111011111111111111111111111111111
|
||||
1101010110010101011111111101111011101111* NOTE PT 2 of MC 15(LAB A) *
|
||||
L7296
|
||||
1111111111111111
|
||||
1111111111111001111111111111111111111111
|
||||
0111111111111111111111111111111111111011* NOTE PT 2 of MC 16(LAB A) *
|
||||
L7392
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111110111* NOTE PT 3 of MC 16(LAB A) *
|
||||
L7488
|
||||
1111111111111111
|
||||
1111111111111101111110111111111111111111
|
||||
0111111111111111111111111111111111111011* NOTE PT 4 of MC 16(LAB A) *
|
||||
L7680
|
||||
1111111111111111
|
||||
1110111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 5 of MC 17(LAB B) *
|
||||
L7776
|
||||
1111111111111111
|
||||
1111101111111111111110111111011111111111
|
||||
1111111111111111111111111111111111101111* NOTE PT 4 of MC 17(LAB B) *
|
||||
L7872
|
||||
1111111111111111
|
||||
1111101111111111111110111111011111111111
|
||||
1111111111111111111111111111111011111111* NOTE PT 3 of MC 17(LAB B) *
|
||||
L7968
|
||||
1111111111111111
|
||||
1111011111111111111110111111011111111111
|
||||
1111111111111111111111111111110111011111* NOTE PT 2 of MC 17(LAB B) *
|
||||
L8256
|
||||
1111111111111111
|
||||
1111011111111111111111101111111111111111
|
||||
1111111111111111111111111111110111011111* NOTE PT 2 of MC 18(LAB B) *
|
||||
L8352
|
||||
1111111111111111
|
||||
0110111111111111111111111111111011111111
|
||||
1111111111111111111101111111111111111111* NOTE PT 3 of MC 18(LAB B) *
|
||||
L8640
|
||||
1111111111111111
|
||||
1110111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 5 of MC 19(LAB B) *
|
||||
L8736
|
||||
1111111111111111
|
||||
1111101111111011111111111111011111111111
|
||||
1111111111111111111111111111111111101111* NOTE PT 4 of MC 19(LAB B) *
|
||||
L8832
|
||||
1111111111111111
|
||||
1111101111111011111111111111011111111111
|
||||
1111111111111111111111111111111011111111* NOTE PT 3 of MC 19(LAB B) *
|
||||
L8928
|
||||
1111111111111111
|
||||
1111011111111011111111111111011111111111
|
||||
1111111111111111111111111111110111011111* NOTE PT 2 of MC 19(LAB B) *
|
||||
L9792
|
||||
1111111111111111
|
||||
0110111111111111111111111111111011111111
|
||||
1111111111111111111110111111111111111111* NOTE PT 3 of MC 21(LAB B) *
|
||||
L9888
|
||||
1111111111111111
|
||||
1111101111111111111111101111111111111111
|
||||
1111111111111111111111111111111011101111* NOTE PT 2 of MC 21(LAB B) *
|
||||
L10176
|
||||
1111111111111111
|
||||
1111101111111111111111101111111111111111
|
||||
1111111111111111111111111111111011011111* NOTE PT 2 of MC 22(LAB B) *
|
||||
L10272
|
||||
1111111111111111
|
||||
0110111111111111111111111111110111111111
|
||||
1111111111111111111101111111111111111111* NOTE PT 3 of MC 22(LAB B) *
|
||||
L10752
|
||||
1111111111111111
|
||||
0110111111111111111111111111110111111111
|
||||
1111111111111111111110111111111111111111* NOTE PT 3 of MC 23(LAB B) *
|
||||
L10848
|
||||
1111111111111111
|
||||
1111101111111111111111101111111111111111
|
||||
1111111111111111111111111111110111101111* NOTE PT 2 of MC 23(LAB B) *
|
||||
L12096
|
||||
1111111111111111
|
||||
1111111111111111111111111111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 2 of MC 26(LAB B) *
|
||||
L12192
|
||||
1111111111111111
|
||||
1111111111111111111111011111111111111111
|
||||
1111111111111111111111111111111111111111* NOTE PT 3 of MC 26(LAB B) *
|
||||
|
||||
NOTE macrocell configurations
|
||||
0 0 0 0 *
|
||||
L15360 1111111111111111*
|
||||
L15376 10111101110110011000001010000110* NOTE S16,S12 of block A *
|
||||
L15408 00000000011001000000000000000000* NOTE S14,S11 of block A *
|
||||
L15440 1111111111111111*
|
||||
L15456 10011001100110011001100110011001* NOTE S9 ,S6 of block A *
|
||||
L15488 00000010000000000000010000000110* NOTE S13,S10 of block A *
|
||||
L15520 1111111111111111*
|
||||
L15536 00000100000000000010011000100110* NOTE S20,S18 of block A *
|
||||
L15568 00000000000000000000000000000000* NOTE S8 ,S21 of block A *
|
||||
L15600 1111111111111111*
|
||||
L15616 11001100110011111111111100111111* NOTE S7 ,S19 of block A *
|
||||
L15648 11111100111111000000000000100100* NOTE S22,S5 of block A *
|
||||
L15680 1111111111111111*
|
||||
L15696 11111111111111111111111111111111* NOTE S23,S4 of block A *
|
||||
L15728 11111110111111100110011001110010* NOTE S3 ,S15 of block A *
|
||||
L15760 1111111111111111*
|
||||
L15776 00000000000000000011111100111111* NOTE S0 ,S1 of block A *
|
||||
L15808 11111001100110011001100110011001* NOTE S17 ,S2 of block A *
|
||||
L15840 1111111111111111*
|
||||
L15856 11111111111110111110011011000100* NOTE S16,S12 of block B *
|
||||
L15888 01100100011001000000000000000000* NOTE S14,S11 of block B *
|
||||
L15920 1111111111111111*
|
||||
L15936 10011001100110011001100110011001* NOTE S9 ,S6 of block B *
|
||||
L15968 00000001000000011000100110011001* NOTE S13,S10 of block B *
|
||||
L16000 1111111111111111*
|
||||
L16016 00000000000000000010011000100110* NOTE S20,S18 of block B *
|
||||
L16048 00000011000000111100111111111111* NOTE S8 ,S21 of block B *
|
||||
L16080 1111111111111111*
|
||||
L16096 11111111111100111111111111111111* NOTE S7 ,S19 of block B *
|
||||
L16128 11111110111111100101011001100110* NOTE S22,S5 of block B *
|
||||
L16160 1111111111111111*
|
||||
L16176 11111111111111111111111111111111* NOTE S23,S4 of block B *
|
||||
L16208 11111110111111100110011001100110* NOTE S3 ,S15 of block B *
|
||||
L16240 1111111111111111*
|
||||
L16256 00000000000011000011111100111111* NOTE S0 ,S1 of block B *
|
||||
L16288 11111101111111011011100110011001* NOTE S17 ,S2 of block B *
|
||||
|
||||
NOTE UIM for block A and B*
|
||||
NOTE 0 0 0*
|
||||
L16320 10111* NOTE Mux-39 of block A*
|
||||
L16325 10111* NOTE Mux-39 of block B*
|
||||
L16330 11110* NOTE Mux-38 of block A*
|
||||
L16335 11111* NOTE Mux-38 of block B*
|
||||
L16340 01111* NOTE Mux-37 of block A*
|
||||
L16345 01111* NOTE Mux-37 of block B*
|
||||
L16350 11111* NOTE Mux-36 of block A*
|
||||
L16355 11111* NOTE Mux-36 of block B*
|
||||
L16360 01111* NOTE Mux-35 of block A*
|
||||
L16365 01111* NOTE Mux-35 of block B*
|
||||
L16370 11111* NOTE Mux-34 of block A*
|
||||
L16375 11111* NOTE Mux-34 of block B*
|
||||
L16380 01111* NOTE Mux-33 of block A*
|
||||
L16385 11111* NOTE Mux-33 of block B*
|
||||
L16390 11101* NOTE Mux-32 of block A*
|
||||
L16395 11111* NOTE Mux-32 of block B*
|
||||
L16400 11011* NOTE Mux-31 of block A*
|
||||
L16405 11111* NOTE Mux-31 of block B*
|
||||
L16410 10111* NOTE Mux-30 of block A*
|
||||
L16415 10111* NOTE Mux-30 of block B*
|
||||
L16420 10111* NOTE Mux-29 of block A*
|
||||
L16425 10111* NOTE Mux-29 of block B*
|
||||
L16430 01111* NOTE Mux-28 of block A*
|
||||
L16435 11111* NOTE Mux-28 of block B*
|
||||
L16440 01111* NOTE Mux-27 of block A*
|
||||
L16445 11111* NOTE Mux-27 of block B*
|
||||
L16450 11011* NOTE Mux-26 of block A*
|
||||
L16455 11111* NOTE Mux-26 of block B*
|
||||
L16460 01111* NOTE Mux-25 of block A*
|
||||
L16465 11111* NOTE Mux-25 of block B*
|
||||
L16470 11011* NOTE Mux-24 of block A*
|
||||
L16475 11111* NOTE Mux-24 of block B*
|
||||
L16480 01111* NOTE Mux-23 of block A*
|
||||
L16485 11111* NOTE Mux-23 of block B*
|
||||
L16490 11101* NOTE Mux-22 of block A*
|
||||
L16495 11111* NOTE Mux-22 of block B*
|
||||
L16500 11011* NOTE Mux-21 of block A*
|
||||
L16505 11111* NOTE Mux-21 of block B*
|
||||
L16510 10111* NOTE Mux-20 of block A*
|
||||
L16515 11111* NOTE Mux-20 of block B*
|
||||
L16520 10111* NOTE Mux-19 of block A*
|
||||
L16525 10111* NOTE Mux-19 of block B*
|
||||
L16530 11011* NOTE Mux-18 of block A*
|
||||
L16535 11111* NOTE Mux-18 of block B*
|
||||
L16540 10111* NOTE Mux-17 of block A*
|
||||
L16545 11111* NOTE Mux-17 of block B*
|
||||
L16550 11111* NOTE Mux-16 of block A*
|
||||
L16555 11111* NOTE Mux-16 of block B*
|
||||
L16560 11111* NOTE Mux-15 of block A*
|
||||
L16565 11011* NOTE Mux-15 of block B*
|
||||
L16570 11111* NOTE Mux-14 of block A*
|
||||
L16575 11101* NOTE Mux-14 of block B*
|
||||
L16580 11111* NOTE Mux-13 of block A*
|
||||
L16585 11111* NOTE Mux-13 of block B*
|
||||
L16590 11111* NOTE Mux-12 of block A*
|
||||
L16595 11111* NOTE Mux-12 of block B*
|
||||
L16600 11110* NOTE Mux-11 of block A*
|
||||
L16605 11110* NOTE Mux-11 of block B*
|
||||
L16610 11110* NOTE Mux-10 of block A*
|
||||
L16615 11110* NOTE Mux-10 of block B*
|
||||
L16620 10111* NOTE Mux-9 of block A*
|
||||
L16625 10111* NOTE Mux-9 of block B*
|
||||
L16630 11111* NOTE Mux-8 of block A*
|
||||
L16635 11111* NOTE Mux-8 of block B*
|
||||
L16640 11011* NOTE Mux-7 of block A*
|
||||
L16645 11111* NOTE Mux-7 of block B*
|
||||
L16650 01111* NOTE Mux-6 of block A*
|
||||
L16655 01111* NOTE Mux-6 of block B*
|
||||
L16660 11011* NOTE Mux-5 of block A*
|
||||
L16665 11111* NOTE Mux-5 of block B*
|
||||
L16670 11111* NOTE Mux-4 of block A*
|
||||
L16675 11111* NOTE Mux-4 of block B*
|
||||
L16680 11111* NOTE Mux-3 of block A*
|
||||
L16685 11111* NOTE Mux-3 of block B*
|
||||
L16690 11011* NOTE Mux-2 of block A*
|
||||
L16695 11011* NOTE Mux-2 of block B*
|
||||
L16700 11110* NOTE Mux-1 of block A*
|
||||
L16705 11110* NOTE Mux-1 of block B*
|
||||
L16710 11111* NOTE Mux-0 of block A*
|
||||
L16715 11110* NOTE Mux-0 of block B*
|
||||
|
||||
NOTE 6 global OE
|
||||
0 0 0*
|
||||
L16720 11101* NOTE GOE5*
|
||||
L16725 11101* NOTE GOE4*
|
||||
L16730 11110* NOTE GOE3*
|
||||
L16735 11110* NOTE GOE2*
|
||||
L16740 11101* NOTE GOE1*
|
||||
L16745 11110* NOTE GOE0*
|
||||
*
|
||||
|
||||
NOTE device configuration bits*
|
||||
NOTE 0 0 0 0*
|
||||
L16750 01110000010011111011000111111111*
|
||||
|
||||
NOTE Special Purpose Bits (JTAG) *
|
||||
L16782 1111*
|
||||
|
||||
NOTE UES bits*
|
||||
L16786 1111111111111111*
|
||||
|
||||
NOTE Reserved bits *
|
||||
L16802 000000*
|
||||
|
||||
CCA0D*
|
||||
0000
|
||||
BIN
firmware/8mb/epm7032slc44-10.pof
Normal file
BIN
firmware/8mb/epm7032slc44-10.pof
Normal file
Binary file not shown.
72
firmware/README.md
Normal file
72
firmware/README.md
Normal file
@ -0,0 +1,72 @@
|
||||
This board uses the same firmware as the original project by lvd. It has been copied here for convenience, but it is unmodified.
|
||||
|
||||
The firmware was originally developed for Altera EPM7032SLC44 CPLDs, these use the .POF file. You can flash it with `quartus_pgm` and one of the cheap USB Blaster programmer clones you can find everywhere.
|
||||
|
||||
Atmel/Microchip makes compatible devices under the ATF1502 series, so the ATF1502AS10JC44 can be used as an alternative, which is easier to find nowadays. It can be programmed with the .JED file using the [ATDH1150USB](https://www.microchip.com/DevelopmentTools/ProductDetails/ATDH1150USB) programmer.
|
||||
|
||||
The bottom line is that you will only find the ATF1502AS10JC44 on the market, but you will need to use a >50€ programmer (only once!) to program it, which doesn't sound reasonable. Besides, all the tools mentioned above are Windows-only, so if you are a Linux user like me, you're pretty screwed. Luckily, there is a solution that allows flashing the Atmel chip with the cheap USB Blaster clones. I have developed and tested it under Linux, but it should also work on Windows and OS X.
|
||||
|
||||
## Flashing the firmware
|
||||
You will need the firmware in SVF format (either `4mb.svf` or `8mb.svf`, choose according to how you assembled your board) and the [U2JTAG software](http://urjtag.sourceforge.net). Connect your USB Blaster to the IDC connector on the board and plug it into an USB port on your PC. Then run urjtag as follows:
|
||||
|
||||
sukko@shockwave firmware $ sudo jtag
|
||||
```
|
||||
UrJTAG 2018.09 #
|
||||
Copyright (C) 2002, 2003 ETC s.r.o.
|
||||
Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors
|
||||
|
||||
UrJTAG is free software, covered by the GNU General Public License, and you are
|
||||
welcome to change it and/or distribute copies of it under certain conditions.
|
||||
There is absolutely no warranty for UrJTAG.
|
||||
|
||||
warning: UrJTAG may damage your hardware!
|
||||
Type "quit" to exit, "help" for help.
|
||||
|
||||
jtag> cable UsbBlaster
|
||||
Connected to libftdi driver.
|
||||
```
|
||||
|
||||
This means that your USB Blaster was detected correctly. Now have it scan the JTAG chain:
|
||||
```
|
||||
jtag> detect
|
||||
IR length: 10
|
||||
Chain length: 1
|
||||
Device Id: 00000001010100000010000000111111 (0x0150203F)
|
||||
Manufacturer: Atmel (0x03F)
|
||||
Part(0): ATF1502ASV (0x1502)
|
||||
Stepping: A
|
||||
Filename: /usr/share/urjtag/atmel/atf15xx/atf1502as
|
||||
```
|
||||
|
||||
This means that the CPLD was found and it is ready to be programmed. If you get no output at this step, try disconnecting and reconnecting the USB Blaster or power to the board. Then start the flashing:
|
||||
```
|
||||
jtag> svf 8mb.svf progress stop
|
||||
warning: unimplemented mode 'ABSENT' for TRST
|
||||
detail: Parsing 3660/3668 ( 99%)detail:
|
||||
detail: Scanned device output matched expected TDO values.
|
||||
```
|
||||
|
||||
If you get the above output, the flashing was successful and you can start using your board. If instead you get something like:
|
||||
```
|
||||
jtag> svf 8mb.svf
|
||||
warning: unimplemented mode 'ABSENT' for TRST
|
||||
Error svf: mismatch at position 64 for TDO
|
||||
in input file between line 2196 col 1 and line 2198 col 32
|
||||
```
|
||||
|
||||
Then there was an error during the flashing, check your wiring, power and try again.
|
||||
|
||||
|
||||
## Tinkering with the firmware
|
||||
The firmware was developed with quartus 7.2, somewhat totally old and outdated, but never got any problems with it. I DO NOT recommend using quartus 6.x as I caught it generating wrong designs (in a way, nothing is working and when you swap to quartus 7.2 not touching you project, everything is working back).
|
||||
|
||||
If you want to move to something newer, it seems that quartus 10.x and 11.x are still supporting EPM7000S chips. Starting from quartus 12.x there's no more support for that devices.
|
||||
|
||||
### POF => JED
|
||||
Quartus will produce a .POF file. This can be converted to a .JED file for Atmel devices through [Microchip's POF2JED utility](https://www.microchip.com/design-centers/programmable-logic/spld-cpld/tools/software/pof2jed).
|
||||
|
||||
### JED => SVF
|
||||
An SVF file can be produced using [Microchip's ATMISP tool](https://www.microchip.com/design-centers/programmable-logic/spld-cpld/tools/software/atmisp), which is Windows-only unfortunately.
|
||||
|
||||
|
||||
*Thanks a lot to lvd for providing most of the above information and helping me come up with the Linux flashing procedure.*
|
||||
270
firmware/source/a600_8mb.v
Normal file
270
firmware/source/a600_8mb.v
Normal file
@ -0,0 +1,270 @@
|
||||
module a600_8mb( cpu_a21,cpu_a22,cpu_a23,
|
||||
cpu_a1, cpu_a2, cpu_a3, cpu_a4, cpu_a5, cpu_a6,
|
||||
cpu_a16,cpu_a17,cpu_a18,cpu_a19,cpu_a20,
|
||||
cpu_d12,cpu_d13,cpu_d14,cpu_d15,
|
||||
cpu_nas,cpu_nlds,cpu_nuds,cpu_clk,
|
||||
cpu_nreset,
|
||||
dram_nras0,dram_nras1,dram_nras2,dram_nras3, dram_nlcas,dram_nucas,
|
||||
dram_ma0,dram_ma1,
|
||||
mux_switch
|
||||
);
|
||||
|
||||
input cpu_a21,cpu_a22,cpu_a23; // cpu high addresses
|
||||
|
||||
input cpu_a1, cpu_a2, cpu_a3, cpu_a4, cpu_a5, cpu_a6; // cpu low addresses for autoconfig
|
||||
input cpu_a16,cpu_a17,cpu_a18,cpu_a19,cpu_a20; // cpu high addresses for autoconfig
|
||||
|
||||
inout cpu_d12,cpu_d13,cpu_d14,cpu_d15; // autoconfig data in-out
|
||||
reg cpu_d12,cpu_d13,cpu_d14,cpu_d15;
|
||||
|
||||
input cpu_nas,cpu_nlds,cpu_nuds; // cpu bus control signals
|
||||
input cpu_clk; // cpu clock
|
||||
|
||||
input cpu_nreset; // cpu system reset
|
||||
|
||||
output dram_nras0,dram_nras1,dram_nras2,dram_nras3;
|
||||
reg dram_nras0,dram_nras1,dram_nras2,dram_nras3; // /RAS dram signals
|
||||
|
||||
output dram_nlcas,dram_nucas;
|
||||
reg dram_nlcas,dram_nucas; // /CAS dram signals
|
||||
|
||||
output dram_ma0,dram_ma1;
|
||||
reg dram_ma0,dram_ma1; // DRAM MAx addresses
|
||||
|
||||
output mux_switch;
|
||||
reg mux_switch; // external MUX switching
|
||||
|
||||
|
||||
reg [3:0] datout; // data out
|
||||
|
||||
wire [7:0] high_addr;
|
||||
wire [5:0] low_addr;
|
||||
|
||||
reg which_ras[0:3]; // which /RAS signal to activate (based on a21-a23)
|
||||
reg mem_selected;
|
||||
|
||||
reg rfsh_ras,rfsh_cas; // refresh /RAS, /CAS generators
|
||||
|
||||
reg access_ras,access_cas; // normal access /RAS, /CAS generators
|
||||
|
||||
reg read_cycle; // if current cycle is read cycle
|
||||
reg write_cycle;
|
||||
reg autoconf_on;
|
||||
reg cpu_nas_z; // cpu /AS with 1 clock latency
|
||||
|
||||
reg [1:0] rfsh_select; // for cycling refresh over every of four chips
|
||||
|
||||
|
||||
assign high_addr = {cpu_a23,cpu_a22,cpu_a21,cpu_a20,cpu_a19,cpu_a18,cpu_a17,cpu_a16};
|
||||
assign low_addr = {cpu_a6,cpu_a5,cpu_a4,cpu_a3,cpu_a2,cpu_a1};
|
||||
|
||||
// chip selector decoder
|
||||
always @*
|
||||
begin
|
||||
casex( high_addr )
|
||||
8'b001xxxxx: // $200000-$3fffff
|
||||
begin
|
||||
{which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b1000; // /RAS0
|
||||
mem_selected <= 1'b1;
|
||||
end
|
||||
|
||||
8'b010xxxxx: // $400000-$5fffff
|
||||
begin
|
||||
{which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0100; // /RAS1
|
||||
mem_selected <= 1'b1;
|
||||
end
|
||||
|
||||
// remove this two CASE sections below for 4Mb only decoding (do not remove "default:"!)
|
||||
8'b011xxxxx: // $600000-$7fffff
|
||||
begin
|
||||
{which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0010; // /RAS2
|
||||
mem_selected <= 1'b1;
|
||||
end
|
||||
|
||||
8'b100xxxxx: // $800000-$9fffff
|
||||
begin
|
||||
{which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0001; // /RAS3
|
||||
mem_selected <= 1'b1;
|
||||
end
|
||||
|
||||
default:
|
||||
begin
|
||||
{which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0000; // nothing
|
||||
mem_selected <= 1'b0;
|
||||
end
|
||||
|
||||
endcase
|
||||
end
|
||||
|
||||
|
||||
// normal cycle generator
|
||||
always @(posedge cpu_clk,posedge cpu_nas)
|
||||
begin
|
||||
if( cpu_nas==1 )
|
||||
begin // /AS=1
|
||||
access_ras <= 0;
|
||||
access_cas <= 0;
|
||||
end
|
||||
else
|
||||
begin // /AS=0, positive clock
|
||||
access_ras <= 1;
|
||||
access_cas <= access_ras; // one clock later
|
||||
end
|
||||
end
|
||||
|
||||
// MUX switcher generator
|
||||
always @(negedge cpu_clk,negedge access_ras)
|
||||
begin
|
||||
if( access_ras==0 )
|
||||
begin // reset on no access_ras
|
||||
mux_switch <= 0;
|
||||
end
|
||||
else
|
||||
begin // set to 1 on negedge after beginning of access_ras
|
||||
mux_switch <= 1;
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
|
||||
|
||||
// refresh cycle generator
|
||||
always @(negedge cpu_clk)
|
||||
begin
|
||||
if( cpu_nas==1 ) // /AS negated
|
||||
begin
|
||||
rfsh_cas <= ~rfsh_cas;
|
||||
end
|
||||
else // /AS asserted
|
||||
begin
|
||||
rfsh_cas <= 0;
|
||||
end
|
||||
|
||||
if( (rfsh_cas == 1'b0) && (cpu_nas==1) )
|
||||
begin
|
||||
rfsh_select <= rfsh_select + 2'b01;
|
||||
end
|
||||
end
|
||||
|
||||
always @*
|
||||
begin
|
||||
rfsh_ras <= rfsh_cas & cpu_clk;
|
||||
end
|
||||
|
||||
|
||||
|
||||
// output signals generator
|
||||
always @*
|
||||
begin
|
||||
dram_nras0 <= ~( ( which_ras[0] & access_ras ) | ((rfsh_select==2'b00)?rfsh_ras:1'b0) );
|
||||
dram_nras1 <= ~( ( which_ras[1] & access_ras ) | ((rfsh_select==2'b01)?rfsh_ras:1'b0) );
|
||||
dram_nras2 <= ~( ( which_ras[2] & access_ras ) | ((rfsh_select==2'b10)?rfsh_ras:1'b0) );
|
||||
dram_nras3 <= ~( ( which_ras[3] & access_ras ) | ((rfsh_select==2'b11)?rfsh_ras:1'b0) );
|
||||
|
||||
dram_nlcas <= ~( ( ~cpu_nlds & access_cas & mem_selected ) | rfsh_cas );
|
||||
dram_nucas <= ~( ( ~cpu_nuds & access_cas & mem_selected ) | rfsh_cas );
|
||||
end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// DRAM MAx multiplexor
|
||||
always @*
|
||||
begin
|
||||
if( mux_switch==0 )
|
||||
{ dram_ma0,dram_ma1 } <= { cpu_a1,cpu_a2 };
|
||||
else // mux_switch==1
|
||||
{ dram_ma0,dram_ma1 } <= { cpu_a20,cpu_a19 };
|
||||
end
|
||||
|
||||
|
||||
// make clocked cpu_nas_z
|
||||
always @(posedge cpu_clk)
|
||||
begin
|
||||
cpu_nas_z <= cpu_nas;
|
||||
end
|
||||
|
||||
// detect if current cycle is read or write cycle
|
||||
always @(posedge cpu_clk, posedge cpu_nas)
|
||||
begin
|
||||
if( cpu_nas==1 ) // async reset on end of /AS strobe
|
||||
begin
|
||||
read_cycle <= 0; // end of cycles
|
||||
write_cycle <= 0;
|
||||
end
|
||||
else // sync beginning of cycle
|
||||
begin
|
||||
if( cpu_nas==0 && cpu_nas_z==1 ) // beginning of /AS strobe
|
||||
begin
|
||||
if( (cpu_nlds&cpu_nuds)==0 )
|
||||
read_cycle <= 1;
|
||||
else
|
||||
write_cycle <= 1;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
// autoconfig data forming
|
||||
always @*
|
||||
begin
|
||||
case( low_addr )
|
||||
6'b000000: // $00
|
||||
datout <= 4'b1110;
|
||||
6'b000001: // $02
|
||||
datout <= 4'b0000; // 0111 for 4mb, 0000 for 8mb
|
||||
|
||||
6'b000010: // $04
|
||||
datout <= 4'hE;
|
||||
6'b000011: // $06
|
||||
datout <= 4'hE;
|
||||
|
||||
6'b000100: // $08
|
||||
datout <= 4'h3;
|
||||
6'b000101: // $0a
|
||||
datout <= 4'hF;
|
||||
|
||||
6'b001000: // $10
|
||||
datout <= 4'hE;
|
||||
6'b001001: // $12
|
||||
datout <= 4'hE;
|
||||
|
||||
6'b001010: // $14
|
||||
datout <= 4'hE;
|
||||
6'b001011: // $16
|
||||
datout <= 4'hE;
|
||||
|
||||
6'b100000: // $40
|
||||
datout <= 4'b0000;
|
||||
6'b100001: // $42
|
||||
datout <= 4'b0000;
|
||||
|
||||
default:
|
||||
datout <= 4'b1111;
|
||||
endcase
|
||||
end
|
||||
|
||||
// out autoconfig data
|
||||
always @*
|
||||
begin
|
||||
if( read_cycle==1 && high_addr==8'hE8 && autoconf_on==1 )
|
||||
{cpu_d15,cpu_d14,cpu_d13,cpu_d12} <= datout;
|
||||
else
|
||||
{cpu_d15,cpu_d14,cpu_d13,cpu_d12} <= 4'bZZZZ;
|
||||
end
|
||||
|
||||
// autoconfig cycle on/off
|
||||
always @(posedge write_cycle,negedge cpu_nreset)
|
||||
begin
|
||||
if( cpu_nreset==0 ) // reset - begin autoconf
|
||||
autoconf_on <= 1;
|
||||
else
|
||||
begin
|
||||
if( high_addr==8'hE8 && low_addr[5:2]==4'b1001 ) // $E80048..$E8004E
|
||||
autoconf_on <= 0;
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
|
||||
endmodule
|
||||
Loading…
x
Reference in New Issue
Block a user