|
|
c13ef80952
|
Add JLC Part numbers for IDE Connectors & TH caps
|
2023-07-13 16:41:54 +02:00 |
|
|
|
abee39926c
|
Change some resistor values from 10K to 1K out of paranoia
|
2023-07-13 15:54:51 +02:00 |
|
|
|
32846236ff
|
Add pull-up for unconnected CS1 pin of IDE channels
|
2023-07-12 20:29:08 +02:00 |
|
|
|
7f1c8157c8
|
Moved CPLD and ROM data behind IDE buffers
* Enable Buffers for IDE, ROM and Autoconfig
* Add SLAVE_n equation
|
2023-07-12 08:36:13 +00:00 |
|
|
|
a61b822c16
|
Add Firmware
|
2023-07-12 08:36:13 +00:00 |
|
|
|
2e87b06f37
|
Move ROM and CPLD data connections to buffered side
|
2023-07-12 10:30:23 +02:00 |
|
|
|
9353015e6d
|
Routing complete, need to double-check
|
2023-07-10 16:23:03 +02:00 |
|
|
|
e92db97d39
|
Rename to RIPPLE, do a bunch more routing etc
|
2023-07-04 13:03:45 +02:00 |
|
|
|
ada1612930
|
A good start
|
2023-06-25 19:59:43 +02:00 |
|
|
|
55a873f313
|
Begin schematic
|
2023-02-11 20:51:31 +01:00 |
|
|
|
12f0d58f16
|
Initial commit.
|
2023-02-09 14:20:20 +01:00 |
|
