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Matt Harlum c8b767916e Fixup address decodes 
*_region was matching when slave_cycle was true but without checking that the base address matched - this would cause these regions to match when other Z3 boards are being accessed
2025-07-13 22:16:12 +12:00
.devcontainer
Add skeleton to include Gerbers, BOM files, RTL etc
2025-04-02 07:58:30 -07:00
.github/workflows
Add skeleton to include Gerbers, BOM files, RTL etc
2025-04-02 07:58:30 -07:00
Binary
Add skeleton to include Gerbers, BOM files, RTL etc
2025-04-02 07:58:30 -07:00
Docs
Update PCB image
2025-06-06 17:46:52 -07:00
GALs
Remove ^Z from GAL source
2025-06-05 15:16:01 -07:00
Gerbers
Add Gerbers
2025-06-06 17:47:53 -07:00
Kicad
Update kibot config
2025-06-14 21:53:25 -07:00
RTL
Fixup address decodes
2025-07-13 22:16:12 +12:00
Software/a4092flash
a4092flash overhaul
2025-07-13 00:18:14 -07:00
.gitignore
Stop tracking A4092.kicad_prl
2025-04-19 22:25:00 -07:00
README.md
Update README
2025-04-14 21:27:13 -07:00

README.md

A4092

A modern successor to the A4091.

  • TSSOP parts for smaller footprint
  • Flash instead of EPROM
  • CPLD instead of GALs
  • Autoconfig moved into CPLD

PCB

Description
No description provided
Readme 27 MiB
Languages
Verilog 50.2%
C 43.9%
Makefile 5.2%
Shell 0.6%
SystemVerilog 0.1%