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Author	SHA1	Message	Date
fautomat	fcead08d54	bump version date	2024-05-08 10:20:23 +02:00
bebbo	e6d2aa64df	refs #229: disable the peepholes on 68000/10 if the offset is > 16 bit	2024-05-08 09:45:54 +02:00
fautomat	fb232ad10f	bump version date	2024-05-08 09:43:49 +02:00
bebbo	0bbaa1802a	refs #228: apply the asm specfor hard regs if template gets ... instantiated	2024-05-08 09:08:07 +02:00
fautomat	b3ae745431	bump version date	2024-05-08 01:23:57 +02:00
bebbo	cc55b3f993	refs #228: store asm spec and mark hard reg before processing the ... template	2024-05-08 00:48:14 +02:00
fautomat	c34091089b	bump version date	2024-05-04 19:10:04 +02:00
bebbo	a0b85242f8	remove that comment character... code was bogus	2024-05-01 19:22:09 +02:00
fautomat	3d387a9374	bump version date	2024-04-20 12:44:08 +02:00
bebbo	030b30cdb8	don't pull jxx before dbxx in nested loops	2024-04-20 12:04:28 +02:00
fautomat	71b8345bf0	bump version date	2024-04-18 22:18:34 +02:00
bebbo	0b183a61db	lower cost for a bit test in a compare	2024-04-18 21:39:35 +02:00
fautomat	bdfbc089f6	bump version date	2024-04-18 16:29:08 +02:00
bebbo	6116f7530e	disabled a cost patch in tree...ivopts	2024-04-18 15:52:19 +02:00
fautomat	5fe44fa8b4	bump version date	2024-04-17 20:03:25 +02:00
bebbo	e462c9671c	disallow base==0	2024-04-17 19:26:11 +02:00
bebbo	640653fb3c	better conversion, works also for char -> short	2024-04-17 17:27:50 +02:00
bebbo	9fb361ef3e	don't patch base/step, take a copy	2024-04-17 12:12:47 +02:00
bebbo	704af0b337	use short int as loop counter if possible	2024-04-16 23:19:34 +02:00
fautomat	c591fe2fac	bump version date	2024-04-13 22:38:47 +02:00
bebbo	8865fbc61d	re-enable OPT_ftree:ch	2024-04-13 22:03:06 +02:00
fautomat	5b88de3f59	bump version date	2024-03-09 21:23:18 +01:00
bebbo	c81c81444f	refs #225: check for self add in peephole2 ... disable conversion of ``` move (ax),rx add reg,rx move reg,(ax)+ -> add reg,(ax)+ ``` if reg == rx	2024-03-09 20:47:14 +01:00
fautomat	45e3e4a4fa	bump version date	2024-02-21 21:13:14 +01:00
bebbo	e1a0431358	support jsr(offset, ax) instruction	2024-02-21 20:37:45 +01:00
bebbo	62e70e6a85	fix type definition/check	2024-02-21 20:37:23 +01:00
fautomat	9d6ef60c0c	bump version date	2024-01-26 22:31:49 +01:00
bebbo	ad2ad987bb	no more extra libs for the 68060	2024-01-26 21:26:54 +01:00
bebbo	6463415b85	cost adjustments für 68020/68030: subreg has same cost as reg	2024-01-26 21:26:24 +01:00
fautomat	85ae088550	bump version date	2024-01-23 19:15:38 +01:00
bebbo	903adf91e9	add EXTRA_OBJECTS	2024-01-23 18:34:38 +01:00
fautomat	35fb0d3b1f	bump version date	2024-01-23 17:46:25 +01:00
bebbo	fce09eb5c9	move -mexperimental to m68k.opts	2024-01-23 17:07:34 +01:00
fautomat	bd8940f89c	bump version date	2024-01-21 17:26:34 +01:00
bebbo	95d33d000c	refs #223: enable combine 2xclr.w on all plattforms	2024-01-21 16:45:30 +01:00
fautomat	395e3ad68c	bump version date	2024-01-20 11:01:15 +01:00
bebbo	c542d0b3ef	refs #224: lower reg cost for 68030	2024-01-20 10:21:03 +01:00
fautomat	9ae3a2f8ce	bump version date	2024-01-19 21:10:35 +01:00
bebbo	f9eaead6b9	refs #223: combine two adjacent clr.w <mem> to clr.l <mem>	2024-01-19 20:29:24 +01:00
fautomat	6ef25cfe47	bump version date	2024-01-19 18:50:29 +01:00
Stefan Bebbo Franke	63b9545623	refs #222:remove Bx/EX stuff	2024-01-19 18:09:25 +01:00
bebbo	ccb41c36e2	refs #222: no offset is combined with offset 4	2024-01-19 17:52:56 +01:00
bebbo	3d70429cae	refs #222: use move2.l r1:r2,(n,ax)	2024-01-19 17:28:29 +01:00
fautomat	550ece865c	bump version date	2024-01-18 16:25:37 +01:00
bebbo	c6e33f10d2	add experimental support for move2.l ... use `-mexperimental` to enable it!	2024-01-18 15:46:14 +01:00
fautomat	8fdf722f2f	Merge branch 'devel1' into amiga6	2024-01-18 14:42:15 +01:00
fautomat	9d6e60e110	bump version date	2024-01-18 13:30:12 +01:00
bebbo	7e776eb4dd	refs #221: rework peephole2 constraints	2024-01-18 12:53:10 +01:00
bebbo	f331592a8f	don't eliminate the address reg, is src is no address reg	2024-01-18 08:22:22 +01:00
bebbo	e1a32dd8a3	peephole2 optimizers to cleanup unrolled loop code with auto increments	2024-01-17 16:07:53 +01:00