Toni Wilen
|
b8cf318caf
|
Added Supra AMAB2 ROM
|
2022-12-07 20:08:27 +02:00 |
|
Toni Wilen
|
3d2891e9b6
|
Store highest RAM address
|
2022-12-04 21:19:13 +02:00 |
|
Toni Wilen
|
fdf3ff0cd3
|
memwatch parameter update
|
2022-12-03 14:18:47 +02:00 |
|
Toni Wilen
|
fa82dbc311
|
GVP A1208 SCSI
|
2022-11-28 19:15:46 +02:00 |
|
Toni Wilen
|
f879b62451
|
Removed unneeded function
|
2022-11-28 19:15:23 +02:00 |
|
Toni Wilen
|
36aafe41d1
|
GVP A1208 SCSI
|
2022-11-28 19:14:32 +02:00 |
|
Toni Wilen
|
5b09f38145
|
RTG to non-lace switch filter change fix + cleanup.
|
2022-11-27 10:45:40 +02:00 |
|
Toni Wilen
|
088a7333da
|
Blitter array size needs to be max possible CCK + 2.
|
2022-11-26 19:54:16 +02:00 |
|
Toni Wilen
|
c681aa8aa4
|
Interlace filter updates
|
2022-11-26 19:49:38 +02:00 |
|
Toni Wilen
|
ecd90f9203
|
Mark copper allocated but unused cycles in DMA debugger
|
2022-11-26 19:43:27 +02:00 |
|
Toni Wilen
|
cd4cf259f1
|
Keep CPU stopped when keyboard reset is active.
|
2022-11-19 19:46:37 +02:00 |
|
Toni Wilen
|
c2f8bd2841
|
Copper waiting, CPU COPJMPx write and blitter active bug accurate implementation
|
2022-11-19 19:41:49 +02:00 |
|
Toni Wilen
|
8ef25a114a
|
Fixed DMA debugger CPU access data value sometimes being in wrong cycle.
|
2022-11-17 19:59:03 +02:00 |
|
Toni Wilen
|
7f1ef95c4a
|
Accurate CPU odd cycle COPJMPx write copper/blitter bug emulation
|
2022-11-06 18:58:25 +02:00 |
|
Toni Wilen
|
f45cf97dc6
|
Interlace filter config
|
2022-11-06 18:55:13 +02:00 |
|
Toni Wilen
|
03f106b380
|
4990b4
|
2022-10-30 18:33:43 +02:00 |
|
Toni Wilen
|
5715469411
|
68000 IPL fix
|
2022-10-30 17:56:27 +02:00 |
|
Toni Wilen
|
c5a24d7e22
|
f breakpoint hit count support
|
2022-10-30 16:08:08 +02:00 |
|
Toni Wilen
|
f2a9a01946
|
IPL wait state fix
|
2022-10-23 20:42:41 +03:00 |
|
Toni Wilen
|
2d3642dc62
|
Warning fixes.
|
2022-10-23 20:40:04 +03:00 |
|
Toni Wilen
|
b134c34f1a
|
68000 accurate IPL timing emulation
|
2022-10-19 15:24:01 +03:00 |
|
Toni Wilen
|
359f4d0638
|
Manual config file floppybridge setting
|
2022-10-08 15:15:28 +03:00 |
|
Toni Wilen
|
43bf50bef2
|
Separated two types of CPU emulation functions. (Returns value/returns void)
|
2022-10-06 22:07:35 +03:00 |
|
Toni Wilen
|
5fd100f8b2
|
Merge pull request #230 from huth/fixes
Fix typos and compiler warning
|
2022-10-04 19:41:28 +03:00 |
|
Toni Wilen
|
baf5130608
|
4920b1
|
2022-10-01 20:10:01 +03:00 |
|
Toni Wilen
|
97361dd8cf
|
Accurate 68000 IPL emulation updates
|
2022-10-01 19:51:54 +03:00 |
|
Toni Wilen
|
f02ee341b4
|
Genlock and screenshot updates.
|
2022-10-01 19:46:49 +03:00 |
|
Thomas Huth
|
9f9aca070a
|
Fix typos
|
2022-09-25 07:23:01 +02:00 |
|
Toni Wilen
|
1a7afe84e1
|
Genlock emulation fixes and genlock_effects genlock manual feature enable.
|
2022-09-24 20:22:28 +03:00 |
|
Toni Wilen
|
6742dc00bf
|
DMA debugger initial start support
|
2022-09-23 20:33:58 +03:00 |
|
Toni Wilen
|
c7df7a6a6c
|
Added per-membank slow ram setting. Removed "C00000 is Fast" option.
|
2022-09-23 20:32:10 +03:00 |
|
lainon
|
de38447d8a
|
Code lower scope, remove unused vars, optimize reference exception and etc
|
2022-09-21 15:40:07 +03:00 |
|
Toni Wilen
|
181d9265a1
|
Power up chipram and slow ram memory pattern is now configurable. Updated to match different chipsets.
|
2022-09-18 16:50:32 +03:00 |
|
Toni Wilen
|
5721bcfc70
|
Cycle-accurate Paula serial port emulation.
|
2022-09-16 20:50:25 +03:00 |
|
Toni Wilen
|
ffac943c03
|
Fix softlinks not resolving if it was not already cached by filesystem emulation.
|
2022-09-16 20:49:00 +03:00 |
|
Toni Wilen
|
ac26506b6d
|
Warning fixes, preparing for future ARM64 build.
|
2022-08-21 20:06:22 +03:00 |
|
Toni Wilen
|
26ce210812
|
INTENA/INTREQ timing update. IPL state included in DMA debugger.
|
2022-08-18 21:22:39 +03:00 |
|
Toni Wilen
|
5967089c87
|
Optional short absolute disassembly (-$xxxx.w/$FFFFxxx.w)
|
2022-08-18 21:11:21 +03:00 |
|
Toni Wilen
|
3592a948fc
|
Interrupt handling timing update, separate Paula internal INTREQ changes vs INTREQ CPU/Copper writes.
|
2022-08-07 20:50:50 +03:00 |
|
Toni Wilen
|
dbe9057cdf
|
Make sure hardware emulated RTG boards don't have barrier at the start of VRAM space to fully support JIT direct.
|
2022-08-07 20:46:17 +03:00 |
|
Toni Wilen
|
4a88569d80
|
DMA debugger variable number of line lengths and scanlines supported.
|
2022-08-02 12:01:59 +03:00 |
|
Toni Wilen
|
007555b6cb
|
NVRAM path added (Arcade/CD32/CDTV)
|
2022-08-01 20:24:31 +03:00 |
|
Toni Wilen
|
728edc83a5
|
GDI positioning and hw sprite fixed. Integer scaling updates.
|
2022-07-31 21:06:21 +03:00 |
|
Toni Wilen
|
3ea3cf4334
|
Blitter cycle accuracy fix, line mode special case fix.
|
2022-07-24 20:47:44 +03:00 |
|
Toni Wilen
|
d8084fe272
|
Added American Laser Games Quickstart entry.
|
2022-07-23 21:35:48 +03:00 |
|
Toni Wilen
|
d39e28a282
|
Removed obsolete software statusline support.
|
2022-07-23 21:34:32 +03:00 |
|
Toni Wilen
|
f65526dab1
|
STOP timing fix.
|
2022-07-20 20:58:54 +03:00 |
|
Toni Wilen
|
5a304ea81b
|
Group sorted ROM lists.
|
2022-07-16 22:02:19 +03:00 |
|
Toni Wilen
|
d71242aa08
|
Programmed mode positiong update, use hblank for centering.
|
2022-07-16 17:16:21 +03:00 |
|
Toni Wilen
|
39400c5347
|
ALG rev B support, ROMs added, descrambling support.
|
2022-07-16 17:13:10 +03:00 |
|