mirror of
https://github.com/LIV2/WinUAE.git
synced 2025-12-06 00:12:52 +00:00
Warning fixes, preparing for future ARM64 build.
This commit is contained in:
Toni Wilen
parent
13609feaf2
commit
ac26506b6d
10
gencpu.cpp
10
gencpu.cpp
@ -2383,7 +2383,7 @@ static void check_bus_error(const char *name, int offset, int write, int size, c
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out("opcode |= 0x80000;\n");
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} else if (g_instr->mnemo == i_CLR) {
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if (g_instr->smode < Ad16) {
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out("regflags.cznv = oldflags;\n");
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out("regflags.cznv = oldflags.cznv;\n");
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}
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// (an)+ and -(an) is done later
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if (g_instr->smode == Aipi || g_instr->smode == Apdi) {
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@ -3036,7 +3036,7 @@ static void move_68010_address_error(int size, int *setapdi, int *fcmodeflags)
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out("regs.irc = dsta >> 16;\n");
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}
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if (reset_ccr) {
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out("regflags.cznv = oldflags;\n");
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out("regflags.cznv = oldflags.cznv;\n");
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}
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if (set_ccr) {
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out("ccr_68000_word_move_ae_normal((uae_s16)(src));\n");
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@ -5998,7 +5998,8 @@ static void gen_opcode (unsigned int opcode)
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genastore_rev("0", curi->smode, "srcreg", curi->size, "src");
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}
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} else if (cpu_level == 1) {
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out("uae_u16 oldflags = regflags.cznv;\n");
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out("struct flag_struct oldflags;\n");
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out("oldflags.cznv = regflags.cznv;\n");
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genamode(curi, curi->smode, "srcreg", curi->size, "src", 3, 0, GF_CLR68010);
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if (isreg(curi->smode) && curi->size == sz_long) {
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addcycles000(2);
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@ -6461,7 +6462,8 @@ static void gen_opcode (unsigned int opcode)
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if (curi->mnemo == i_MOVE) {
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if (cpu_level == 1 && (isreg(curi->smode) || curi->smode == imm)) {
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out("uae_u16 oldflags = regflags.cznv;\n");
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out("struct flag_struct oldflags;\n");
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out("oldflags.cznv = regflags.cznv;\n");
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}
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if (curi->size == sz_long && (using_prefetch || using_ce) && curi->dmode >= Aind) {
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// to support bus error exception correct flags, flags needs to be set
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@ -40,7 +40,10 @@ using namespace std;
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#define UAE
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#endif
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#if defined(__x86_64__) || defined(_M_AMD64)
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#if defined(__arm__) || defined(_M_ARM) || defined(_M_ARM64) || defined(_M_ARM64EC)
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#define CPU_arm 1
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#define ARM_ASSEMBLY 1
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#elif defined(__x86_64__) || defined(_M_AMD64)
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#define CPU_x86_64 1
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#define CPU_64_BIT 1
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#define X86_64_ASSEMBLY 1
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@ -48,8 +51,6 @@ using namespace std;
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#define CPU_i386 1
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#define X86_ASSEMBLY 1
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#define SAHF_SETO_PROFITABLE
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#elif defined(__arm__) || defined(_M_ARM)
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#define CPU_arm 1
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#elif defined(__powerpc__) || defined(_M_PPC)
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#define CPU_powerpc 1
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#else
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@ -13,6 +13,7 @@ uae_time_t uae_time(void);
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#ifdef _WIN32
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void uae_time_use_rdtsc(bool enable);
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uae_s64 read_system_time(void);
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uae_s64 read_processor_time_rdtsc(void);
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#endif
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typedef uae_time_t frame_time_t;
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2730
jit/codegen_arm.cpp
Normal file
2730
jit/codegen_arm.cpp
Normal file
File diff suppressed because it is too large
Load Diff
1292
jit/codegen_arm.h
Normal file
1292
jit/codegen_arm.h
Normal file
File diff suppressed because it is too large
Load Diff
1967
jit/compemu_midfunc_arm.cpp
Normal file
1967
jit/compemu_midfunc_arm.cpp
Normal file
File diff suppressed because it is too large
Load Diff
186
jit/compemu_midfunc_arm.h
Normal file
186
jit/compemu_midfunc_arm.h
Normal file
@ -0,0 +1,186 @@
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/*
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* compiler/compemu_midfunc_arm.h - Native MIDFUNCS for ARM
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*
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* Copyright (c) 2014 Jens Heitmann of ARAnyM dev team (see AUTHORS)
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
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*
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* Adaptation for Basilisk II and improvements, copyright 2000-2002
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* Gwenole Beauchesne
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*
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* Basilisk II (C) 1997-2002 Christian Bauer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Note:
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* File is included by compemu.h
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*
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*/
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// Arm optimized midfunc
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DECLARE_MIDFUNC(arm_ADD_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(arm_ADD_l_ri(RW4 d, IMM i));
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DECLARE_MIDFUNC(arm_ADD_l_ri8(RW4 d, IMM i));
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DECLARE_MIDFUNC(arm_SUB_l_ri8(RW4 d, IMM i));
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DECLARE_MIDFUNC(arm_AND_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(arm_AND_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(arm_AND_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(arm_AND_l_ri8(RW4 d, IMM i));
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DECLARE_MIDFUNC(arm_EOR_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(arm_EOR_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(arm_EOR_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(arm_ORR_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(arm_ORR_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(arm_ORR_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(arm_ROR_l_ri8(RW4 r, IMM i));
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// Emulated midfunc
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DECLARE_MIDFUNC(bt_l_ri(RR4 r, IMM i));
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DECLARE_MIDFUNC(bt_l_rr(RR4 r, RR4 b));
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DECLARE_MIDFUNC(btc_l_rr(RW4 r, RR4 b));
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DECLARE_MIDFUNC(bts_l_rr(RW4 r, RR4 b));
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DECLARE_MIDFUNC(btr_l_rr(RW4 r, RR4 b));
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DECLARE_MIDFUNC(mov_l_rm(W4 d, IMM s));
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DECLARE_MIDFUNC(mov_l_rm_indexed(W4 d, IMM base, RR4 index, IMM factor));
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DECLARE_MIDFUNC(mov_l_mi(IMM d, IMM s));
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DECLARE_MIDFUNC(mov_w_mi(IMM d, IMM s));
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DECLARE_MIDFUNC(mov_b_mi(IMM d, IMM s));
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DECLARE_MIDFUNC(rol_b_ri(RW1 r, IMM i));
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DECLARE_MIDFUNC(rol_w_ri(RW2 r, IMM i));
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DECLARE_MIDFUNC(rol_l_rr(RW4 d, RR1 r));
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DECLARE_MIDFUNC(rol_w_rr(RW2 d, RR1 r));
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DECLARE_MIDFUNC(rol_b_rr(RW1 d, RR1 r));
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DECLARE_MIDFUNC(rol_l_ri(RW4 r, IMM i));
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DECLARE_MIDFUNC(shll_l_rr(RW4 d, RR1 r));
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DECLARE_MIDFUNC(shll_w_rr(RW2 d, RR1 r));
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DECLARE_MIDFUNC(shll_b_rr(RW1 d, RR1 r));
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DECLARE_MIDFUNC(ror_b_ri(RR1 r, IMM i));
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DECLARE_MIDFUNC(ror_w_ri(RR2 r, IMM i));
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DECLARE_MIDFUNC(ror_l_ri(RR4 r, IMM i));
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DECLARE_MIDFUNC(ror_l_rr(RR4 d, RR1 r));
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DECLARE_MIDFUNC(ror_w_rr(RR2 d, RR1 r));
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DECLARE_MIDFUNC(ror_b_rr(RR1 d, RR1 r));
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DECLARE_MIDFUNC(shrl_l_rr(RW4 d, RR1 r));
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DECLARE_MIDFUNC(shrl_w_rr(RW2 d, RR1 r));
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DECLARE_MIDFUNC(shrl_b_rr(RW1 d, RR1 r));
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DECLARE_MIDFUNC(shra_l_rr(RW4 d, RR1 r));
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DECLARE_MIDFUNC(shra_w_rr(RW2 d, RR1 r));
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DECLARE_MIDFUNC(shra_b_rr(RW1 d, RR1 r));
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DECLARE_MIDFUNC(shll_l_ri(RW4 r, IMM i));
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DECLARE_MIDFUNC(shll_w_ri(RW2 r, IMM i));
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DECLARE_MIDFUNC(shll_b_ri(RW1 r, IMM i));
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DECLARE_MIDFUNC(shrl_l_ri(RW4 r, IMM i));
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DECLARE_MIDFUNC(shrl_w_ri(RW2 r, IMM i));
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DECLARE_MIDFUNC(shrl_b_ri(RW1 r, IMM i));
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DECLARE_MIDFUNC(shra_l_ri(RW4 r, IMM i));
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DECLARE_MIDFUNC(shra_w_ri(RW2 r, IMM i));
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DECLARE_MIDFUNC(shra_b_ri(RW1 r, IMM i));
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DECLARE_MIDFUNC(setcc(W1 d, IMM cc));
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DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc));
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DECLARE_MIDFUNC(cmov_l_rr(RW4 d, RR4 s, IMM cc));
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DECLARE_MIDFUNC(bsf_l_rr(W4 d, RR4 s));
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DECLARE_MIDFUNC(pop_l(W4 d));
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DECLARE_MIDFUNC(push_l(RR4 s));
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DECLARE_MIDFUNC(sign_extend_16_rr(W4 d, RR2 s));
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DECLARE_MIDFUNC(sign_extend_8_rr(W4 d, RR1 s));
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DECLARE_MIDFUNC(zero_extend_16_rr(W4 d, RR2 s));
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DECLARE_MIDFUNC(zero_extend_8_rr(W4 d, RR1 s));
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DECLARE_MIDFUNC(simulate_bsf(W4 tmp, RW4 s));
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DECLARE_MIDFUNC(imul_64_32(RW4 d, RW4 s));
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DECLARE_MIDFUNC(mul_64_32(RW4 d, RW4 s));
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DECLARE_MIDFUNC(imul_32_32(RW4 d, RR4 s));
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DECLARE_MIDFUNC(mov_b_rr(W1 d, RR1 s));
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DECLARE_MIDFUNC(mov_w_rr(W2 d, RR2 s));
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DECLARE_MIDFUNC(mov_l_rR(W4 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_w_rR(W2 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_l_brR(W4 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_w_brR(W2 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_b_brR(W1 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_l_Ri(RR4 d, IMM i, IMM offset));
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DECLARE_MIDFUNC(mov_w_Ri(RR4 d, IMM i, IMM offset));
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DECLARE_MIDFUNC(mov_l_Rr(RR4 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_w_Rr(RR4 d, RR2 s, IMM offset));
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DECLARE_MIDFUNC(lea_l_brr(W4 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(lea_l_brr_indexed(W4 d, RR4 s, RR4 index, IMM factor, IMM offset));
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DECLARE_MIDFUNC(lea_l_rr_indexed(W4 d, RR4 s, RR4 index, IMM factor));
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DECLARE_MIDFUNC(mov_l_bRr(RR4 d, RR4 s, IMM offset));
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DECLARE_MIDFUNC(mov_w_bRr(RR4 d, RR2 s, IMM offset));
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DECLARE_MIDFUNC(mov_b_bRr(RR4 d, RR1 s, IMM offset));
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DECLARE_MIDFUNC(mid_bswap_32(RW4 r));
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DECLARE_MIDFUNC(mid_bswap_16(RW2 r));
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DECLARE_MIDFUNC(mov_l_rr(W4 d, RR4 s));
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DECLARE_MIDFUNC(mov_l_mr(IMM d, RR4 s));
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DECLARE_MIDFUNC(mov_w_mr(IMM d, RR2 s));
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DECLARE_MIDFUNC(mov_w_rm(W2 d, IMM s));
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DECLARE_MIDFUNC(mov_b_mr(IMM d, RR1 s));
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DECLARE_MIDFUNC(mov_b_rm(W1 d, IMM s));
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DECLARE_MIDFUNC(mov_l_ri(W4 d, IMM s));
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DECLARE_MIDFUNC(mov_w_ri(W2 d, IMM s));
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DECLARE_MIDFUNC(mov_b_ri(W1 d, IMM s));
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DECLARE_MIDFUNC(test_l_ri(RR4 d, IMM i));
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DECLARE_MIDFUNC(test_l_rr(RR4 d, RR4 s));
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DECLARE_MIDFUNC(test_w_rr(RR2 d, RR2 s));
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DECLARE_MIDFUNC(test_b_rr(RR1 d, RR1 s));
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DECLARE_MIDFUNC(and_l_ri(RW4 d, IMM i));
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DECLARE_MIDFUNC(and_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(and_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(and_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(or_l_ri(RW4 d, IMM i));
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DECLARE_MIDFUNC(or_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(or_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(or_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(adc_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(adc_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(adc_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(add_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(add_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(add_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(sub_l_ri(RW4 d, IMM i));
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DECLARE_MIDFUNC(sub_w_ri(RW2 d, IMM i));
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DECLARE_MIDFUNC(sub_b_ri(RW1 d, IMM i));
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DECLARE_MIDFUNC(add_l_ri(RW4 d, IMM i));
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DECLARE_MIDFUNC(add_w_ri(RW2 d, IMM i));
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DECLARE_MIDFUNC(add_b_ri(RW1 d, IMM i));
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DECLARE_MIDFUNC(sbb_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(sbb_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(sbb_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(sub_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(sub_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(sub_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(cmp_l(RR4 d, RR4 s));
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DECLARE_MIDFUNC(cmp_w(RR2 d, RR2 s));
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DECLARE_MIDFUNC(cmp_b(RR1 d, RR1 s));
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DECLARE_MIDFUNC(xor_l(RW4 d, RR4 s));
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DECLARE_MIDFUNC(xor_w(RW2 d, RR2 s));
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DECLARE_MIDFUNC(xor_b(RW1 d, RR1 s));
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DECLARE_MIDFUNC(call_r_02(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2));
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DECLARE_MIDFUNC(call_r_11(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize));
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DECLARE_MIDFUNC(live_flags(void));
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DECLARE_MIDFUNC(dont_care_flags(void));
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DECLARE_MIDFUNC(duplicate_carry(void));
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DECLARE_MIDFUNC(restore_carry(void));
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DECLARE_MIDFUNC(start_needflags(void));
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DECLARE_MIDFUNC(end_needflags(void));
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DECLARE_MIDFUNC(make_flags_live(void));
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DECLARE_MIDFUNC(forget_about(W4 r));
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DECLARE_MIDFUNC(nop(void));
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DECLARE_MIDFUNC(f_forget_about(FW r));
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5195
jit/compemu_midfunc_arm2.cpp
Normal file
5195
jit/compemu_midfunc_arm2.cpp
Normal file
File diff suppressed because it is too large
Load Diff
348
jit/compemu_midfunc_arm2.h
Normal file
348
jit/compemu_midfunc_arm2.h
Normal file
@ -0,0 +1,348 @@
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/*
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* compiler/compemu_midfunc_arm2.h - Native MIDFUNCS for ARM (JIT v2)
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*
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* Copyright (c) 2014 Jens Heitmann of ARAnyM dev team (see AUTHORS)
|
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*
|
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* Inspired by Christian Bauer's Basilisk II
|
||||
*
|
||||
* Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
|
||||
*
|
||||
* Adaptation for Basilisk II and improvements, copyright 2000-2002
|
||||
* Gwenole Beauchesne
|
||||
*
|
||||
* Basilisk II (C) 1997-2002 Christian Bauer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Note:
|
||||
* File is included by compemu.h
|
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*
|
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*/
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// Arm optimized midfunc
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extern const uae_u32 ARM_CCR_MAP[];
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DECLARE_MIDFUNC(restore_inverted_carry(void));
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// ADD
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DECLARE_MIDFUNC(jnf_ADD(W4 d, RR4 s, RR4 v));
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DECLARE_MIDFUNC(jnf_ADD_imm(W4 d, RR4 s, IMM v));
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DECLARE_MIDFUNC(jff_ADD_b(W4 d, RR1 s, RR1 v));
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DECLARE_MIDFUNC(jff_ADD_w(W4 d, RR2 s, RR2 v));
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DECLARE_MIDFUNC(jff_ADD_l(W4 d, RR4 s, RR4 v));
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DECLARE_MIDFUNC(jff_ADD_b_imm(W4 d, RR1 s, IMM v));
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DECLARE_MIDFUNC(jff_ADD_w_imm(W4 d, RR2 s, IMM v));
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DECLARE_MIDFUNC(jff_ADD_l_imm(W4 d, RR4 s, IMM v));
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// ADDA
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DECLARE_MIDFUNC(jnf_ADDA_b(W4 d, RR1 s));
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DECLARE_MIDFUNC(jnf_ADDA_w(W4 d, RR2 s));
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DECLARE_MIDFUNC(jnf_ADDA_l(W4 d, RR4 s));
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// ADDX
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DECLARE_MIDFUNC(jnf_ADDX(W4 d, RR4 s, RR4 v));
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DECLARE_MIDFUNC(jff_ADDX_b(W4 d, RR1 s, RR4 v));
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DECLARE_MIDFUNC(jff_ADDX_w(W4 d, RR2 s, RR4 v));
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DECLARE_MIDFUNC(jff_ADDX_l(W4 d, RR4 s, RR4 v));
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// AND
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DECLARE_MIDFUNC(jnf_AND(W4 d, RR4 s, RR4 v));
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DECLARE_MIDFUNC(jff_AND_b(W4 d, RR1 s, RR1 v));
|
||||
DECLARE_MIDFUNC(jff_AND_w(W4 d, RR2 s, RR2 v));
|
||||
DECLARE_MIDFUNC(jff_AND_l(W4 d, RR4 s, RR4 v));
|
||||
|
||||
// ANDSR
|
||||
DECLARE_MIDFUNC(jff_ANDSR(IMM s, IMM x));
|
||||
|
||||
// ASL
|
||||
DECLARE_MIDFUNC(jff_ASL_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASL_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASL_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASL_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ASL_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ASL_l_reg(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ASLW
|
||||
DECLARE_MIDFUNC(jff_ASLW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_ASLW(W4 d, RR4 s));
|
||||
|
||||
// ASR
|
||||
DECLARE_MIDFUNC(jnf_ASR_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_ASR_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_ASR_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASR_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASR_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_ASR_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_ASR_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ASR_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ASR_l_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ASR_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ASR_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ASR_l_reg(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ASRW
|
||||
DECLARE_MIDFUNC(jff_ASRW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_ASRW(W4 d, RR4 s));
|
||||
|
||||
// BCHG
|
||||
DECLARE_MIDFUNC(jnf_BCHG_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jnf_BCHG_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BCHG_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jff_BCHG_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jnf_BCHG_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_BCHG_l(RW4 d, RR4 s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BCHG_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_BCHG_l(RW4 d, RR4 s));
|
||||
|
||||
// BCLR
|
||||
DECLARE_MIDFUNC(jnf_BCLR_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jnf_BCLR_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jnf_BCLR_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_BCLR_l(RW4 d, RR4 s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BCLR_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jff_BCLR_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BCLR_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_BCLR_l(RW4 d, RR4 s));
|
||||
|
||||
// BSET
|
||||
DECLARE_MIDFUNC(jnf_BSET_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jnf_BSET_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jnf_BSET_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_BSET_l(RW4 d, RR4 s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BSET_b_imm(RW4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jff_BSET_l_imm(RW4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BSET_b(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_BSET_l(RW4 d, RR4 s));
|
||||
|
||||
// BTST
|
||||
DECLARE_MIDFUNC(jff_BTST_b_imm(RR4 d, IMM s));
|
||||
DECLARE_MIDFUNC(jff_BTST_l_imm(RR4 d, IMM s));
|
||||
|
||||
DECLARE_MIDFUNC(jff_BTST_b(RR4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_BTST_l(RR4 d, RR4 s));
|
||||
|
||||
// CLR
|
||||
DECLARE_MIDFUNC (jnf_CLR(W4 d));
|
||||
DECLARE_MIDFUNC (jff_CLR(W4 d));
|
||||
|
||||
// CMP
|
||||
DECLARE_MIDFUNC(jff_CMP_b(RR1 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_CMP_w(RR2 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_CMP_l(RR4 d, RR4 s));
|
||||
|
||||
// CMPA
|
||||
DECLARE_MIDFUNC(jff_CMPA_b(RR1 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_CMPA_w(RR2 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_CMPA_l(RR4 d, RR4 s));
|
||||
|
||||
// EOR
|
||||
DECLARE_MIDFUNC(jnf_EOR(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_EOR_b(W4 d, RR1 s, RR1 v));
|
||||
DECLARE_MIDFUNC(jff_EOR_w(W4 d, RR2 s, RR2 v));
|
||||
DECLARE_MIDFUNC(jff_EOR_l(W4 d, RR4 s, RR4 v));
|
||||
|
||||
// EORSR
|
||||
DECLARE_MIDFUNC(jff_EORSR(IMM s, IMM x));
|
||||
|
||||
// EXT
|
||||
DECLARE_MIDFUNC(jnf_EXT_b(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_EXT_w(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_EXT_l(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_EXT_b(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_EXT_w(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_EXT_l(W4 d, RR4 s));
|
||||
|
||||
// LSL
|
||||
DECLARE_MIDFUNC(jnf_LSL_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_LSL_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSL_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSL_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSL_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSL_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSL_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSL_l_reg(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// LSLW
|
||||
DECLARE_MIDFUNC(jff_LSLW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_LSLW(W4 d, RR4 s));
|
||||
|
||||
// LSR
|
||||
DECLARE_MIDFUNC(jnf_LSR_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_LSR_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_LSR_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSR_b_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSR_w_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jff_LSR_l_imm(W4 d, RR4 s, IMM i));
|
||||
DECLARE_MIDFUNC(jnf_LSR_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_LSR_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_LSR_l_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSR_b_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSR_w_reg(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_LSR_l_reg(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// LSRW
|
||||
DECLARE_MIDFUNC(jff_LSRW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_LSRW(W4 d, RR4 s));
|
||||
|
||||
// MOVE
|
||||
DECLARE_MIDFUNC(jnf_MOVE(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_MOVE_b_imm(W4 d, IMM i));
|
||||
DECLARE_MIDFUNC(jff_MOVE_w_imm(W4 d, IMM i));
|
||||
DECLARE_MIDFUNC(jff_MOVE_l_imm(W4 d, IMM i));
|
||||
DECLARE_MIDFUNC(jff_MOVE_b(W4 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_MOVE_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_MOVE_l(W4 d, RR4 s));
|
||||
|
||||
// MOVE16
|
||||
DECLARE_MIDFUNC(jnf_MOVE16(RR4 d, RR4 s));
|
||||
|
||||
// MOVEA
|
||||
DECLARE_MIDFUNC(jnf_MOVEA_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jnf_MOVEA_l(W4 d, RR4 s));
|
||||
|
||||
// MULS
|
||||
DECLARE_MIDFUNC (jnf_MULS(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jff_MULS(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jnf_MULS32(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jff_MULS32(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jnf_MULS64(RW4 d, RW4 s));
|
||||
DECLARE_MIDFUNC (jff_MULS64(RW4 d, RW4 s));
|
||||
|
||||
// MULU
|
||||
DECLARE_MIDFUNC (jnf_MULU(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jff_MULU(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jnf_MULU32(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jff_MULU32(RW4 d, RR4 s));
|
||||
DECLARE_MIDFUNC (jnf_MULU64(RW4 d, RW4 s));
|
||||
DECLARE_MIDFUNC (jff_MULU64(RW4 d, RW4 s));
|
||||
|
||||
// NEG
|
||||
DECLARE_MIDFUNC(jnf_NEG(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_NEG_b(W4 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_NEG_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_NEG_l(W4 d, RR4 s));
|
||||
|
||||
// NEGX
|
||||
DECLARE_MIDFUNC(jnf_NEGX(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_NEGX_b(W4 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_NEGX_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_NEGX_l(W4 d, RR4 s));
|
||||
|
||||
// NOT
|
||||
DECLARE_MIDFUNC(jnf_NOT(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jff_NOT_b(W4 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jff_NOT_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jff_NOT_l(W4 d, RR4 s));
|
||||
|
||||
// OR
|
||||
DECLARE_MIDFUNC(jnf_OR(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_OR_b(W4 d, RR1 s, RR1 v));
|
||||
DECLARE_MIDFUNC(jff_OR_w(W4 d, RR2 s, RR2 v));
|
||||
DECLARE_MIDFUNC(jff_OR_l(W4 d, RR4 s, RR4 v));
|
||||
|
||||
// ORSR
|
||||
DECLARE_MIDFUNC(jff_ORSR(IMM s, IMM x));
|
||||
|
||||
// ROL
|
||||
DECLARE_MIDFUNC(jnf_ROL_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROL_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROL_l(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROL_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROL_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROL_l(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ROLW
|
||||
DECLARE_MIDFUNC(jff_ROLW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_ROLW(W4 d, RR4 s));
|
||||
|
||||
// RORW
|
||||
DECLARE_MIDFUNC(jff_RORW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_RORW(W4 d, RR4 s));
|
||||
|
||||
// ROXL
|
||||
DECLARE_MIDFUNC(jnf_ROXL_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROXL_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROXL_l(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXL_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXL_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXL_l(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ROXLW
|
||||
DECLARE_MIDFUNC(jff_ROXLW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_ROXLW(W4 d, RR4 s));
|
||||
|
||||
// ROR
|
||||
DECLARE_MIDFUNC(jnf_ROR_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROR_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROR_l(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROR_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROR_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROR_l(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ROXR
|
||||
DECLARE_MIDFUNC(jnf_ROXR_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROXR_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jnf_ROXR_l(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXR_b(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXR_w(W4 d, RR4 s, RR4 i));
|
||||
DECLARE_MIDFUNC(jff_ROXR_l(W4 d, RR4 s, RR4 i));
|
||||
|
||||
// ROXRW
|
||||
DECLARE_MIDFUNC(jff_ROXRW(W4 d, RR4 s));
|
||||
DECLARE_MIDFUNC(jnf_ROXRW(W4 d, RR4 s));
|
||||
|
||||
// SUB
|
||||
DECLARE_MIDFUNC(jnf_SUB_b_imm(W4 d, RR4 s, IMM v));
|
||||
DECLARE_MIDFUNC(jnf_SUB_b(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jnf_SUB_w_imm(W4 d, RR4 s, IMM v));
|
||||
DECLARE_MIDFUNC(jnf_SUB_w(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jnf_SUB_l_imm(W4 d, RR4 s, IMM v));
|
||||
DECLARE_MIDFUNC(jnf_SUB_l(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_SUB_b(W4 d, RR1 s, RR1 v));
|
||||
DECLARE_MIDFUNC(jff_SUB_w(W4 d, RR2 s, RR2 v));
|
||||
DECLARE_MIDFUNC(jff_SUB_l(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_SUB_b_imm(W4 d, RR1 s, IMM v));
|
||||
DECLARE_MIDFUNC(jff_SUB_w_imm(W4 d, RR2 s, IMM v));
|
||||
DECLARE_MIDFUNC(jff_SUB_l_imm(W4 d, RR4 s, IMM v));
|
||||
|
||||
// SUBA
|
||||
DECLARE_MIDFUNC(jnf_SUBA_b(W4 d, RR1 s));
|
||||
DECLARE_MIDFUNC(jnf_SUBA_w(W4 d, RR2 s));
|
||||
DECLARE_MIDFUNC(jnf_SUBA_l(W4 d, RR4 s));
|
||||
|
||||
// SUBX
|
||||
DECLARE_MIDFUNC(jnf_SUBX(W4 d, RR4 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_SUBX_b(W4 d, RR1 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_SUBX_w(W4 d, RR2 s, RR4 v));
|
||||
DECLARE_MIDFUNC(jff_SUBX_l(W4 d, RR4 s, RR4 v));
|
||||
|
||||
// SWAP
|
||||
DECLARE_MIDFUNC (jnf_SWAP(RW4 d));
|
||||
DECLARE_MIDFUNC (jff_SWAP(RW4 d));
|
||||
|
||||
// TST
|
||||
DECLARE_MIDFUNC (jff_TST_b(RR1 s));
|
||||
DECLARE_MIDFUNC (jff_TST_w(RR2 s));
|
||||
DECLARE_MIDFUNC (jff_TST_l(RR4 s));
|
||||
|
||||
52
jit/flags_arm.h
Normal file
52
jit/flags_arm.h
Normal file
@ -0,0 +1,52 @@
|
||||
/*
|
||||
* compiler/flags_arm.h - Native flags definitions for ARM
|
||||
*
|
||||
* Copyright (c) 2013 Jens Heitmann of ARAnyM dev team (see AUTHORS)
|
||||
*
|
||||
* Inspired by Christian Bauer's Basilisk II
|
||||
*
|
||||
* Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
|
||||
*
|
||||
* Adaptation for Basilisk II and improvements, copyright 2000-2002
|
||||
* Gwenole Beauchesne
|
||||
*
|
||||
* Basilisk II (C) 1997-2002 Christian Bauer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef NATIVE_FLAGS_ARM_H
|
||||
#define NATIVE_FLAGS_ARM_H
|
||||
|
||||
/* Native integer code conditions */
|
||||
enum {
|
||||
NATIVE_CC_EQ = 0,
|
||||
NATIVE_CC_NE = 1,
|
||||
NATIVE_CC_CS = 2,
|
||||
NATIVE_CC_CC = 3,
|
||||
NATIVE_CC_MI = 4,
|
||||
NATIVE_CC_PL = 5,
|
||||
NATIVE_CC_VS = 6,
|
||||
NATIVE_CC_VC = 7,
|
||||
NATIVE_CC_HI = 8,
|
||||
NATIVE_CC_LS = 9,
|
||||
NATIVE_CC_GE = 10,
|
||||
NATIVE_CC_LT = 11,
|
||||
NATIVE_CC_GT = 12,
|
||||
NATIVE_CC_LE = 13,
|
||||
NATIVE_CC_AL = 14
|
||||
};
|
||||
|
||||
#endif /* NATIVE_FLAGS_ARM_H */
|
||||
5082
jit/gencomp_arm.c
Normal file
5082
jit/gencomp_arm.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -12,12 +12,17 @@
|
||||
|
||||
#define DRIVESOUND
|
||||
#define GFXFILTER
|
||||
#if defined(_M_ARM64) || defined(_M_ARM64EC)
|
||||
#define __arm__
|
||||
#define MSVC_LONG_DOUBLE
|
||||
#else
|
||||
#define X86_MSVC_ASSEMBLY
|
||||
//#define OPTIMIZED_FLAGS
|
||||
#define MSVC_LONG_DOUBLE
|
||||
#ifndef __i386__
|
||||
#define __i386__
|
||||
#endif
|
||||
#endif
|
||||
#define WINDOWS
|
||||
#define ZLIB_WINAPI
|
||||
#define PACKAGE_STRING "WinUAE"
|
||||
|
||||
@ -328,7 +328,7 @@ int target_sleep_nanos(int nanos)
|
||||
return 0;
|
||||
}
|
||||
|
||||
uae_u64 spincount;
|
||||
uae_s64 spincount;
|
||||
extern bool calculated_scanline;
|
||||
|
||||
void target_spin(int total)
|
||||
@ -338,9 +338,9 @@ void target_spin(int total)
|
||||
if (total > 10)
|
||||
total = 10;
|
||||
while (total-- >= 0) {
|
||||
uae_u64 v1 = __rdtsc();
|
||||
uae_s64 v1 = read_processor_time_rdtsc();
|
||||
v1 += spincount;
|
||||
while (v1 > __rdtsc());
|
||||
while (v1 > read_processor_time_rdtsc());
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -369,7 +369,7 @@ static int target_get_display_scanline2(int displayindex)
|
||||
return -13;
|
||||
}
|
||||
|
||||
extern uae_u64 spincount;
|
||||
extern uae_s64 spincount;
|
||||
bool calculated_scanline = true;
|
||||
|
||||
int target_get_display_scanline(int displayindex)
|
||||
@ -384,18 +384,18 @@ int target_get_display_scanline(int displayindex)
|
||||
sl = -1;
|
||||
return sl;
|
||||
} else {
|
||||
static uae_u64 lastrdtsc;
|
||||
static uae_s64 lastrdtsc;
|
||||
static int lastvpos;
|
||||
if (spincount == 0 || currprefs.m68k_speed >= 0) {
|
||||
lastrdtsc = 0;
|
||||
lastvpos = target_get_display_scanline2(displayindex);
|
||||
return lastvpos;
|
||||
}
|
||||
uae_u64 v = __rdtsc();
|
||||
uae_s64 v = read_processor_time_rdtsc();
|
||||
if (lastrdtsc > v)
|
||||
return lastvpos;
|
||||
lastvpos = target_get_display_scanline2(displayindex);
|
||||
lastrdtsc = __rdtsc() + spincount * 4;
|
||||
lastrdtsc = read_processor_time_rdtsc() + spincount * 4;
|
||||
return lastvpos;
|
||||
}
|
||||
}
|
||||
|
||||
@ -27,23 +27,13 @@ static frame_time_t read_processor_time_qpf(void)
|
||||
return t;
|
||||
}
|
||||
|
||||
static frame_time_t read_processor_time_rdtsc(void)
|
||||
uae_s64 read_processor_time_rdtsc(void)
|
||||
{
|
||||
uae_u32 foo = 0;
|
||||
#if defined(X86_MSVC_ASSEMBLY)
|
||||
uae_u32 bar;
|
||||
__asm
|
||||
{
|
||||
rdtsc
|
||||
mov foo, eax
|
||||
mov bar, edx
|
||||
}
|
||||
/* very high speed CPU's RDTSC might overflow without this.. */
|
||||
frame_time_t out;
|
||||
out = ((uae_u64)foo << 32) | bar;
|
||||
out >>= 6;
|
||||
#ifdef __arm__
|
||||
return read_processor_time_qpf();
|
||||
#else
|
||||
return __rdtsc();
|
||||
#endif
|
||||
return foo;
|
||||
}
|
||||
|
||||
uae_time_t uae_time(void)
|
||||
|
||||
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Reference in New Issue
Block a user