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84 lines
2.9 KiB
Plaintext
84 lines
2.9 KiB
Plaintext
# JLCPCB 4-Layer
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(version 1)
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(rule "Trace clearance (large)"
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(constraint clearance (min 5mil))
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(condition "A.Type == 'Track'"))
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(rule "Via to track clearance"
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(constraint hole_clearance (min 0.254mm))
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(condition "A.Net != B.Net && A.Type == 'Via"))
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(rule "Drill hole-size"
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(constraint hole_size (min 0.2mm) (max 6.3mm))
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(condition "A.Type == 'hole'"))
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(rule "Min. Via hole size"
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(constraint hole_size (min 0.2mm))
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(condition "A.Type == 'Via'"))
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(rule "Min. Via Diameter"
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(constraint via_diameter (min 0.45mm))
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(condition "A.Type == 'Via'"))
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(rule "PTH hole size"
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(constraint hole_size (min 0.2mm) (max 6.35mm))
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(condition "A.Pad_Type == 'Through-hole' && A.isPlated() && A.Type == 'Pad'"))
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#(rule "Pad Size"
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# (constraint length (min 1.0mm))
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# (condition "A.Pad_Type == 'Through-hole' && A.isPlated() && A.Type == 'Pad'"))
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#(rule "Minimum annular ring (PTH)"
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# (constraint annular_width (min 0.3mm))
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# (condition "A.Pad_Type == 'Through-hole' && A.Type == 'Pad'"))
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(rule "Minimum annular ring"
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(constraint annular_width (min 0.127mm))
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(condition "A.Type != 'Pad'"))
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(rule "Hole-to-hole clearance (different nets)"
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(constraint hole_to_hole (min 0.50mm))
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(condition "A.Net != B.Net"))
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(rule "Via-to-Via clearance (same nets)"
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(constraint hole_clearance (min 0.254mm))
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(condition "A.Type == 'Via' && B.type == 'Via' && A.Net == B.Net"))
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#(rule "Pad-to-Pad clearance (Pad without hole, different nets)"
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# (constraint clearance (min 0.127mm))
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# (condition "A.Type == B.Type && A.Type == 'Pad' && A.Net != B.Net && A.Pad_Type == 'SMD' && B.Pad_Type == 'SMD"))
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(rule "Pad-to-Pad clearance (Pad with hole, different nets)"
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(constraint clearance (min 0.127mm))
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(condition "A.isPlated() && B.isPlated() && A.Type == B.Type && A.Type == 'Pad' && A.Net != B.Net && A.Pad_Type == 'Through-hole' && B.Pad_Type == 'Through-hole"))
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(rule "PTH to Track clearance"
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(constraint hole_clearance (min 0.33mm))
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(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && A.isPlated() && B.Type == 'Track' && A.Net != B.Net"))
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(rule "NPTH to Track clearance"
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(constraint hole_clearance (min 0.2mm))
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(condition "A.Type == 'Pad' && A.Pad_Type == 'Through-hole' && !A.isPlated() && B.Type == 'Track' && A.Net != B.Net"))
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(rule "Pad to Track clearance"
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(constraint clearance (min 3.5mil))
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(condition "A.Type == 'Pad' && B.Type == 'Track' && A.Net != B.Net"))
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(rule "Minimum width (external layers)"
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(constraint track_width (min 0.09mm))
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(condition "(A.existsOnLayer('F.Cu') || A.existsOnLayer('B.cu')) && A.Type == 'Track'"))
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(rule "Minimum width (internal layers)"
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(constraint track_width (min 0.127mm))
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(condition "A.existsOnLayer('In*.Cu') && A.Type == 'Track'"))
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(rule "Trace clearance (large)"
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(constraint clearance (min 5mil))
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(condition "A.Type == 'Track' && B.Type == 'Track' && A.Width != 4mil"))
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(rule "Trace clearance (small)"
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(constraint clearance (min 3.5mil))
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(condition "A.Type == 'Track' && B.Type == 'Track' && A.Width == 4mil"))
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