SukkoPera
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79be49beab
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Fix #1 and we're ready for V1
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2019-05-19 15:38:53 +02:00 |
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SukkoPera
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d39c9740f0
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Update to KiCad 5.1.2
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2019-05-19 15:24:05 +02:00 |
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SukkoPera
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1c7bed805a
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Remove old pin names
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2019-03-04 00:47:09 +01:00 |
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SukkoPera
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cd87a8acee
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Just can't get enough of vias
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2019-03-03 11:45:12 +01:00 |
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SukkoPera
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74cfa8f891
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Ready for prototypes
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2019-03-03 11:32:47 +01:00 |
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SukkoPera
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30ad40eb80
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Add JTAG connector pinout
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2019-03-03 01:34:28 +01:00 |
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SukkoPera
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ab3d25345b
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More and more and more and more and more refinements...
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2019-03-03 01:25:33 +01:00 |
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SukkoPera
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ddf203ce1c
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Stitched perimeter and more refinements
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2019-03-03 00:56:19 +01:00 |
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SukkoPera
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dc8568836f
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Refinements here and there
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2019-03-02 16:47:27 +01:00 |
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SukkoPera
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c9f53a0d83
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Routing complete
Ground stitching and some refinements TBD
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2019-03-02 12:36:28 +01:00 |
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SukkoPera
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d1745fc761
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Almost there...
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2019-03-02 01:15:34 +01:00 |
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SukkoPera
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fb1739712a
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Completed routing of data bus from CPU to RAM
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2019-03-01 01:03:40 +01:00 |
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SukkoPera
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d7899fc917
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Initial commit, schematic should be OK, PCB routing started
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2019-03-01 00:45:08 +01:00 |
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