Stefan Reinauer 87c917c7ff Fix signal names for scsi slave interface

2025-07-02 12:58:45 -07:00

..

.gitignore

Add skeleton to include Gerbers, BOM files, RTL etc

2025-04-02 07:58:30 -07:00

A4092.ucf

factor out scsi slave module

2025-07-01 23:51:52 -07:00

autoconfig.v

Implement autoconfig (courtesy Matt Harlum)

2025-04-23 15:25:33 -07:00

buffer_control.v

Move memory map handling into top.v

2025-07-01 12:43:11 -07:00

globalparams.vh

Implement autoconfig (courtesy Matt Harlum)

2025-04-23 15:25:33 -07:00

intreg_access.v

INT2_n is shared so it should be 0 or Z

2025-07-01 18:55:58 -07:00

Makefile

Add option to move SID into CPLD / flash entirely

2025-05-18 16:18:34 -07:00

rom_access.v

Move memory map handling into top.v

2025-07-01 12:43:11 -07:00

scsi_access.v

Move memory map handling into top.v

2025-07-01 12:43:11 -07:00

scsi_slave.v

Fix signal names for scsi slave interface

2025-07-02 12:58:45 -07:00

sid_access.v

Clean up sid access

2025-07-01 20:10:49 -07:00

spi_access.v

factor out scsi slave module

2025-07-01 23:51:52 -07:00

template.xst

Start adding pin descriptions to A4092 RTL

2025-04-09 20:45:10 -07:00

top.v

Fix signal names for scsi slave interface

2025-07-02 12:58:45 -07:00

zorro_dma_master.v

Fix address mapping

2025-06-07 23:36:44 -07:00

zorro_master_arbiter.v

factor out scsi slave module

2025-07-01 23:51:52 -07:00