Stefan Reinauer 1a213776c6 RTL: Add additional address, data and spi signals

2025-05-30 08:28:22 -07:00

..

.gitignore

Add skeleton to include Gerbers, BOM files, RTL etc

2025-04-02 07:58:30 -07:00

A4092.ucf

RTL: Add additional data and address lines

2025-05-30 08:25:34 -07:00

autoconfig.v

Implement autoconfig (courtesy Matt Harlum)

2025-04-23 15:25:33 -07:00

buffer_control.v

RTL: Add additional data and address lines

2025-05-30 08:25:34 -07:00

globalparams.vh

Implement autoconfig (courtesy Matt Harlum)

2025-04-23 15:25:33 -07:00

intreg_access.v

Use Z_LOCK/A1 for intreg

2025-05-12 07:44:38 -07:00

Makefile

Add option to move SID into CPLD / flash entirely

2025-05-18 16:18:34 -07:00

rom_access.v

RTL: Add additional data and address lines

2025-05-30 08:25:34 -07:00

scsi_access.v

RTL: Add additional data and address lines

2025-05-30 08:25:34 -07:00

sid_access.v

RTL: Add additional data and address lines

2025-05-30 08:25:34 -07:00

template.xst

Start adding pin descriptions to A4092 RTL

2025-04-09 20:45:10 -07:00

top.v

RTL: Add additional address, data and spi signals

2025-05-30 08:28:22 -07:00

zorro_dma_master.v

Add Zorro 3 DMA master

2025-05-28 11:47:16 -07:00

zorro_master_arbiter.v

Zorro Master Arbiter

2025-05-07 13:34:38 +08:00