Stefan Reinauer 0b40860c76 Move A4092 main PCB to subdirectory
- Move current main design to A4092
- Add fp-lib-table and sym-lib-table with correct paths to
  each sub directory
2025-05-29 14:13:09 -07:00
2025-05-25 23:51:47 -07:00
2025-05-28 11:42:19 -07:00
2025-05-29 14:13:09 -07:00
2025-05-28 11:47:16 -07:00
2025-04-19 22:25:00 -07:00
2025-04-14 21:27:13 -07:00

A4092

A modern successor to the A4091.

  • TSSOP parts for smaller footprint
  • Flash instead of EPROM
  • CPLD instead of GALs
  • Autoconfig moved into CPLD

PCB

Description
No description provided
Readme 27 MiB
Languages
Verilog 50.2%
C 43.9%
Makefile 5.2%
Shell 0.6%
SystemVerilog 0.1%