mirror of
https://github.com/LIV2/WinUAE.git
synced 2025-12-06 00:12:52 +00:00
84803 lines
2.0 MiB
84803 lines
2.0 MiB
#include "sysconfig.h"
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#include "sysdeps.h"
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#include "options.h"
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#include "memory.h"
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#include "custom.h"
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#include "events.h"
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#include "newcpu.h"
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#include "cpu_prefetch.h"
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#include "cputbl.h"
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#define SET_ALWAYS_CFLG(x) SET_CFLG(x)
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#define SET_ALWAYS_NFLG(x) SET_NFLG(x)
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/* OR.B #<data>.B,Dn */
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uae_u32 REGPARAM2 op_0000_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uae_s8 dst = m68k_dreg(regs, dstreg);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.B #<data>.B,(An) */
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uae_u32 REGPARAM2 op_0010_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s8 dst = get_byte_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.B #<data>.B,(An)+ */
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uae_u32 REGPARAM2 op_0018_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s8 dst = get_byte_jit(dsta);
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m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.B #<data>.B,-(An) */
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uae_u32 REGPARAM2 op_0020_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
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uae_s8 dst = get_byte_jit(dsta);
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m68k_areg(regs, dstreg) = dsta;
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.B #<data>.B,(d16,An) */
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uae_u32 REGPARAM2 op_0028_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
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uae_s8 dst = get_byte_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.B #<data>.B,(d8,An,Xn) */
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uae_u32 REGPARAM2 op_0030_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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m68k_incpc(4);
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dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
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uae_s8 dst = get_byte_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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return 0;
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}
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/* 4 2,0 */
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/* OR.B #<data>.B,(xxx).W */
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uae_u32 REGPARAM2 op_0038_40_ff(uae_u32 opcode)
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{
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = (uae_s32)(uae_s16)get_diword(4);
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uae_s8 dst = get_byte_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.B #<data>.B,(xxx).L */
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uae_u32 REGPARAM2 op_0039_40_ff(uae_u32 opcode)
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{
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uae_s8 src = get_dibyte(2);
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uaecptr dsta;
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dsta = get_dilong(4);
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uae_s8 dst = get_byte_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s8)(src)) == 0);
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SET_NFLG(((uae_s8)(src)) < 0);
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put_byte_jit(dsta, src);
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m68k_incpc(8);
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return 0;
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}
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/* 8 0,0 */
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/* ORSR.B #<data>.W */
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uae_u32 REGPARAM2 op_003c_40_ff(uae_u32 opcode)
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{
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MakeSR();
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uae_s16 src = get_diword(2);
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src &= 0xFF;
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regs.sr |= src;
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MakeFromSR();
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.W #<data>.W,Dn */
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uae_u32 REGPARAM2 op_0040_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uae_s16 dst = m68k_dreg(regs, dstreg);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.W #<data>.W,(An) */
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uae_u32 REGPARAM2 op_0050_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s16 dst = get_word_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.W #<data>.W,(An)+ */
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uae_u32 REGPARAM2 op_0058_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s16 dst = get_word_jit(dsta);
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m68k_areg(regs, dstreg) += 2;
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.W #<data>.W,-(An) */
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uae_u32 REGPARAM2 op_0060_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) - 2;
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uae_s16 dst = get_word_jit(dsta);
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m68k_areg(regs, dstreg) = dsta;
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.W #<data>.W,(d16,An) */
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uae_u32 REGPARAM2 op_0068_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
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uae_s16 dst = get_word_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.W #<data>.W,(d8,An,Xn) */
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uae_u32 REGPARAM2 op_0070_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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m68k_incpc(4);
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dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
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uae_s16 dst = get_word_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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return 0;
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}
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/* 4 2,0 */
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/* OR.W #<data>.W,(xxx).W */
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uae_u32 REGPARAM2 op_0078_40_ff(uae_u32 opcode)
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{
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = (uae_s32)(uae_s16)get_diword(4);
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uae_s16 dst = get_word_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.W #<data>.W,(xxx).L */
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uae_u32 REGPARAM2 op_0079_40_ff(uae_u32 opcode)
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{
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uae_s16 src = get_diword(2);
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uaecptr dsta;
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dsta = get_dilong(4);
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uae_s16 dst = get_word_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s16)(src)) == 0);
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SET_NFLG(((uae_s16)(src)) < 0);
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put_word_jit(dsta, src);
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m68k_incpc(8);
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return 0;
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}
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/* 8 0,0 */
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/* ORSR.W #<data>.W */
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uae_u32 REGPARAM2 op_007c_40_ff(uae_u32 opcode)
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{
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if (!regs.s) {
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Exception(8);
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return 0;
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}
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MakeSR();
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uae_s16 src = get_diword(2);
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if(regs.t0) check_t0_trace();
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regs.sr |= src;
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MakeFromSR();
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* OR.L #<data>.L,Dn */
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uae_u32 REGPARAM2 op_0080_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
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src = get_dilong(2);
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uae_s32 dst = m68k_dreg(regs, dstreg);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s32)(src)) == 0);
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SET_NFLG(((uae_s32)(src)) < 0);
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m68k_dreg(regs, dstreg) = (src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.L #<data>.L,(An) */
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uae_u32 REGPARAM2 op_0090_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
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src = get_dilong(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s32 dst = get_long_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s32)(src)) == 0);
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SET_NFLG(((uae_s32)(src)) < 0);
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put_long_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.L #<data>.L,(An)+ */
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uae_u32 REGPARAM2 op_0098_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
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src = get_dilong(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg);
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uae_s32 dst = get_long_jit(dsta);
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m68k_areg(regs, dstreg) += 4;
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s32)(src)) == 0);
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SET_NFLG(((uae_s32)(src)) < 0);
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put_long_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.L #<data>.L,-(An) */
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uae_u32 REGPARAM2 op_00a0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
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src = get_dilong(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) - 4;
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uae_s32 dst = get_long_jit(dsta);
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m68k_areg(regs, dstreg) = dsta;
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s32)(src)) == 0);
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SET_NFLG(((uae_s32)(src)) < 0);
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put_long_jit(dsta, src);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* OR.L #<data>.L,(d16,An) */
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uae_u32 REGPARAM2 op_00a8_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
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src = get_dilong(2);
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uaecptr dsta;
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dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
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uae_s32 dst = get_long_jit(dsta);
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src |= dst;
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CLEAR_CZNV();
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SET_ZFLG(((uae_s32)(src)) == 0);
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SET_NFLG(((uae_s32)(src)) < 0);
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put_long_jit(dsta, src);
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m68k_incpc(8);
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return 0;
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}
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/* 8 0,0 */
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/* OR.L #<data>.L,(d8,An,Xn) */
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uae_u32 REGPARAM2 op_00b0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 dstreg = real_opcode & 7;
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uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* OR.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_00b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* OR.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_00b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* CHK2.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
m68k_incpc(4);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
m68k_incpc(8);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.B #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_00fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s8)get_byte_jit(dsta);
|
|
upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BTST.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_0100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte_jit(mempa) & 0xff) << 8;
|
|
val |= (get_byte_jit(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BTST.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BTST.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_0120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BTST.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* BTST.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BTST.B Dn,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_013a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = 2;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 2;
|
|
dsta += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B Dn,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_013b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = 3;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* BTST.B Dn,#<data>.B */
|
|
uae_u32 REGPARAM2 op_013c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = get_dibyte(2);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_0140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte_jit(mempa) & 0xff) << 24;
|
|
val |= (get_byte_jit(mempa + 2) & 0xff) << 16;
|
|
val |= (get_byte_jit(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte_jit(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCHG.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCHG.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_0160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCHG.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* BCHG.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_0180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte_jit(mempa, src >> 8);
|
|
put_byte_jit(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSET.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_01c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte_jit(mempa, src >> 24);
|
|
put_byte_jit(mempa + 2, src >> 16);
|
|
put_byte_jit(mempa + 4, src >> 8);
|
|
put_byte_jit(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_01d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BSET.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_01d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BSET.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BSET.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* BSET.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_0200_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_0210_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_0218_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_0220_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0228_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0230_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* AND.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0238_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0239_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_40_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0240_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0250_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0258_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0260_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0268_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0270_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* AND.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0278_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0279_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_0290_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_0298_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_02a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_02a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* AND.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_02b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* AND.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_02b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* AND.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_02b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* CHK2.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
m68k_incpc(4);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
m68k_incpc(8);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.W #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_02fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = (uae_s32)(uae_s16)get_word_jit(dsta);
|
|
upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2);
|
|
if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* SUB.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_0400_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_0410_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_0418_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_0420_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0428_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0430_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* SUB.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0438_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0439_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* SUB.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0440_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0450_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0458_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0460_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0468_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0470_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* SUB.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0478_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0479_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_0490_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_0498_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_04a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_04a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* SUB.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_04b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* SUB.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_04b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* SUB.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_04b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* CHK2.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
m68k_incpc(4);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
m68k_incpc(8);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
m68k_incpc(6);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK2.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_04fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];
|
|
lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4);
|
|
SET_CFLG(0);
|
|
SET_ZFLG(0);
|
|
setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2);
|
|
if(upper == reg || lower == reg) {
|
|
SET_ZFLG(1);
|
|
}else{
|
|
if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1);
|
|
if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1);
|
|
}
|
|
if ((extra & 0x800) && GET_CFLG()) {
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* ADD.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_0600_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_0610_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_0618_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_0620_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0628_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0630_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* ADD.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0638_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0639_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ADD.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0640_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0650_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0658_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0660_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0668_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0670_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* ADD.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0678_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0679_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_0690_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_0698_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_06a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_06a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ADD.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_06b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* ADD.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_06b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* ADD.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_06b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* RTM.L Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* RTM.L An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06f8_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06f9_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06fa_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CALLM.L (d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_06fb_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* BTST.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0800_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0810_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0818_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0820_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0828_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0830_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* BTST.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0838_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0839_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_083a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BTST.B #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_083b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* BCHG.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0840_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0850_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0858_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0860_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0868_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0870_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* BCHG.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0878_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0879_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* BCLR.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0880_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* BSET.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_08c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_08d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_08d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* BSET.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_0a00_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_0a10_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_0a18_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_0a20_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0a28_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0a30_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* EOR.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0a38_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0a39_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_40_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0a40_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0a50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0a58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0a60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0a68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0a70_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* EOR.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0a78_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0a79_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_0a90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_0a98_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_0aa0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0aa8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0ab0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* EOR.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0ab8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0ab9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* CAS.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CMP.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_0c00_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_0c10_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_0c18_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_0c20_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0c28_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0c30_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* CMP.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0c38_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0c39_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* CMP.B #<data>.B,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0c3a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CMP.B #<data>.B,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0c3b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CMP.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0c40_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0c50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0c58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_0c60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0c68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0c70_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* CMP.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0c78_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0c79_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* CMP.W #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0c7a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CMP.W #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0c7b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CMP.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0c80_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_0c90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_0c98_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_0ca0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0ca8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0cb0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* CMP.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_0cb8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_0cb9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* CMP.L #<data>.L,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 6;
|
|
dsta += (uae_s32)(uae_s16)get_diword(6);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CMP.L #<data>.L,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cbb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(6);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 12 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(6);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 12 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(8);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 16 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.W #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cfc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2);
|
|
uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst1)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst2)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff);
|
|
m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e10_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e18_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e20_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e28_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e30_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e38_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e39_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e70_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_word(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e78_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e79_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e98_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_long(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb8_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb9_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(4);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(6);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 12 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(6);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 12 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) {
|
|
m68k_incpc(8);
|
|
op_unimpl (opcode);
|
|
return 0;
|
|
}
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 16 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.L #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0efc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2);
|
|
uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst1)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst2)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 16) & 7) = dst1;
|
|
m68k_dreg(regs, (extra >> 0) & 7) = dst2;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVE.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_1000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_1010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_1018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_1020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_1028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_1030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_1038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_1039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_103a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_103b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_103c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_1080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An),(An) */
|
|
uae_u32 REGPARAM2 op_1090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An)+,(An) */
|
|
uae_u32 REGPARAM2 op_1098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B -(An),(An) */
|
|
uae_u32 REGPARAM2 op_10a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (d16,An),(An) */
|
|
uae_u32 REGPARAM2 op_10a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_10b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (xxx).W,(An) */
|
|
uae_u32 REGPARAM2 op_10b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,(An) */
|
|
uae_u32 REGPARAM2 op_10b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),(An) */
|
|
uae_u32 REGPARAM2 op_10ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_10bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B #<data>.B,(An) */
|
|
uae_u32 REGPARAM2 op_10bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_10c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An),(An)+ */
|
|
uae_u32 REGPARAM2 op_10d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_10d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B -(An),(An)+ */
|
|
uae_u32 REGPARAM2 op_10e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (d16,An),(An)+ */
|
|
uae_u32 REGPARAM2 op_10e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_10f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (xxx).W,(An)+ */
|
|
uae_u32 REGPARAM2 op_10f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,(An)+ */
|
|
uae_u32 REGPARAM2 op_10f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),(An)+ */
|
|
uae_u32 REGPARAM2 op_10fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_10fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B #<data>.B,(An)+ */
|
|
uae_u32 REGPARAM2 op_10fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_1100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An),-(An) */
|
|
uae_u32 REGPARAM2 op_1110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (An)+,-(An) */
|
|
uae_u32 REGPARAM2 op_1118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_1120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.B (d16,An),-(An) */
|
|
uae_u32 REGPARAM2 op_1128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_1130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (xxx).W,-(An) */
|
|
uae_u32 REGPARAM2 op_1138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,-(An) */
|
|
uae_u32 REGPARAM2 op_1139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),-(An) */
|
|
uae_u32 REGPARAM2 op_113a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_113b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B #<data>.B,-(An) */
|
|
uae_u32 REGPARAM2 op_113c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_1140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_1150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (An)+,(d16,An) */
|
|
uae_u32 REGPARAM2 op_1158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B -(An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_1160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d16,An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_1168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_1170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (xxx).W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_1178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_1179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),(d16,An) */
|
|
uae_u32 REGPARAM2 op_117a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_117b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B #<data>.B,(d16,An) */
|
|
uae_u32 REGPARAM2 op_117c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.B (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.B (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.B (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* MOVE.B (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_11c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (An)+,(xxx).W */
|
|
uae_u32 REGPARAM2 op_11d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B -(An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.B (d16,An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (xxx).W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_11f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_11f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B #<data>.B,(xxx).W */
|
|
uae_u32 REGPARAM2 op_11fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_13c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (An)+,(xxx).L */
|
|
uae_u32 REGPARAM2 op_13d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B -(An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.B (d16,An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B (xxx).W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_13f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.B (xxx).L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_13f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* MOVE.B (d16,PC),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B #<data>.B,(xxx).L */
|
|
uae_u32 REGPARAM2 op_13fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_2000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L An,Dn */
|
|
uae_u32 REGPARAM2 op_2008_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_2010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_2018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_2020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_2028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_2030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_2038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_2039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_203a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_203b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_203c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVEA.L Dn,An */
|
|
uae_u32 REGPARAM2 op_2040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.L An,An */
|
|
uae_u32 REGPARAM2 op_2048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.L (An),An */
|
|
uae_u32 REGPARAM2 op_2050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.L (An)+,An */
|
|
uae_u32 REGPARAM2 op_2058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.L -(An),An */
|
|
uae_u32 REGPARAM2 op_2060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.L (d16,An),An */
|
|
uae_u32 REGPARAM2 op_2068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_2070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVEA.L (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_2078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_2079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVEA.L (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_207a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_207b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVEA.L #<data>.L,An */
|
|
uae_u32 REGPARAM2 op_207c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_2080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L An,(An) */
|
|
uae_u32 REGPARAM2 op_2088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An),(An) */
|
|
uae_u32 REGPARAM2 op_2090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An)+,(An) */
|
|
uae_u32 REGPARAM2 op_2098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L -(An),(An) */
|
|
uae_u32 REGPARAM2 op_20a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (d16,An),(An) */
|
|
uae_u32 REGPARAM2 op_20a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_20b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (xxx).W,(An) */
|
|
uae_u32 REGPARAM2 op_20b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,(An) */
|
|
uae_u32 REGPARAM2 op_20b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),(An) */
|
|
uae_u32 REGPARAM2 op_20ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_20bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L #<data>.L,(An) */
|
|
uae_u32 REGPARAM2 op_20bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_20c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L An,(An)+ */
|
|
uae_u32 REGPARAM2 op_20c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An),(An)+ */
|
|
uae_u32 REGPARAM2 op_20d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_20d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L -(An),(An)+ */
|
|
uae_u32 REGPARAM2 op_20e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (d16,An),(An)+ */
|
|
uae_u32 REGPARAM2 op_20e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_20f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (xxx).W,(An)+ */
|
|
uae_u32 REGPARAM2 op_20f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,(An)+ */
|
|
uae_u32 REGPARAM2 op_20f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),(An)+ */
|
|
uae_u32 REGPARAM2 op_20fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_20fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L #<data>.L,(An)+ */
|
|
uae_u32 REGPARAM2 op_20fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_2100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L An,-(An) */
|
|
uae_u32 REGPARAM2 op_2108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An),-(An) */
|
|
uae_u32 REGPARAM2 op_2110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (An)+,-(An) */
|
|
uae_u32 REGPARAM2 op_2118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_2120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.L (d16,An),-(An) */
|
|
uae_u32 REGPARAM2 op_2128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_2130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (xxx).W,-(An) */
|
|
uae_u32 REGPARAM2 op_2138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,-(An) */
|
|
uae_u32 REGPARAM2 op_2139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),-(An) */
|
|
uae_u32 REGPARAM2 op_213a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_213b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L #<data>.L,-(An) */
|
|
uae_u32 REGPARAM2 op_213c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_2140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L An,(d16,An) */
|
|
uae_u32 REGPARAM2 op_2148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_2150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (An)+,(d16,An) */
|
|
uae_u32 REGPARAM2 op_2158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L -(An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_2160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d16,An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_2168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_2170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (xxx).W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_2178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_2179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),(d16,An) */
|
|
uae_u32 REGPARAM2 op_217a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_217b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L #<data>.L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_217c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L An,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.L (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.L (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.L (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* MOVE.L (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* MOVE.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L An,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (An)+,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L -(An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.L (d16,An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (xxx).W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L #<data>.L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_21fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L An,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (An)+,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L -(An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.L (d16,An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L (xxx).W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L (xxx).L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* MOVE.L (d16,PC),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L #<data>.L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_23fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* MOVE.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_3000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W An,Dn */
|
|
uae_u32 REGPARAM2 op_3008_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_3010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_3018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_3020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_3028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_3030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_3038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_3039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_303a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_303b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_303c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.W Dn,An */
|
|
uae_u32 REGPARAM2 op_3040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.W An,An */
|
|
uae_u32 REGPARAM2 op_3048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.W (An),An */
|
|
uae_u32 REGPARAM2 op_3050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.W (An)+,An */
|
|
uae_u32 REGPARAM2 op_3058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.W -(An),An */
|
|
uae_u32 REGPARAM2 op_3060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVEA.W (d16,An),An */
|
|
uae_u32 REGPARAM2 op_3068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_3070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVEA.W (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_3078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.W (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_3079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVEA.W (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_307a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVEA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_307b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVEA.W #<data>.W,An */
|
|
uae_u32 REGPARAM2 op_307c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_3080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W An,(An) */
|
|
uae_u32 REGPARAM2 op_3088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An),(An) */
|
|
uae_u32 REGPARAM2 op_3090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An)+,(An) */
|
|
uae_u32 REGPARAM2 op_3098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W -(An),(An) */
|
|
uae_u32 REGPARAM2 op_30a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (d16,An),(An) */
|
|
uae_u32 REGPARAM2 op_30a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_30b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (xxx).W,(An) */
|
|
uae_u32 REGPARAM2 op_30b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,(An) */
|
|
uae_u32 REGPARAM2 op_30b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),(An) */
|
|
uae_u32 REGPARAM2 op_30ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_30bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_30bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_30c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W An,(An)+ */
|
|
uae_u32 REGPARAM2 op_30c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An),(An)+ */
|
|
uae_u32 REGPARAM2 op_30d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_30d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W -(An),(An)+ */
|
|
uae_u32 REGPARAM2 op_30e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (d16,An),(An)+ */
|
|
uae_u32 REGPARAM2 op_30e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_30f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (xxx).W,(An)+ */
|
|
uae_u32 REGPARAM2 op_30f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,(An)+ */
|
|
uae_u32 REGPARAM2 op_30f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),(An)+ */
|
|
uae_u32 REGPARAM2 op_30fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_30fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_30fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_3100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W An,-(An) */
|
|
uae_u32 REGPARAM2 op_3108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An),-(An) */
|
|
uae_u32 REGPARAM2 op_3110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (An)+,-(An) */
|
|
uae_u32 REGPARAM2 op_3118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_3120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MOVE.W (d16,An),-(An) */
|
|
uae_u32 REGPARAM2 op_3128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_3130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (xxx).W,-(An) */
|
|
uae_u32 REGPARAM2 op_3138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,-(An) */
|
|
uae_u32 REGPARAM2 op_3139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),-(An) */
|
|
uae_u32 REGPARAM2 op_313a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_313b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_313c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_3140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W An,(d16,An) */
|
|
uae_u32 REGPARAM2 op_3148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_3150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (An)+,(d16,An) */
|
|
uae_u32 REGPARAM2 op_3158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W -(An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_3160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d16,An),(d16,An) */
|
|
uae_u32 REGPARAM2 op_3168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_3170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (xxx).W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_3178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,(d16,An) */
|
|
uae_u32 REGPARAM2 op_3179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),(d16,An) */
|
|
uae_u32 REGPARAM2 op_317a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_317b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_317c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W An,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MOVE.W (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.W (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.W (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(6);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 6 2,0 */
|
|
|
|
/* MOVE.W (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,2 */
|
|
|
|
/* MOVE.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MOVE.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W An,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (An)+,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W -(An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MOVE.W (d16,An),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (xxx).W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_31fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W An,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (An)+,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W -(An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MOVE.W (d16,An),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W (xxx).W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.W (xxx).L,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(6);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(10);
|
|
return 0;
|
|
}
|
|
/* 10 0,0 */
|
|
|
|
/* MOVE.W (d16,PC),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_33fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* NEGX.B Dn */
|
|
uae_u32 REGPARAM2 op_4000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.B (An) */
|
|
uae_u32 REGPARAM2 op_4010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.B -(An) */
|
|
uae_u32 REGPARAM2 op_4020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEGX.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4038_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4039_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NEGX.W Dn */
|
|
uae_u32 REGPARAM2 op_4040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.W (An) */
|
|
uae_u32 REGPARAM2 op_4050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.W -(An) */
|
|
uae_u32 REGPARAM2 op_4060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEGX.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4078_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4079_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NEGX.L Dn */
|
|
uae_u32 REGPARAM2 op_4080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, srcreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.L (An) */
|
|
uae_u32 REGPARAM2 op_4090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.L -(An) */
|
|
uae_u32 REGPARAM2 op_40a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEGX.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_40a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEGX.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_40b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEGX.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_40b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CHK.L Dn,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (An),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (An)+,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L -(An),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (d16,An),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (d8,An,Xn),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* CHK.L (xxx).W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (xxx).L,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(6);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (d16,PC),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_413a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CHK.L (d8,PC,Xn),Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_413b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* CHK.L #<data>.L,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_413c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(6);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 2);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 2);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CHK.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_4180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CHK.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_4190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CHK.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_4198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CHK.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_41a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(2);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CHK.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_41a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CHK.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_41b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CHK.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_41b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CHK.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_41b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(6);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CHK.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_41ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CHK.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_41bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CHK.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_41bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LEA.L (An),An */
|
|
uae_u32 REGPARAM2 op_41d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LEA.L (d16,An),An */
|
|
uae_u32 REGPARAM2 op_41e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LEA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_41f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* LEA.L (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_41f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_41fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LEA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_41fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.B Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B -(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MVSR2.B (xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* NEG.B Dn */
|
|
uae_u32 REGPARAM2 op_4400_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.B (An) */
|
|
uae_u32 REGPARAM2 op_4410_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4418_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.B -(An) */
|
|
uae_u32 REGPARAM2 op_4420_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4428_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4430_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEG.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4438_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4439_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NEG.W Dn */
|
|
uae_u32 REGPARAM2 op_4440_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.W (An) */
|
|
uae_u32 REGPARAM2 op_4450_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4458_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.W -(An) */
|
|
uae_u32 REGPARAM2 op_4460_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4468_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4470_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEG.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4478_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4479_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NEG.L Dn */
|
|
uae_u32 REGPARAM2 op_4480_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.L (An) */
|
|
uae_u32 REGPARAM2 op_4490_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4498_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.L -(An) */
|
|
uae_u32 REGPARAM2 op_44a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NEG.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_44a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NEG.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_44b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NEG.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_44b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.B Dn */
|
|
uae_u32 REGPARAM2 op_4600_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.B (An) */
|
|
uae_u32 REGPARAM2 op_4610_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4618_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.B -(An) */
|
|
uae_u32 REGPARAM2 op_4620_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4628_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4630_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NOT.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4638_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4639_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NOT.W Dn */
|
|
uae_u32 REGPARAM2 op_4640_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.W (An) */
|
|
uae_u32 REGPARAM2 op_4650_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4658_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.W -(An) */
|
|
uae_u32 REGPARAM2 op_4660_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4668_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4670_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NOT.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4678_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4679_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* NOT.L Dn */
|
|
uae_u32 REGPARAM2 op_4680_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.L (An) */
|
|
uae_u32 REGPARAM2 op_4690_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4698_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.L -(An) */
|
|
uae_u32 REGPARAM2 op_46a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOT.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_46a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NOT.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_46b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NOT.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_46b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B Dn */
|
|
uae_u32 REGPARAM2 op_4800_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LINK.L An,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4808_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr olda;
|
|
olda = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = olda;
|
|
uae_s32 offs;
|
|
offs = get_dilong(2);
|
|
put_long_jit(olda, src);
|
|
m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
|
|
m68k_areg(regs, 7) += offs;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* NBCD.B (An) */
|
|
uae_u32 REGPARAM2 op_4810_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4818_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B -(An) */
|
|
uae_u32 REGPARAM2 op_4820_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4828_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4830_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NBCD.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4838_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4839_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SWAP.W Dn */
|
|
uae_u32 REGPARAM2 op_4840_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BKPTQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4848_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
op_illg(opcode);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* PEA.L (An) */
|
|
uae_u32 REGPARAM2 op_4850_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* PEA.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4868_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* PEA.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4870_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* PEA.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4878_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* PEA.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4879_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* PEA.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_487a_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* PEA.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_487b_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
put_long_jit(dsta, srca);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* EXT.W Dn */
|
|
uae_u32 REGPARAM2 op_4880_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u16 dst = (uae_s16)(uae_s8)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4890_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 1;
|
|
while (amask) {
|
|
srca -= 2;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 2;
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EXT.L Dn */
|
|
uae_u32 REGPARAM2 op_48c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_48d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 1;
|
|
while (amask) {
|
|
srca -= 4;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 4;
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EXT.B Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_49c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_u32 dst = (uae_s32)(uae_s8)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* TST.B Dn */
|
|
uae_u32 REGPARAM2 op_4a00_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.B (An) */
|
|
uae_u32 REGPARAM2 op_4a10_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4a18_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.B -(An) */
|
|
uae_u32 REGPARAM2 op_4a20_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4a28_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4a30_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* TST.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4a38_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4a39_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TST.B (d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a3a_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TST.B (d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a3b_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* TST.B #<data>.B */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a3c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s8 src = get_dibyte(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TST.W Dn */
|
|
uae_u32 REGPARAM2 op_4a40_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.W An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a48_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* TST.W (An) */
|
|
uae_u32 REGPARAM2 op_4a50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4a58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.W -(An) */
|
|
uae_u32 REGPARAM2 op_4a60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4a68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4a70_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* TST.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4a78_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4a79_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TST.W (d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a7a_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TST.W (d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a7b_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* TST.W #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a7c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TST.L Dn */
|
|
uae_u32 REGPARAM2 op_4a80_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.L An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4a88_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* TST.L (An) */
|
|
uae_u32 REGPARAM2 op_4a90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4a98_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.L -(An) */
|
|
uae_u32 REGPARAM2 op_4aa0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TST.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4aa8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ab0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* TST.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ab8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TST.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ab9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TST.L (d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4aba_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TST.L (d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4abb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
#endif
|
|
/* TST.L #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4abc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* HALT.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4ac8_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
cpu_halt(CPU_HALT_68060_HALT);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* PULSE.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4acc_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULL.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c00_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c10_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(4);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c18_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
m68k_incpc(4);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c20_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
m68k_incpc(4);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c28_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c30_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c38_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c39_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(8);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c3a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c3b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* MULL.L #<data>.W,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c3c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uae_s32 dst;
|
|
dst = get_dilong(4);
|
|
m68k_incpc(8);
|
|
int e = m68k_mull(opcode, dst, extra);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c40_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(4);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
m68k_incpc(4);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
m68k_incpc(4);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c70_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c78_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c79_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(8);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c7a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_incpc(6);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c7b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* DIVL.L #<data>.W,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4c7c_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 extra = get_diword(2);
|
|
uae_s32 dst;
|
|
dst = get_dilong(4);
|
|
m68k_incpc(8);
|
|
int e = m68k_divl(opcode, dst, extra, oldpc);
|
|
if (e <= 0) {
|
|
if (e < 0) {
|
|
op_unimpl(opcode);
|
|
}
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MVMEL.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4c90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4c98_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ca8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cb0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cb8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cb9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cbb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4cd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4cd8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ce8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* TRAPQ.L #<data> */
|
|
uae_u32 REGPARAM2 op_4e40_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 15);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(src + 32,oldpc);
|
|
return 0;
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LINK.W An,#<data>.W */
|
|
uae_u32 REGPARAM2 op_4e50_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr olda;
|
|
olda = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = olda;
|
|
uae_s16 offs = get_diword(2);
|
|
put_long_jit(olda, src);
|
|
m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
|
|
m68k_areg(regs, 7) += offs;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* UNLK.L An */
|
|
uae_u32 REGPARAM2 op_4e58_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_u32 olda = src;
|
|
uae_s32 old = get_long_jit(olda);
|
|
m68k_areg(regs, 7) = src + 4;
|
|
m68k_areg(regs, srcreg) = (old);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RESET.L */
|
|
uae_u32 REGPARAM2 op_4e70_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
bool r = cpureset();
|
|
if (r) {
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOP.L */
|
|
uae_u32 REGPARAM2 op_4e71_40_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.ir = src;
|
|
}
|
|
uae_u16 sr = regs.ir;
|
|
if (!(sr & 0x2000)) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
regs.sr = sr;
|
|
checkint();
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 oldsr = regs.sr, newsr;
|
|
uae_u32 newpc;
|
|
for (;;) {
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
uae_u32 pc = get_long_jit(a + 2);
|
|
uae_u16 format = get_word_jit(a + 2 + 4);
|
|
int frame = format >> 12;
|
|
int offset = 8;
|
|
newsr = sr; newpc = pc;
|
|
if (frame == 0x0) {
|
|
m68k_areg(regs, 7) += offset; break; }
|
|
else if (frame == 0x1) {
|
|
m68k_areg(regs, 7) += offset; }
|
|
else if (frame == 0x2) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x3) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x4) {
|
|
m68k_areg(regs, 7) += offset + 8; break; }
|
|
else {
|
|
Exception_cpu_oldpc(14,oldpc);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
oldsr = newsr;
|
|
MakeFromSR_T0();
|
|
}
|
|
regs.sr = newsr;
|
|
MakeFromSR_T0();
|
|
if (newpc & 1) {
|
|
regs.sr = oldsr & 0xff00;
|
|
MakeFromSR();
|
|
SET_ZFLG(newsr == 0);
|
|
SET_NFLG(newsr & 0x8000);
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(newpc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTD.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e74_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
uae_s16 offs = get_diword(2);
|
|
m68k_areg(regs, 7) += offs;
|
|
if (pc & 1) {
|
|
m68k_areg(regs, 7) -= 4 + offs;
|
|
exception3_read_prefetch_only(opcode, pc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(pc);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
#endif
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
if (pc & 1) {
|
|
m68k_areg(regs, 7) -= 6;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
exception3_read_prefetch(opcode, pc);
|
|
return 0;
|
|
}
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* MOVEC2.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e7a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int regno = (src >> 12) & 15;
|
|
uae_u32 *regp = regs.regs + regno;
|
|
if (!m68k_movec2(src & 0xFFF, regp)) {
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVE2C.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e7b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int regno = (src >> 12) & 15;
|
|
uae_u32 *regp = regs.regs + regno;
|
|
if (!m68k_move2c(src & 0xFFF, regp)) {
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 0;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 0;
|
|
m68k_setpc_j(srca);
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
|
|
m68k_areg(regs, 7) -= 4;
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* ADDQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.B #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.B #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.B #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_5020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.B #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_5028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.B #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDQ.B #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_5038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.B #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_5039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDAQ.W #<data>,An */
|
|
uae_u32 REGPARAM2 op_5048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.W #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.W #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.W #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_5060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.W #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_5068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.W #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDQ.W #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_5078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.W #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_5079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDAQ.L #<data>,An */
|
|
uae_u32 REGPARAM2 op_5088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.L #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.L #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.L #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_50a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDQ.L #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_50a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.L #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_50b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDQ.L #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_50b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDQ.L #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_50b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (T) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_50fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(0)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (T) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_50fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(0)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (T) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_50fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(0)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* SUBQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.B #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.B #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.B #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_5120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.B #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_5128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.B #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBQ.B #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_5138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.B #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_5139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBAQ.W #<data>,An */
|
|
uae_u32 REGPARAM2 op_5148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.W #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.W #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.W #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_5160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.W #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_5168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.W #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBQ.W #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_5178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.W #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_5179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBAQ.L #<data>,An */
|
|
uae_u32 REGPARAM2 op_5188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.L #<data>,(An) */
|
|
uae_u32 REGPARAM2 op_5190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.L #<data>,(An)+ */
|
|
uae_u32 REGPARAM2 op_5198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.L #<data>,-(An) */
|
|
uae_u32 REGPARAM2 op_51a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBQ.L #<data>,(d16,An) */
|
|
uae_u32 REGPARAM2 op_51a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.L #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_51b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBQ.L #<data>,(xxx).W */
|
|
uae_u32 REGPARAM2 op_51b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBQ.L #<data>,(xxx).L */
|
|
uae_u32 REGPARAM2 op_51b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (F) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_51fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(1)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (F) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_51fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(1)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (F) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_51fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(1)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (HI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_52fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(2)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (HI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_52fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(2)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (HI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_52fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(2)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (LS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_53fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(3)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (LS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_53fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(3)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (LS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_53fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(3)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (CC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_54fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(4)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (CC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_54fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(4)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (CC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_54fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(4)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (CS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_55fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(5)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (CS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_55fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(5)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (CS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_55fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(5)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (NE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_56fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(6)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (NE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_56fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(6)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (NE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_56fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(6)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (EQ) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_57fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(7)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (EQ) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_57fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(7)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (EQ) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_57fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(7)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (VC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_58fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(8)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (VC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_58fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(8)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (VC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_58fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(8)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (VS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_59fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(9)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (VS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_59fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(9)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (VS) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_59fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(9)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (PL) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5afa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(10)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (PL) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5afb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(10)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (PL) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5afc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(10)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (MI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5bfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(11)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (MI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5bfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(11)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (MI) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5bfc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(11)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (GE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5cfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(12)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (GE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5cfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(12)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (GE) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5cfc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(12)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (LT) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5dfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 dummy = get_diword(2);
|
|
m68k_incpc(4);
|
|
if (cctrue(13)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L #<data>.L (LT) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5dfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(2);
|
|
m68k_incpc(6);
|
|
if (cctrue(13)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* TRAPcc.L (LT) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_5dfc_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (cctrue(13)) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
#endif
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
|
|
return 0;
|
|
}
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* TRAPcc.L #<data>.W (GT) */
|
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5efa_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s16 dummy = get_diword(2);
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m68k_incpc(4);
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if (cctrue(14)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 4 0,0 */
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#endif
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/* TRAPcc.L #<data>.L (GT) */
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5efb_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s32 dummy;
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dummy = get_dilong(2);
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m68k_incpc(6);
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if (cctrue(14)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 6 0,0 */
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#endif
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/* TRAPcc.L (GT) */
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5efc_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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m68k_incpc(2);
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if (cctrue(14)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 2 0,0 */
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#endif
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/* Scc.B Dn (LE) */
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uae_u32 REGPARAM2 op_5fc0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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int val = cctrue(15) ? 0xff : 0x00;
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m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
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m68k_incpc(2);
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return 0;
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}
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/* 2 0,0 */
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/* DBcc.W Dn,#<data>.W (LE) */
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uae_u32 REGPARAM2 op_5fc8_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uae_s16 src = m68k_dreg(regs, srcreg);
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uae_s16 offs = get_diword(2);
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uaecptr oldpc = m68k_getpc();
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if (offs & 1) {
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exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);
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return 0;
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}
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if (!cctrue(15)) {
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m68k_incpc((uae_s32)offs + 2);
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m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
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if (src) {
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if(regs.t0) check_t0_trace();
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return 0;
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}
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}
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m68k_setpc_j(oldpc + 4);
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return 0;
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}
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/* 4 0,0 B */
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/* Scc.B (An) (LE) */
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uae_u32 REGPARAM2 op_5fd0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uaecptr srca;
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srca = m68k_areg(regs, srcreg);
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(2);
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return 0;
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}
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/* 2 0,0 */
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/* Scc.B (An)+ (LE) */
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uae_u32 REGPARAM2 op_5fd8_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uaecptr srca;
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srca = m68k_areg(regs, srcreg);
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m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(2);
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return 0;
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}
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/* 2 0,0 */
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/* Scc.B -(An) (LE) */
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uae_u32 REGPARAM2 op_5fe0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uaecptr srca;
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srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
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m68k_areg(regs, srcreg) = srca;
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(2);
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return 0;
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}
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/* 2 0,0 */
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/* Scc.B (d16,An) (LE) */
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uae_u32 REGPARAM2 op_5fe8_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uaecptr srca;
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srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* Scc.B (d8,An,Xn) (LE) */
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uae_u32 REGPARAM2 op_5ff0_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (real_opcode & 7);
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uaecptr srca;
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m68k_incpc(2);
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srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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return 0;
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}
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/* 2 2,0 */
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/* Scc.B (xxx).W (LE) */
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uae_u32 REGPARAM2 op_5ff8_40_ff(uae_u32 opcode)
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{
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uaecptr srca;
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srca = (uae_s32)(uae_s16)get_diword(2);
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 */
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/* Scc.B (xxx).L (LE) */
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uae_u32 REGPARAM2 op_5ff9_40_ff(uae_u32 opcode)
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{
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uaecptr srca;
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srca = get_dilong(2);
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int val = cctrue(15) ? 0xff : 0x00;
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put_byte_jit(srca, val);
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 */
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/* TRAPcc.L #<data>.W (LE) */
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5ffa_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s16 dummy = get_diword(2);
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m68k_incpc(4);
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if (cctrue(15)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 4 0,0 */
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#endif
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/* TRAPcc.L #<data>.L (LE) */
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5ffb_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s32 dummy;
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dummy = get_dilong(2);
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m68k_incpc(6);
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if (cctrue(15)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 6 0,0 */
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#endif
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/* TRAPcc.L (LE) */
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#ifndef CPUEMU_68000_ONLY
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uae_u32 REGPARAM2 op_5ffc_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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m68k_incpc(2);
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if (cctrue(15)) {
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Exception_cpu_oldpc(7,oldpc);
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return 0;
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}
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return 0;
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}
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/* 2 0,0 */
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#endif
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/* Bcc.W #<data>.W (T) */
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uae_u32 REGPARAM2 op_6000_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s16 src = get_diword(2);
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if (src & 1) {
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exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
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return 0;
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}
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if (cctrue(0)) {
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m68k_incpc((uae_s32)src + 2);
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if(regs.t0) check_t0_trace();
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return 0;
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}
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m68k_incpc(4);
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return 0;
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}
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/* 4 0,0 B */
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/* BccQ.B #<data> (T) */
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uae_u32 REGPARAM2 op_6001_40_ff(uae_u32 opcode)
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{
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uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
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uaecptr oldpc = m68k_getpc();
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uae_u32 src = srcreg;
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if (src & 1) {
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exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
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return 0;
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}
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if (cctrue(0)) {
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m68k_incpc((uae_s32)src + 2);
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if(regs.t0) check_t0_trace();
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return 0;
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}
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m68k_incpc(2);
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return 0;
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}
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/* 2 0,0 B */
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/* Bcc.L #<data>.L (T) */
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uae_u32 REGPARAM2 op_60ff_40_ff(uae_u32 opcode)
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{
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uaecptr oldpc = m68k_getpc();
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uae_s32 src;
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src = get_dilong(2);
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if (src & 1) {
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exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
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return 0;
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}
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if (cctrue(0)) {
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m68k_incpc((uae_s32)src + 2);
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if(regs.t0) check_t0_trace();
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return 0;
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}
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m68k_incpc(6);
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return 0;
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}
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/* 6 0,0 B */
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/* BSR.W #<data>.W */
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uae_u32 REGPARAM2 op_6100_40_ff(uae_u32 opcode)
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{
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uae_s32 s;
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uae_s16 src = get_diword(2);
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s = (uae_s32)src + 2;
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uaecptr oldpc = m68k_getpc();
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uaecptr nextpc = oldpc + 4;
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if (s & 1) {
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exception3_read_prefetch(opcode, oldpc + s);
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return 0;
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}
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m68k_do_bsr(nextpc, s);
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#ifdef DEBUGGER
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if (debugmem_trace) {
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branch_stack_push(oldpc, nextpc);
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}
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#endif
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if(regs.t0) check_t0_trace();
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return 0;
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}
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/* 4 0,0 B */
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/* BSRQ.B #<data> */
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uae_u32 REGPARAM2 op_6101_40_ff(uae_u32 opcode)
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{
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|
uae_u32 real_opcode = opcode;
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uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
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uae_s32 s;
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uae_u32 src = srcreg;
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s = (uae_s32)src + 2;
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uaecptr oldpc = m68k_getpc();
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uaecptr nextpc = oldpc + 2;
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if (s & 1) {
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|
exception3_read_prefetch(opcode, oldpc + s);
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return 0;
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|
}
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|
m68k_do_bsr(nextpc, s);
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|
#ifdef DEBUGGER
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|
if (debugmem_trace) {
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|
branch_stack_push(oldpc, nextpc);
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|
}
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|
#endif
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|
if(regs.t0) check_t0_trace();
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return 0;
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}
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/* 2 0,0 B */
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/* BSR.L #<data>.L */
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uae_u32 REGPARAM2 op_61ff_40_ff(uae_u32 opcode)
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|
{
|
|
uae_s32 s;
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|
uae_s32 src;
|
|
src = get_dilong(2);
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|
s = (uae_s32)src + 2;
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|
uaecptr oldpc = m68k_getpc();
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|
uaecptr nextpc = oldpc + 6;
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|
if (s & 1) {
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|
exception3_read_prefetch(opcode, oldpc + s);
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|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
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|
#ifdef DEBUGGER
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|
if (debugmem_trace) {
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|
branch_stack_push(oldpc, nextpc);
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|
}
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|
#endif
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|
if(regs.t0) check_t0_trace();
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|
return 0;
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}
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|
/* 6 0,0 B */
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/* Bcc.W #<data>.W (HI) */
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uae_u32 REGPARAM2 op_6200_40_ff(uae_u32 opcode)
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|
{
|
|
uaecptr oldpc = m68k_getpc();
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|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
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|
return 0;
|
|
}
|
|
if (cctrue(2)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
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|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
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|
|
|
/* BccQ.B #<data> (HI) */
|
|
uae_u32 REGPARAM2 op_6201_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(2)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (HI) */
|
|
uae_u32 REGPARAM2 op_62ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(2)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_6300_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(3)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LS) */
|
|
uae_u32 REGPARAM2 op_6301_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(3)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LS) */
|
|
uae_u32 REGPARAM2 op_63ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(3)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_6400_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(4)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CC) */
|
|
uae_u32 REGPARAM2 op_6401_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(4)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CC) */
|
|
uae_u32 REGPARAM2 op_64ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(4)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_6500_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(5)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CS) */
|
|
uae_u32 REGPARAM2 op_6501_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(5)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CS) */
|
|
uae_u32 REGPARAM2 op_65ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(5)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_6600_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(6)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (NE) */
|
|
uae_u32 REGPARAM2 op_6601_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(6)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (NE) */
|
|
uae_u32 REGPARAM2 op_66ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(6)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_6700_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(7)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (EQ) */
|
|
uae_u32 REGPARAM2 op_6701_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(7)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (EQ) */
|
|
uae_u32 REGPARAM2 op_67ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(7)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_6800_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(8)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VC) */
|
|
uae_u32 REGPARAM2 op_6801_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(8)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VC) */
|
|
uae_u32 REGPARAM2 op_68ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(8)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_6900_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(9)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VS) */
|
|
uae_u32 REGPARAM2 op_6901_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(9)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VS) */
|
|
uae_u32 REGPARAM2 op_69ff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(9)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_6a00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(10)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (PL) */
|
|
uae_u32 REGPARAM2 op_6a01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(10)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (PL) */
|
|
uae_u32 REGPARAM2 op_6aff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(10)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_6b00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(11)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (MI) */
|
|
uae_u32 REGPARAM2 op_6b01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(11)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (MI) */
|
|
uae_u32 REGPARAM2 op_6bff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(11)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_6c00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(12)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GE) */
|
|
uae_u32 REGPARAM2 op_6c01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(12)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GE) */
|
|
uae_u32 REGPARAM2 op_6cff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(12)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_6d00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(13)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LT) */
|
|
uae_u32 REGPARAM2 op_6d01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(13)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LT) */
|
|
uae_u32 REGPARAM2 op_6dff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(13)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_6e00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(14)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GT) */
|
|
uae_u32 REGPARAM2 op_6e01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(14)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GT) */
|
|
uae_u32 REGPARAM2 op_6eff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(14)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_6f00_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(15)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LE) */
|
|
uae_u32 REGPARAM2 op_6f01_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(15)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LE) */
|
|
uae_u32 REGPARAM2 op_6fff_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (src & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
if (cctrue(15)) {
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* MOVEQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_7000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_u32 src = srcreg;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_8010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_8020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_8028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_8030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_8038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_8039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_803a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_803b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_803c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_8050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_8060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_8068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_8070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_8078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_8079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_807a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_807b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_807c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVU.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_80c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_80d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_80d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(0);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* DIVU.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(6);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVU.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(0);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* DIVU.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_80fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SBCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SBCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_8108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_8110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_8118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_8120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_8128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_8130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_8138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_8139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* PACK.L Dn,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_8140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_u16 val = m68k_dreg(regs, srcreg) + get_diword(2);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* PACK.L -(An),-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_8148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_u16 val;
|
|
m68k_areg(regs, srcreg) -= 2;
|
|
val = (uae_u16)(get_word_jit(m68k_areg(regs, srcreg)));
|
|
val += get_diword(2);
|
|
m68k_areg(regs, dstreg) -= areg_byteinc[dstreg];
|
|
put_byte_jit(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* OR.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_8150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_8158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_8160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_8168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_8170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_8178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_8179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* UNPK.L Dn,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_8180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_u16 val = m68k_dreg(regs, srcreg);
|
|
val = ((val << 4) & 0xf00) | (val & 0xf);
|
|
val += get_diword(2);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* UNPK.L -(An),-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_8188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_u16 val;
|
|
m68k_areg(regs, srcreg) -= areg_byteinc[srcreg];
|
|
val = (uae_u16)(get_byte_jit(m68k_areg(regs, srcreg)) & 0xff);
|
|
val = (((val << 4) & 0xf00) | (val & 0xf)) + get_diword(2);
|
|
m68k_areg(regs, dstreg) -= 2;
|
|
put_word_jit(m68k_areg(regs, dstreg), val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* OR.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_8190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_8198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_81a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_81a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_81b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* OR.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_81b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_81b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVS.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_81c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_81d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_81d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_81e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_81e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_81f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(0);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* DIVS.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_81f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_81f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(6);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVS.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_81fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_81fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(0);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* DIVS.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_81fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_9010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_9020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_9028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_9030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_9038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_9039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_903a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_903b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_903c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W An,Dn */
|
|
uae_u32 REGPARAM2 op_9048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_9050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_9060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_9068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_9070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_9078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_9079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_907a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_907b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_907c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBA.W Dn,An */
|
|
uae_u32 REGPARAM2 op_90c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.W An,An */
|
|
uae_u32 REGPARAM2 op_90c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.W (An),An */
|
|
uae_u32 REGPARAM2 op_90d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.W (An)+,An */
|
|
uae_u32 REGPARAM2 op_90d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.W -(An),An */
|
|
uae_u32 REGPARAM2 op_90e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.W (d16,An),An */
|
|
uae_u32 REGPARAM2 op_90e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_90f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBA.W (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_90f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.W (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_90f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBA.W (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_90fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_90fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBA.W #<data>.W,An */
|
|
uae_u32 REGPARAM2 op_90fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_9110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_9118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_9120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_9128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_9130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_9138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_9139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_9150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_9158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_9160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_9168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_9170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_9178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_9179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_9190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_9198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_91a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_91a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_91b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUB.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_91b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_91b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBA.L Dn,An */
|
|
uae_u32 REGPARAM2 op_91c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.L An,An */
|
|
uae_u32 REGPARAM2 op_91c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.L (An),An */
|
|
uae_u32 REGPARAM2 op_91d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.L (An)+,An */
|
|
uae_u32 REGPARAM2 op_91d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.L -(An),An */
|
|
uae_u32 REGPARAM2 op_91e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBA.L (d16,An),An */
|
|
uae_u32 REGPARAM2 op_91e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_91f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBA.L (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_91f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_91f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBA.L (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_91fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUBA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_91fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* SUBA.L #<data>.L,An */
|
|
uae_u32 REGPARAM2 op_91fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_b010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_b018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_b020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_b028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_b038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_b039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_b03a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b03b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_b03c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.W An,Dn */
|
|
uae_u32 REGPARAM2 op_b048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_b050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_b058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_b060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_b068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_b078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_b079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_b07a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b07b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_b07c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.L An,Dn */
|
|
uae_u32 REGPARAM2 op_b088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_b090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_b098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_b0a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMP.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_b0a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b0b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_b0b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_b0b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMP.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_b0ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMP.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b0bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMP.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_b0bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMPA.W Dn,An */
|
|
uae_u32 REGPARAM2 op_b0c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.W An,An */
|
|
uae_u32 REGPARAM2 op_b0c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.W (An),An */
|
|
uae_u32 REGPARAM2 op_b0d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.W (An)+,An */
|
|
uae_u32 REGPARAM2 op_b0d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.W -(An),An */
|
|
uae_u32 REGPARAM2 op_b0e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.W (d16,An),An */
|
|
uae_u32 REGPARAM2 op_b0e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_b0f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMPA.W (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_b0f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.W (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_b0f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMPA.W (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_b0fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_b0fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMPA.W #<data>.W,An */
|
|
uae_u32 REGPARAM2 op_b0fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPM.B (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_b108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_b110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_b118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_b120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_b128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* EOR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_b138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_b139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPM.W (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_b148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_b150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_b158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_b160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_b168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* EOR.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_b178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_b179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPM.L (An)+,(An)+ */
|
|
uae_u32 REGPARAM2 op_b188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_b190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_b198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_b1a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_b1a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b1b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* EOR.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_b1b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_b1b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMPA.L Dn,An */
|
|
uae_u32 REGPARAM2 op_b1c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.L An,An */
|
|
uae_u32 REGPARAM2 op_b1c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.L (An),An */
|
|
uae_u32 REGPARAM2 op_b1d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.L (An)+,An */
|
|
uae_u32 REGPARAM2 op_b1d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.L -(An),An */
|
|
uae_u32 REGPARAM2 op_b1e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CMPA.L (d16,An),An */
|
|
uae_u32 REGPARAM2 op_b1e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_b1f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMPA.L (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_b1f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_b1f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CMPA.L (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_b1fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CMPA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_b1fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* CMPA.L #<data>.L,An */
|
|
uae_u32 REGPARAM2 op_b1fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_c010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c03a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c03b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_c03c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_c050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c07a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c07b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_c07c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULU.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c0c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_c0d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c0d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MULU.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULU.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MULU.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_c0fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ABCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ABCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_c108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_c110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_c118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_c120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_c128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_c138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_c139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EXG.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EXG.L An,An */
|
|
uae_u32 REGPARAM2 op_c148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, srcreg) = (dst);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_c150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_c158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_c160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_c168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_c178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_c179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* EXG.L Dn,An */
|
|
uae_u32 REGPARAM2 op_c188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
m68k_dreg(regs, srcreg) = (dst);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_c190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_c198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_c1a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_c1a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c1b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* AND.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_c1b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_c1b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULS.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c1c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_c1d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c1d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c1e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c1e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c1f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MULS.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c1f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c1f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULS.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c1fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c1fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* MULS.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_c1fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B (An),Dn */
|
|
uae_u32 REGPARAM2 op_d010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.B (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d039_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.B (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d03a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d03b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.B #<data>.B,Dn */
|
|
uae_u32 REGPARAM2 op_d03c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W An,Dn */
|
|
uae_u32 REGPARAM2 op_d048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_d050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d079_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d07a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d07b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_d07c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDA.W Dn,An */
|
|
uae_u32 REGPARAM2 op_d0c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.W An,An */
|
|
uae_u32 REGPARAM2 op_d0c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.W (An),An */
|
|
uae_u32 REGPARAM2 op_d0d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.W (An)+,An */
|
|
uae_u32 REGPARAM2 op_d0d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.W -(An),An */
|
|
uae_u32 REGPARAM2 op_d0e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.W (d16,An),An */
|
|
uae_u32 REGPARAM2 op_d0e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_d0f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDA.W (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_d0f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.W (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_d0f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDA.W (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_d0fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_d0fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDA.W #<data>.W,An */
|
|
uae_u32 REGPARAM2 op_d0fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_d110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_d118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_d120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_d128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_d138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_d139_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W Dn,(An) */
|
|
uae_u32 REGPARAM2 op_d150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_d158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_d160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_d168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.W Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_d178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.W Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_d179_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L Dn,(An) */
|
|
uae_u32 REGPARAM2 op_d190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_d198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_d1a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_d1a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d1b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
m68k_incpc(2);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADD.L Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_d1b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_d1b9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDA.L Dn,An */
|
|
uae_u32 REGPARAM2 op_d1c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.L An,An */
|
|
uae_u32 REGPARAM2 op_d1c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.L (An),An */
|
|
uae_u32 REGPARAM2 op_d1d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.L (An)+,An */
|
|
uae_u32 REGPARAM2 op_d1d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.L -(An),An */
|
|
uae_u32 REGPARAM2 op_d1e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDA.L (d16,An),An */
|
|
uae_u32 REGPARAM2 op_d1e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_d1f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDA.L (xxx).W,An */
|
|
uae_u32 REGPARAM2 op_d1f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_d1f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDA.L (d16,PC),An */
|
|
uae_u32 REGPARAM2 op_d1fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADDA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_d1fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ADDA.L #<data>.L,An */
|
|
uae_u32 REGPARAM2 op_d1fc_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ASRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80 & val) >> 7;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
val = 0xff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e008_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG((cnt == 8) & (val >> 7));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (7 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 7;
|
|
hival = val << (8 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xff;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80 & val) >> 7;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
val = 0xff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG((cnt == 8) & (val >> 7));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 36) cnt -= 36;
|
|
if (cnt >= 18) cnt -= 18;
|
|
if (cnt >= 9) cnt -= 9;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (7 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e038_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 7;
|
|
hival = val << (8 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xff;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e040_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x8000 & val) >> 15;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
val = 0xffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e048_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG((cnt == 16) & (val >> 15));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e050_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (15 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e058_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 15;
|
|
hival = val << (16 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffff;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e060_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x8000 & val) >> 15;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
val = 0xffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e068_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG((cnt == 16) & (val >> 15));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e070_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 34) cnt -= 34;
|
|
if (cnt >= 17) cnt -= 17;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (15 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e078_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 15;
|
|
hival = val << (16 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffff;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e080_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80000000 & val) >> 31;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
val = 0xffffffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e088_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG((cnt == 32) & (val >> 31));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e090_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (31 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e098_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 31;
|
|
hival = val << (32 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffffffff;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80000000 & val) >> 31;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
val = 0xffffffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG((cnt == 32) & (val >> 31));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 33) cnt -= 33;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (31 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 31;
|
|
hival = val << (32 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffffffff;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRW.W (An) */
|
|
uae_u32 REGPARAM2 op_e0d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e0d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e0e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e0e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ASRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e0f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ASRW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e0f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ASRW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e0f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ASLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e100_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xff << (7 - cnt)) & 0xff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e108_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e110_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (7 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e118_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 7;
|
|
loval = val >> (8 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e120_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xff << (7 - cnt)) & 0xff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e128_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e130_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 36) cnt -= 36;
|
|
if (cnt >= 18) cnt -= 18;
|
|
if (cnt >= 9) cnt -= 9;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (7 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e138_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 7;
|
|
loval = val >> (8 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e140_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e148_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e150_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (15 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e158_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 15;
|
|
loval = val >> (16 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e160_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e168_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e170_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 34) cnt -= 34;
|
|
if (cnt >= 17) cnt -= 17;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (15 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e178_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 15;
|
|
loval = val >> (16 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e180_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e188_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e190_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (31 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e198_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 31;
|
|
loval = val >> (32 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffffffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1a0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1a8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1b0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 33) cnt -= 33;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (31 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1b8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 31;
|
|
loval = val >> (32 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffffffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLW.W (An) */
|
|
uae_u32 REGPARAM2 op_e1d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e1d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e1e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e1e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ASLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e1f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ASLW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e1f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ASLW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e1f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LSRW.W (An) */
|
|
uae_u32 REGPARAM2 op_e2d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e2d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e2e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e2e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LSRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e2f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* LSRW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e2f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LSRW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e2f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LSLW.W (An) */
|
|
uae_u32 REGPARAM2 op_e3d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e3d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e3e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e3e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LSLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e3f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* LSLW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e3f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* LSLW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e3f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ROXRW.W (An) */
|
|
uae_u32 REGPARAM2 op_e4d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e4d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e4e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e4e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROXRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e4f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ROXRW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e4f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROXRW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e4f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ROXLW.W (An) */
|
|
uae_u32 REGPARAM2 op_e5d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e5d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e5e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e5e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROXLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e5f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ROXLW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e5f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROXLW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e5f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* RORW.W (An) */
|
|
uae_u32 REGPARAM2 op_e6d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e6d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e6e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e6e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* RORW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e6f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* RORW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e6f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* RORW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e6f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ROLW.W (An) */
|
|
uae_u32 REGPARAM2 op_e7d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLW.W (An)+ */
|
|
uae_u32 REGPARAM2 op_e7d8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLW.W -(An) */
|
|
uae_u32 REGPARAM2 op_e7e0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 data = get_word_jit(dataa);
|
|
m68k_areg(regs, srcreg) = dataa;
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLW.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_e7e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e7f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
m68k_incpc(2);
|
|
dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* ROLW.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_e7f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ROLW.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_e7f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr dataa;
|
|
dataa = get_dilong(2);
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BFTST.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFTST.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e8fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9d0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9e8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9f0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9f8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9f9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9fa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTU.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_e9fb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eac0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
tmp = bdata[0] | (tmp << (32 - width));
|
|
m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ead0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eae8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eaf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eaf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFCHG.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eaf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = tmp ^ (0xffffffffu >> (32 - width));
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebe8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFEXTS.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ebfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp = (uae_s32)tmp >> (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
m68k_dreg(regs, (extra >> 12) & 7) = tmp;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ecc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
tmp = bdata[0] | (tmp << (32 - width));
|
|
m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ecd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ece8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ecf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ecf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFCLR.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ecf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0;
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_ede8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edf0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edf8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edf9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edfa_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_getpc() + 4;
|
|
dsta += (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFFFO.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_edfb_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
dsta = get_disp_ea_020(tmppc, 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 offset2 = offset;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
{ uae_u32 mask = 1 << (width - 1);
|
|
while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}
|
|
m68k_dreg(regs, (extra >> 12) & 7) = offset2;
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eec0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
tmp = bdata[0] | (tmp << (32 - width));
|
|
m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eed0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eee8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eef0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eef8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFSET.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eef9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = 0xffffffffu >> (32 - width);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_efc0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp = m68k_dreg(regs, dstreg);
|
|
offset &= 0x1f;
|
|
tmp = (tmp << offset) | (tmp >> (32 - offset));
|
|
bdata[0] = tmp & ((1 << (32 - width)) - 1);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
tmp = bdata[0] | (tmp << (32 - width));
|
|
m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_efd0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_efe8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eff0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eff8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* BFINS.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_eff9_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 extra = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_u32 bdata[2];
|
|
uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;
|
|
int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1;
|
|
uae_u32 tmp;
|
|
dsta += offset >> 3;
|
|
tmp = get_bitfield(dsta, bdata, offset, width);
|
|
SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0);
|
|
tmp >>= (32 - width);
|
|
SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0);
|
|
tmp = m68k_dreg(regs, (extra >> 12) & 7);
|
|
tmp = tmp & (0xffffffffu >> (32 - width));
|
|
SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0);
|
|
SET_ZFLG(tmp == 0);
|
|
put_bitfield(dsta, bdata, tmp, offset, width);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MMUOP030.L Dn,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f000_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uae_u16 extraa = 0;
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L An,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f008_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uae_u16 extraa = 0;
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (An),#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f010_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = m68k_areg(regs, srcreg);
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (An)+,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f018_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L -(An),#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f020_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = m68k_areg(regs, srcreg) - 4;
|
|
m68k_areg(regs, srcreg) = extraa;
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (d16,An),#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f028_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(0);
|
|
m68k_incpc(2);
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (d8,An,Xn),#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f030_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (xxx).W,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f038_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = (uae_s32)(uae_s16)get_diword(0);
|
|
m68k_incpc(2);
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MMUOP030.L (xxx).L,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f039_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr pc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
uaecptr extraa;
|
|
extraa = get_dilong(0);
|
|
m68k_incpc(4);
|
|
mmu_op30(pc, opcode, extra, extraa);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f200_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f208_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f210_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f218_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f220_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f228_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f230_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f238_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f239_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f23a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,(d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f23b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FPP.L #<data>.W,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f23c_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_arithmetic(opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f240_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FDBcc.L #<data>.W,Dn */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f248_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_dbcc (opcode, extra);
|
|
if (regs.fp_branch) {
|
|
regs.fp_branch = false;
|
|
if(regs.t0) check_t0_trace();
|
|
}
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f250_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f258_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f260_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f268_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f270_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f278_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FScc.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f279_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uae_s16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_scc (opcode, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FTRAPcc.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f27a_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
uae_s16 dummy = get_diword(4);
|
|
m68k_incpc(6);
|
|
fpuop_trapcc (opcode, oldpc, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FTRAPcc.L #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f27b_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
uae_s32 dummy;
|
|
dummy = get_dilong(4);
|
|
m68k_incpc(8);
|
|
fpuop_trapcc (opcode, oldpc, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FTRAPcc.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f27c_40_ff(uae_u32 opcode)
|
|
{
|
|
|
|
#ifdef FPUEMU
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 extra = get_diword(2);
|
|
m68k_incpc(4);
|
|
fpuop_trapcc (opcode, oldpc, extra);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FBccQ.L #<data>,#<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f280_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 63);
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
uaecptr pc = m68k_getpc();
|
|
uae_s16 extra = get_diword(0);
|
|
m68k_incpc(2);
|
|
fpuop_bcc (opcode, pc,extra);
|
|
if (regs.fp_branch) {
|
|
regs.fp_branch = false;
|
|
if(regs.t0) check_t0_trace();
|
|
}
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FBccQ.L #<data>,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f2c0_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 63);
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
uaecptr pc = m68k_getpc();
|
|
uae_s32 extra;
|
|
extra = get_dilong(0);
|
|
m68k_incpc(4);
|
|
fpuop_bcc (opcode, pc,extra);
|
|
if (regs.fp_branch) {
|
|
regs.fp_branch = false;
|
|
if(regs.t0) check_t0_trace();
|
|
}
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f310_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L -(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f320_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L (d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f328_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L (d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f330_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L (xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f338_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FSAVE.L (xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f339_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_save (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f350_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f358_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f368_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f370_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f378_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f379_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (d16,PC) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f37a_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* FRESTORE.L (d8,PC,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f37b_40_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef FPUEMU
|
|
m68k_incpc(2);
|
|
fpuop_restore (opcode);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVLQ.L #<data>,An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f408_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVPQ.L #<data>,An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f410_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f418_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f419_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41d_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41e_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CINVAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f41f_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHLQ.L #<data>,An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f428_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHPQ.L #<data>,An */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f430_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f438_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f439_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43a_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43b_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43c_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43d_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43e_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* CPUSHAQ.L #<data> */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f43f_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 6) & 3);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
flush_cpu_caches_040(opcode);
|
|
if (opcode & 0x80) {
|
|
flush_icache((opcode >> 6) & 3);
|
|
}
|
|
check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSHN.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f500_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSH.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f508_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSHAN.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f510_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSHA.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f518_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PTESTW.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f548_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PTESTR.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f568_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PLPAW.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f588_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PLPAR.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f5c8_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MOVE16.L (An)+,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f600_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr memsa;
|
|
memsa = m68k_areg(regs, srcreg);
|
|
uaecptr memda;
|
|
memda = get_dilong(2);
|
|
memsa &= ~15;
|
|
memda &= ~15;
|
|
uae_u32 v[4];
|
|
v[0] = get_long_jit(memsa);
|
|
v[1] = get_long_jit(memsa + 4);
|
|
v[2] = get_long_jit(memsa + 8);
|
|
v[3] = get_long_jit(memsa + 12);
|
|
put_long_jit(memda , v[0]);
|
|
put_long_jit(memda + 4, v[1]);
|
|
put_long_jit(memda + 8, v[2]);
|
|
put_long_jit(memda + 12, v[3]);
|
|
m68k_areg(regs, srcreg) += 16;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MOVE16.L (xxx).L,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f608_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr memsa;
|
|
memsa = get_dilong(2);
|
|
uaecptr memda;
|
|
memda = m68k_areg(regs, dstreg);
|
|
memsa &= ~15;
|
|
memda &= ~15;
|
|
uae_u32 v[4];
|
|
v[0] = get_long_jit(memsa);
|
|
v[1] = get_long_jit(memsa + 4);
|
|
v[2] = get_long_jit(memsa + 8);
|
|
v[3] = get_long_jit(memsa + 12);
|
|
put_long_jit(memda , v[0]);
|
|
put_long_jit(memda + 4, v[1]);
|
|
put_long_jit(memda + 8, v[2]);
|
|
put_long_jit(memda + 12, v[3]);
|
|
m68k_areg(regs, dstreg) += 16;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MOVE16.L (An),(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f610_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr memsa;
|
|
memsa = m68k_areg(regs, srcreg);
|
|
uaecptr memda;
|
|
memda = get_dilong(2);
|
|
memsa &= ~15;
|
|
memda &= ~15;
|
|
uae_u32 v[4];
|
|
v[0] = get_long_jit(memsa);
|
|
v[1] = get_long_jit(memsa + 4);
|
|
v[2] = get_long_jit(memsa + 8);
|
|
v[3] = get_long_jit(memsa + 12);
|
|
put_long_jit(memda , v[0]);
|
|
put_long_jit(memda + 4, v[1]);
|
|
put_long_jit(memda + 8, v[2]);
|
|
put_long_jit(memda + 12, v[3]);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MOVE16.L (xxx).L,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f618_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uaecptr memsa;
|
|
memsa = get_dilong(2);
|
|
uaecptr memda;
|
|
memda = m68k_areg(regs, dstreg);
|
|
memsa &= ~15;
|
|
memda &= ~15;
|
|
uae_u32 v[4];
|
|
v[0] = get_long_jit(memsa);
|
|
v[1] = get_long_jit(memsa + 4);
|
|
v[2] = get_long_jit(memsa + 8);
|
|
v[3] = get_long_jit(memsa + 12);
|
|
put_long_jit(memda , v[0]);
|
|
put_long_jit(memda + 4, v[1]);
|
|
put_long_jit(memda + 8, v[2]);
|
|
put_long_jit(memda + 12, v[3]);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* MOVE16.L (An)+,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f620_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = 0;
|
|
uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;
|
|
dstreg = (get_diword(2) >> 12) & 7;
|
|
memd = m68k_areg(regs, dstreg) & ~15;
|
|
uae_u32 v[4];
|
|
v[0] = get_long_jit(mems);
|
|
v[1] = get_long_jit(mems + 4);
|
|
v[2] = get_long_jit(mems + 8);
|
|
v[3] = get_long_jit(mems + 12);
|
|
put_long_jit(memd , v[0]);
|
|
put_long_jit(memd + 4, v[1]);
|
|
put_long_jit(memd + 8, v[2]);
|
|
put_long_jit(memd + 12, v[3]);
|
|
if (srcreg != dstreg)
|
|
m68k_areg(regs, srcreg) += 16;
|
|
m68k_areg(regs, dstreg) += 16;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* LPSTOP.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f800_40_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 sw = get_diword(2);
|
|
if (sw != 0x01c0) {
|
|
Exception(11);
|
|
return 0;
|
|
}
|
|
if (!(regs.sr & 0x2000)) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_u16 newsr = get_diword(4);
|
|
if (!(newsr & 0x2000)) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
checkint();
|
|
MakeFromSR_STOP();
|
|
m68k_setstopped(2);
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* ORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_003c_41_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr |= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_007c_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr |= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_41_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr &= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_41_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr ^= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CAS.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af9_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_byte_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf9_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_word_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.W #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cfc_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2);
|
|
uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst1)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst2)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff);
|
|
m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e10_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e18_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e20_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e28_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e30_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e38_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e39_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e50_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e58_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e60_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e68_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e70_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_word(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e78_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e79_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e90_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e98_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_long(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb8_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb9_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef0_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef8_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef9_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
put_long_jit(dsta, dst);
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.L #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0efc_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2);
|
|
uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst1)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst2)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 16) & 7) = dst1;
|
|
m68k_dreg(regs, (extra >> 0) & 7) = dst2;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* LINK.L An,#<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4808_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr olda;
|
|
olda = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = olda;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 offs;
|
|
offs = get_dilong(2);
|
|
put_long_jit(olda, src);
|
|
m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
|
|
m68k_areg(regs, 7) += offs;
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* LINK.W An,#<data>.W */
|
|
uae_u32 REGPARAM2 op_4e50_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr olda;
|
|
olda = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = olda;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
put_long_jit(olda, src);
|
|
m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
|
|
m68k_areg(regs, 7) += offs;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOP.L */
|
|
uae_u32 REGPARAM2 op_4e71_41_ff(uae_u32 opcode)
|
|
{
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.ir = src;
|
|
}
|
|
uae_u16 sr = regs.ir;
|
|
regs.sr = sr;
|
|
checkint();
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_41_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 oldsr = regs.sr, newsr;
|
|
uae_u32 newpc;
|
|
for (;;) {
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
uae_u32 pc = get_long_jit(a + 2);
|
|
uae_u16 format = get_word_jit(a + 2 + 4);
|
|
int frame = format >> 12;
|
|
int offset = 8;
|
|
newsr = sr; newpc = pc;
|
|
if (frame == 0x0) {
|
|
m68k_areg(regs, 7) += offset; break; }
|
|
else if (frame == 0x1) {
|
|
m68k_areg(regs, 7) += offset; }
|
|
else if (frame == 0x2) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x3) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x4) {
|
|
m68k_areg(regs, 7) += offset + 8; break; }
|
|
else if (frame == 0x7) {
|
|
m68k_areg(regs, 7) += offset + 52; break; }
|
|
else {
|
|
Exception_cpu_oldpc(14,oldpc);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
oldsr = newsr;
|
|
MakeFromSR_T0();
|
|
}
|
|
regs.sr = newsr;
|
|
MakeFromSR_T0();
|
|
if (newpc & 1) {
|
|
MakeFromSR();
|
|
exception3_read_prefetch_68040bug(opcode, newpc, oldsr);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(newpc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_41_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
if (pc & 1) {
|
|
m68k_areg(regs, 7) -= 6;
|
|
uae_u16 oldsr = regs.sr;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
exception3_read_prefetch_68040bug(opcode, pc, oldsr);
|
|
return 0;
|
|
}
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* MOVE2C.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e7b_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int regno = (src >> 12) & 15;
|
|
uae_u32 *regp = regs.regs + regno;
|
|
if (!m68k_move2c(src & 0xFFF, regp)) {
|
|
return 0;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* PFLUSHN.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f500_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSH.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f508_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSHAN.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f510_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PFLUSHA.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f518_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PTESTW.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f548_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* PTESTR.L (An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_f568_41_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
mmu_op(opcode, 0);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
|
|
#endif
|
|
/* ORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_003c_42_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr |= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_007c_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr |= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_42_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr &= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_42_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr ^= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CAS.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ad8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ae8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0af9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_byte_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cd8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ce8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cf9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.W #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0cfc_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2);
|
|
uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst1)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s16)(dst2)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff);
|
|
m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e10_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e18_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e20_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e28_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e30_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e38_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.B #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e39_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e50_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e58_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e60_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e68_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e70_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_word(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e78_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e79_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e90_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e98_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(4);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
m68k_areg(regs, dstreg) = srca;
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(4);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ea8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
dfc_nommu_put_long(dsta, src);
|
|
} else {
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,2 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb8_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb9_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(8);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(8);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(An)+ */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ed8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,-(An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d16,An) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ee8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
m68k_incpc(4);
|
|
dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* CAS.L #<data>.W,(xxx).L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0ef9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
int ru = (src >> 6) & 7;
|
|
int rc = src & 7;
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(dsta, (m68k_dreg(regs, ru)));
|
|
} else {
|
|
m68k_dreg(regs, rc) = dst;
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
#endif
|
|
/* CAS2.L #<data>.L */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0efc_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 extra;
|
|
extra = get_dilong(2);
|
|
uae_u32 rn1 = regs.regs[(extra >> 28) & 15];
|
|
uae_u32 rn2 = regs.regs[(extra >> 12) & 15];
|
|
uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2);
|
|
uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst1)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7)));
|
|
int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0;
|
|
int flgo = ((uae_s32)(dst2)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2)));
|
|
SET_NFLG(flgn != 0);
|
|
if (GET_ZFLG()) {
|
|
put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7));
|
|
put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7));
|
|
}
|
|
}
|
|
if (!GET_ZFLG()) {
|
|
m68k_dreg(regs, (extra >> 0) & 7) = dst2;
|
|
m68k_dreg(regs, (extra >> 16) & 7) = dst1;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
#endif
|
|
/* NBCD.B Dn */
|
|
uae_u32 REGPARAM2 op_4800_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (An) */
|
|
uae_u32 REGPARAM2 op_4810_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4818_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B -(An) */
|
|
uae_u32 REGPARAM2 op_4820_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4828_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4830_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
return 0;
|
|
}
|
|
/* 2 2,0 */
|
|
|
|
/* NBCD.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4838_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4839_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4890_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48a0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 1;
|
|
while (amask) {
|
|
srca -= 2;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 2;
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48a8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48b0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48b8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48b9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_48d0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48e0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 1;
|
|
while (amask) {
|
|
srca -= 4;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 4;
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48e8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48f0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48f8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48f9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4c90_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4c98_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ca8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cb0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cb8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cb9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cba_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cbb_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4cd0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4cd8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ce8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cf0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cf8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cf9_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cfa_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cfb_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
m68k_incpc(4);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 2,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NOP.L */
|
|
uae_u32 REGPARAM2 op_4e71_42_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.ir = src;
|
|
}
|
|
uae_u16 sr = regs.ir;
|
|
regs.sr = sr;
|
|
checkint();
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_42_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 oldsr = regs.sr, newsr;
|
|
uae_u32 newpc;
|
|
for (;;) {
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
uae_u32 pc = get_long_jit(a + 2);
|
|
uae_u16 format = get_word_jit(a + 2 + 4);
|
|
int frame = format >> 12;
|
|
int offset = 8;
|
|
newsr = sr; newpc = pc;
|
|
if (frame == 0x0) {
|
|
m68k_areg(regs, 7) += offset; break; }
|
|
else if (frame == 0x1) {
|
|
m68k_areg(regs, 7) += offset; }
|
|
else if (frame == 0x2) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x9) {
|
|
m68k_areg(regs, 7) += offset + 12; break; }
|
|
else if (frame == 0xa) {
|
|
m68k_areg(regs, 7) += offset + 24; break; }
|
|
else if (frame == 0xb) {
|
|
m68k_areg(regs, 7) += offset + 84; break; }
|
|
else {
|
|
regs.t1 = regs.t0 = 0;
|
|
Exception_cpu_oldpc(14,oldpc);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
oldsr = newsr;
|
|
MakeFromSR_T0();
|
|
}
|
|
regs.sr = newsr;
|
|
MakeFromSR_T0();
|
|
if (newpc & 1) {
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(newpc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTD.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e74_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
uae_s16 offs = get_diword(2);
|
|
m68k_areg(regs, 7) += offs;
|
|
if (pc & 1) {
|
|
exception3_read_prefetch_only(opcode, pc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(pc);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
#endif
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc + 2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* MOVE2C.L #<data>.W */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_4e7b_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int regno = (src >> 12) & 15;
|
|
uae_u32 *regp = regs.regs + regno;
|
|
if (!m68k_move2c(src & 0xFFF, regp)) {
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
#endif
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 0;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
m68k_incpc(2);
|
|
uaecptr tmppc = m68k_getpc();
|
|
srca = get_disp_ea_020(tmppc, 0);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 0;
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_getpc() & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 2,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_6000_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(0)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (T) */
|
|
uae_u32 REGPARAM2 op_6001_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(0)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (T) */
|
|
uae_u32 REGPARAM2 op_60ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(0)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (s & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
exception3_read_prefetch(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (s & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
exception3_read_prefetch(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (s & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
exception3_read_prefetch(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_6200_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(2)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (HI) */
|
|
uae_u32 REGPARAM2 op_6201_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(2)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (HI) */
|
|
uae_u32 REGPARAM2 op_62ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(2)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_6300_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(3)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LS) */
|
|
uae_u32 REGPARAM2 op_6301_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(3)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LS) */
|
|
uae_u32 REGPARAM2 op_63ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(3)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_6400_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(4)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CC) */
|
|
uae_u32 REGPARAM2 op_6401_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(4)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CC) */
|
|
uae_u32 REGPARAM2 op_64ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(4)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_6500_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(5)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CS) */
|
|
uae_u32 REGPARAM2 op_6501_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(5)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CS) */
|
|
uae_u32 REGPARAM2 op_65ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(5)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_6600_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(6)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (NE) */
|
|
uae_u32 REGPARAM2 op_6601_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(6)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (NE) */
|
|
uae_u32 REGPARAM2 op_66ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(6)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_6700_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(7)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (EQ) */
|
|
uae_u32 REGPARAM2 op_6701_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(7)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (EQ) */
|
|
uae_u32 REGPARAM2 op_67ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(7)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_6800_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(8)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VC) */
|
|
uae_u32 REGPARAM2 op_6801_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(8)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VC) */
|
|
uae_u32 REGPARAM2 op_68ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(8)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_6900_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(9)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VS) */
|
|
uae_u32 REGPARAM2 op_6901_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(9)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VS) */
|
|
uae_u32 REGPARAM2 op_69ff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(9)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_6a00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(10)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (PL) */
|
|
uae_u32 REGPARAM2 op_6a01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(10)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (PL) */
|
|
uae_u32 REGPARAM2 op_6aff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(10)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_6b00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(11)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (MI) */
|
|
uae_u32 REGPARAM2 op_6b01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(11)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (MI) */
|
|
uae_u32 REGPARAM2 op_6bff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(11)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_6c00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(12)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GE) */
|
|
uae_u32 REGPARAM2 op_6c01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(12)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GE) */
|
|
uae_u32 REGPARAM2 op_6cff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(12)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_6d00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(13)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LT) */
|
|
uae_u32 REGPARAM2 op_6d01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(13)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LT) */
|
|
uae_u32 REGPARAM2 op_6dff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(13)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_6e00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(14)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GT) */
|
|
uae_u32 REGPARAM2 op_6e01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(14)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GT) */
|
|
uae_u32 REGPARAM2 op_6eff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(14)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_6f00_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(15)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LE) */
|
|
uae_u32 REGPARAM2 op_6f01_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(15)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LE) */
|
|
uae_u32 REGPARAM2 op_6fff_42_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
if (cctrue(15)) {
|
|
if (src & 1) {
|
|
uaecptr addr = m68k_getpc() + (uae_s32)src + 2;
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* SBCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8100_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SBCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_8108_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ABCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c100_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ABCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_c108_42_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG(0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_003c_43_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr |= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_007c_43_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr |= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_43_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_43_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr &= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_43_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_43_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
if(regs.t0) check_t0_trace();
|
|
regs.sr ^= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_43_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.ir = src;
|
|
}
|
|
uae_u16 sr = regs.ir;
|
|
regs.sr = sr;
|
|
checkint();
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_43_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 oldsr = regs.sr, newsr;
|
|
uae_u32 newpc;
|
|
for (;;) {
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
uae_u32 pc = get_long_jit(a + 2);
|
|
uae_u16 format = get_word_jit(a + 2 + 4);
|
|
int frame = format >> 12;
|
|
int offset = 8;
|
|
newsr = sr; newpc = pc;
|
|
if (frame == 0x0) {
|
|
m68k_areg(regs, 7) += offset; break; }
|
|
else if (frame == 0x1) {
|
|
m68k_areg(regs, 7) += offset; }
|
|
else if (frame == 0x2) {
|
|
m68k_areg(regs, 7) += offset + 4; break; }
|
|
else if (frame == 0x9) {
|
|
m68k_areg(regs, 7) += offset + 12; break; }
|
|
else if (frame == 0xa) {
|
|
m68k_areg(regs, 7) += offset + 24; break; }
|
|
else if (frame == 0xb) {
|
|
m68k_areg(regs, 7) += offset + 84; break; }
|
|
else {
|
|
Exception_cpu_oldpc(14,oldpc);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
oldsr = newsr;
|
|
MakeFromSR_T0();
|
|
}
|
|
regs.sr = newsr;
|
|
MakeFromSR_T0();
|
|
if (newpc & 1) {
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(newpc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_43_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc + 2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
if(regs.t0) check_t0_trace();
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_003c_44_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr |= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_007c_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr |= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_00b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* BTST.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BTST.B Dn,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_013b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = 3;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
dsta = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCHG.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_0140_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCHG.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_0180_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BSET.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_01c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BSET.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0230_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_44_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0270_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr &= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_02b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* SUB.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0430_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* SUB.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0470_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* SUB.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_04b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* ADD.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0630_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ADD.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0670_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* ADD.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_06b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* BTST.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0830_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BTST.B #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_083b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
uaecptr tmppc = m68k_getpc() + 4;
|
|
dsta = get_disp_ea_000(tmppc, get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCHG.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0840_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCHG.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0870_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
dst ^= (1 << src);
|
|
SET_ZFLG(((uae_u32)dst & (1 << src)) >> src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_0880_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BSET.L #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_08c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= 31;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
m68k_dreg(regs, dstreg) = (dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BSET.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst |= (1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* EOR.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0a30_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_44_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0a70_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr ^= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0ab0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* CMP.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0c30_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* CMP.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0c70_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* CMP.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_0cb0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* MOVES.B #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e30_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
dfc_nommu_put_byte(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 src = sfc_nommu_get_byte(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 4,4 */
|
|
|
|
#endif
|
|
/* MOVES.W #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0e70_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
dfc_nommu_put_word(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s16 src = sfc_nommu_get_word(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 4,4 */
|
|
|
|
#endif
|
|
/* MOVES.L #<data>.W,(d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_0eb0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 extra = get_diword(2);
|
|
if (extra & 0x800) {
|
|
uae_u32 src = regs.regs[(extra >> 12) & 15];
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
src = regs.regs[(extra >> 12) & 15];
|
|
dfc_nommu_put_long(dsta, src);
|
|
m68k_incpc(6);
|
|
} else {
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s32 src = sfc_nommu_get_long(srca);
|
|
if (extra & 0x8000) {
|
|
m68k_areg(regs, (extra >> 12) & 7) = src;
|
|
} else {
|
|
m68k_dreg(regs, (extra >> 12) & 7) = (src);
|
|
}
|
|
m68k_incpc(6);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 6 4,4 */
|
|
|
|
#endif
|
|
/* MOVE.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_1030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_103b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_10b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_10bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_10f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_10fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_1130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_113b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_1170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_117b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1180_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1190_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_1198_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.B (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.B (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.B (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11b9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* MOVE.B (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11ba_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.B #<data>.B,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_11bc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = get_dibyte(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_11fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.B (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* MOVE.B (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_13fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_2030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_203b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVEA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_2070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVEA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_207b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_20b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_20bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_20f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_20fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_2130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_213b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_2170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_217b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2180_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L An,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2188_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2190_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_2198_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.L (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.L (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.L (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21b9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* MOVE.L (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21ba_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.L #<data>.L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_21bc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_21fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.L (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* MOVE.L (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_23fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_3030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_303b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVEA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_3070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVEA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_307b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
src = (uae_s32)(uae_s16)src;
|
|
m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_30b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(An) */
|
|
uae_u32 REGPARAM2 op_30bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_30f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(An)+ */
|
|
uae_u32 REGPARAM2 op_30fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
m68k_areg(regs, dstreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_3130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),-(An) */
|
|
uae_u32 REGPARAM2 op_313b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_3170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(d16,An) */
|
|
uae_u32 REGPARAM2 op_317b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3180_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W An,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3188_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_areg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3190_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (An)+,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_3198_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W -(An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MOVE.W (d16,An),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.W (xxx).W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.W (xxx).L,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31b9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 4,0 */
|
|
|
|
/* MOVE.W (d16,PC),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31ba_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,4 */
|
|
|
|
/* MOVE.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_31bc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(xxx).W */
|
|
uae_u32 REGPARAM2 op_31fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 6,0 */
|
|
|
|
/* MOVE.W (d8,An,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* MOVE.W (d8,PC,Xn),(xxx).L */
|
|
uae_u32 REGPARAM2 op_33fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 8,0 */
|
|
|
|
/* NEGX.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NEGX.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NEGX.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CHK.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_41b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CHK.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_41bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
m68k_incpc(4);
|
|
if (dst > src) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
if ((uae_s32)dst < 0) {
|
|
setchkundefinedflags(src, dst, 1);
|
|
Exception_cpu_oldpc(6,oldpc);
|
|
return 0;
|
|
}
|
|
setchkundefinedflags(src, dst, 1);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* LEA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_41f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* LEA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_41fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
struct flag_struct oldflags;
|
|
oldflags.cznv = regflags.cznv;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.B (d8,An,Xn) */
|
|
#ifndef CPUEMU_68000_ONLY
|
|
uae_u32 REGPARAM2 op_42f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
put_word_jit(srca, regs.sr & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
#endif
|
|
/* NEG.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4430_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(0)) < 0;
|
|
int flgn = ((uae_s8)(dst)) < 0;
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NEG.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4470_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(0)) < 0;
|
|
int flgn = ((uae_s16)(dst)) < 0;
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NEG.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(0)) < 0;
|
|
int flgn = ((uae_s32)(dst)) < 0;
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NOT.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4630_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(dst)) == 0);
|
|
SET_NFLG(((uae_s8)(dst)) < 0);
|
|
put_byte_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NOT.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4670_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(dst)) == 0);
|
|
SET_NFLG(((uae_s16)(dst)) < 0);
|
|
put_word_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NOT.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_u32 dst = ~src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(dst)) == 0);
|
|
SET_NFLG(((uae_s32)(dst)) < 0);
|
|
put_long_jit(srca, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NBCD.B Dn */
|
|
uae_u32 REGPARAM2 op_4800_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (An) */
|
|
uae_u32 REGPARAM2 op_4810_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4818_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B -(An) */
|
|
uae_u32 REGPARAM2 op_4820_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* NBCD.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4828_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4830_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* NBCD.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4838_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* NBCD.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4839_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = - (src & 0xF0);
|
|
uae_u16 newv;
|
|
int cflg, tmp_newv;
|
|
tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo > 9) newv_lo -= 6;
|
|
newv = newv_hi + newv_lo;
|
|
cflg = (newv & 0x1F0) > 0x90;
|
|
if (cflg) newv -= 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(srca, newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* PEA.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4870_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u16 old_opcode = opcode;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
if (dsta & 1) {
|
|
regs.ir = old_opcode;
|
|
m68k_incpc(2);
|
|
exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* PEA.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_487b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 old_opcode = opcode;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = dsta;
|
|
if (dsta & 1) {
|
|
regs.ir = old_opcode;
|
|
m68k_incpc(2);
|
|
exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(dsta, srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4890_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 0;
|
|
while (amask) {
|
|
srca -= 2;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 2;
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48b9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_word_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_48d0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_48e0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) - 0;
|
|
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
|
|
int type = 0;
|
|
while (amask) {
|
|
srca -= 4;
|
|
if (!type || movem_index2[amask] != dstreg) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]));
|
|
} else {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4);
|
|
}
|
|
amask = movem_next[amask];
|
|
}
|
|
while (dmask) {
|
|
srca -= 4;
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask]));
|
|
dmask = movem_next[dmask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_48e8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_48f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_48f8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMLE.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_48f9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
while (dmask) {
|
|
put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask]));
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
put_long_jit(srca, m68k_areg(regs, movem_index1[amask]));
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* TST.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4a30_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TST.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4a70_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TST.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ab0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_u8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4c90_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4c98_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
get_word_jit(srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ca8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cb0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cb8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cb9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cba_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.W #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cbb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 4;
|
|
srca = get_disp_ea_000(tmppc, get_diword(4));
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca);
|
|
srca += 2;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_4cd0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_4cd8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
m68k_areg(regs, dstreg) = srca;
|
|
get_word_jit(srca);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_4ce8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4cf0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_4cf8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_4cf9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = get_dilong(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d16,PC) */
|
|
uae_u32 REGPARAM2 op_4cfa_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 2;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 4;
|
|
srca += (uae_s32)(uae_s16)get_diword(4);
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVMEL.L #<data>.W,(d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4cfb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 dstreg = 3;
|
|
uae_u16 mask = get_diword(2);
|
|
uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 4;
|
|
srca = get_disp_ea_000(tmppc, get_diword(4));
|
|
while (dmask) {
|
|
m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
dmask = movem_next[dmask];
|
|
}
|
|
while (amask) {
|
|
m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca);
|
|
srca += 4;
|
|
amask = movem_next[amask];
|
|
}
|
|
get_word_jit(srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* LINK.W An,#<data>.W */
|
|
uae_u32 REGPARAM2 op_4e50_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uaecptr olda;
|
|
olda = m68k_areg(regs, 7) - 4;
|
|
m68k_areg(regs, 7) = olda;
|
|
uae_s16 offs = get_diword(2);
|
|
if (olda & 1) {
|
|
m68k_areg(regs, 7) += 4;
|
|
m68k_areg(regs, srcreg) = olda;
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, olda, sz_word, src >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(olda, src);
|
|
m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
|
|
m68k_areg(regs, 7) += offs;
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_44_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 oldsr = regs.sr, newsr;
|
|
uae_u32 newpc;
|
|
for (;;) {
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
uae_u32 pc = get_long_jit(a + 2);
|
|
uae_u16 format = get_word_jit(a + 2 + 4);
|
|
int frame = format >> 12;
|
|
int offset = 8;
|
|
newsr = sr; newpc = pc;
|
|
if (frame == 0x0) {
|
|
m68k_areg(regs, 7) += offset; break; }
|
|
else if (frame == 0x8) {
|
|
m68k_areg(regs, 7) += offset + 50; break; }
|
|
else {
|
|
SET_NFLG(((uae_s16)format) < 0);
|
|
SET_ZFLG(format == 0);
|
|
SET_VFLG(0);
|
|
Exception_cpu_oldpc(14,oldpc);
|
|
return 0;
|
|
}
|
|
regs.sr = newsr;
|
|
oldsr = newsr;
|
|
MakeFromSR_T0();
|
|
}
|
|
regs.sr = newsr;
|
|
MakeFromSR_T0();
|
|
if (newpc & 1) {
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(newpc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_44_ff(uae_u32 opcode)
|
|
{
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc + 2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.B #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDQ.W #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDQ.L #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_50b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBQ.B #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBQ.W #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_5170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBQ.L #<data>,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_51b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Bcc.W #<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_6000_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(0)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (T) */
|
|
uae_u32 REGPARAM2 op_6001_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(0)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (T) */
|
|
uae_u32 REGPARAM2 op_60ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(0)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
if (s & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
if (s & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
if (s & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, oldpc + s);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.W #<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_6200_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(2)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (HI) */
|
|
uae_u32 REGPARAM2 op_6201_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(2)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (HI) */
|
|
uae_u32 REGPARAM2 op_62ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(2)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_6300_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(3)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LS) */
|
|
uae_u32 REGPARAM2 op_6301_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(3)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LS) */
|
|
uae_u32 REGPARAM2 op_63ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(3)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_6400_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(4)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CC) */
|
|
uae_u32 REGPARAM2 op_6401_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(4)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CC) */
|
|
uae_u32 REGPARAM2 op_64ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(4)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_6500_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(5)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (CS) */
|
|
uae_u32 REGPARAM2 op_6501_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(5)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (CS) */
|
|
uae_u32 REGPARAM2 op_65ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(5)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_6600_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(6)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (NE) */
|
|
uae_u32 REGPARAM2 op_6601_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(6)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (NE) */
|
|
uae_u32 REGPARAM2 op_66ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(6)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_6700_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(7)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (EQ) */
|
|
uae_u32 REGPARAM2 op_6701_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(7)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (EQ) */
|
|
uae_u32 REGPARAM2 op_67ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(7)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_6800_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(8)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VC) */
|
|
uae_u32 REGPARAM2 op_6801_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(8)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VC) */
|
|
uae_u32 REGPARAM2 op_68ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(8)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_6900_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(9)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (VS) */
|
|
uae_u32 REGPARAM2 op_6901_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(9)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (VS) */
|
|
uae_u32 REGPARAM2 op_69ff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(9)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_6a00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(10)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (PL) */
|
|
uae_u32 REGPARAM2 op_6a01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(10)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (PL) */
|
|
uae_u32 REGPARAM2 op_6aff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(10)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_6b00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(11)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (MI) */
|
|
uae_u32 REGPARAM2 op_6b01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(11)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (MI) */
|
|
uae_u32 REGPARAM2 op_6bff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(11)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_6c00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(12)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GE) */
|
|
uae_u32 REGPARAM2 op_6c01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(12)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GE) */
|
|
uae_u32 REGPARAM2 op_6cff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(12)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_6d00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(13)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LT) */
|
|
uae_u32 REGPARAM2 op_6d01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(13)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LT) */
|
|
uae_u32 REGPARAM2 op_6dff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(13)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_6e00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(14)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (GT) */
|
|
uae_u32 REGPARAM2 op_6e01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(14)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (GT) */
|
|
uae_u32 REGPARAM2 op_6eff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(14)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Bcc.W #<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_6f00_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
if (cctrue(15)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BccQ.B #<data> (LE) */
|
|
uae_u32 REGPARAM2 op_6f01_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u32 src = srcreg;
|
|
if (cctrue(15)) {
|
|
if (src & 1) {
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_u16 rb = regs.irc;
|
|
m68k_incpc(((uae_s32)src + 2) & ~1);
|
|
uaecptr newpc = m68k_getpc() + (uae_s32)src + 2;
|
|
m68k_incpc(2);
|
|
regs.read_buffer = rb;
|
|
exception3_read_prefetch(opcode, newpc);
|
|
return 0;
|
|
}
|
|
m68k_incpc((uae_s32)src + 2);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* Bcc.L #<data>.L (LE) */
|
|
uae_u32 REGPARAM2 op_6fff_44_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (cctrue(15)) {
|
|
exception3_read_prefetch(opcode, m68k_getpc() + 1);
|
|
return 0;
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_8030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_803b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_8070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_807b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVU.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_80c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_80d0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_80d8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80e0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVU.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80e8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVU.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80f8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80f9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(6);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVU.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80fa_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVU.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVU.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_80fc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(0, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;
|
|
uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src;
|
|
if (newv > 0xffff) {
|
|
setdivuflags((uae_u32)dst, (uae_u16)src);
|
|
} else {
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SBCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8100_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SBCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_8108_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int bcd = 0;
|
|
newv = tmp_newv = newv_hi + newv_lo;
|
|
if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
|
|
if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
|
|
SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_8130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_8170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_81b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVS.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_81c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_81d0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_81d8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_81e0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(2);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DIVS.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_81e8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_81f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVS.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_81f8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_81f9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(6);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* DIVS.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_81fa_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* DIVS.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_81fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* DIVS.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_81fc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uae_s16 src = get_diword(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
if (src == 0) {
|
|
divbyzero_special(1, dst);
|
|
m68k_incpc(4);
|
|
Exception_cpu_oldpc(5,oldpc);
|
|
return 0;
|
|
}
|
|
int extra = 0;
|
|
if (dst == 0x80000000 && src == -1) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;
|
|
uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src;
|
|
if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {
|
|
setdivsflags((uae_s32)dst, (uae_s16)src);
|
|
} else {
|
|
if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
newv = (newv & 0xffff) | ((uae_u32)rem << 16);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
}
|
|
}
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_9030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_903b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_9070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_907b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_90f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_90fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_9130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_9170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_91b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_91f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUBA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_91fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst - src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b03b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b07b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b0b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMP.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_b0bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMPA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_b0f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMPA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_b0fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* EOR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* EOR.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* EOR.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_b1b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMPA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_b1f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CMPA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_b1fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs != flgo) && (flgn != flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
SET_NFLG(flgn != 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c03b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c07b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULU.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c0c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_c0d0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c0d8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0e0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULU.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0e8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULU.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0f8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0f9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULU.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0fa_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULU.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULU.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_c0fc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ABCD.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c100_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ABCD.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_c108_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0);
|
|
uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);
|
|
uae_u16 newv, tmp_newv;
|
|
int cflg;
|
|
newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; }
|
|
cflg = (newv & 0x3F0) > 0x90;
|
|
if (cflg) newv += 0x60;
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
put_byte_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(src)) == 0);
|
|
SET_NFLG(((uae_s16)(src)) < 0);
|
|
put_word_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_c1b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
put_long_jit(dsta, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULS.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c1c0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (An),Dn */
|
|
uae_u32 REGPARAM2 op_c1d0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c1d8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c1e0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MULS.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c1e8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c1f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULS.W (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c1f8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c1f9_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MULS.W (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c1fa_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MULS.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c1fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MULS.W #<data>.W,Dn */
|
|
uae_u32 REGPARAM2 op_c1fc_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.B (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.B (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d03b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.W (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.W (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d07b_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDA.W (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_d0f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDA.W (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_d0fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src));
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_ZFLG(((uae_s8)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.W Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src));
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_ZFLG(((uae_s16)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_d1b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDA.L (d8,An,Xn),An */
|
|
uae_u32 REGPARAM2 op_d1f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADDA.L (d8,PC,Xn),An */
|
|
uae_u32 REGPARAM2 op_d1fb_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_areg(regs, dstreg);
|
|
uae_u32 newv = dst + src;
|
|
m68k_areg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ASRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e000_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80 & val) >> 7;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
val = 0xff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e008_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG((cnt == 8) & (val >> 7));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e010_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (7 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e018_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 7;
|
|
hival = val << (8 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xff;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e020_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80 & val) >> 7;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
val = 0xff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e028_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG((cnt == 8) & (val >> 7));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e030_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 36) cnt -= 36;
|
|
if (cnt >= 18) cnt -= 18;
|
|
if (cnt >= 9) cnt -= 9;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (7 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e038_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 7;
|
|
hival = val << (8 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xff;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e040_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x8000 & val) >> 15;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
val = 0xffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e048_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG((cnt == 16) & (val >> 15));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e050_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (15 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e058_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 15;
|
|
hival = val << (16 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffff;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e060_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x8000 & val) >> 15;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
val = 0xffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e068_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG((cnt == 16) & (val >> 15));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e070_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 34) cnt -= 34;
|
|
if (cnt >= 17) cnt -= 17;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (15 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e078_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 15;
|
|
hival = val << (16 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffff;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e080_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80000000 & val) >> 31;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
val = 0xffffffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e088_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG((cnt == 32) & (val >> 31));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXRQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e090_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (31 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RORQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e098_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 hival;
|
|
cnt &= 31;
|
|
hival = val << (32 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffffffff;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
uae_u32 sign = (0x80000000 & val) >> 31;
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
val = 0xffffffff & (uae_u32)(0 - sign);
|
|
SET_CFLG(sign);
|
|
COPY_CARRY();
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign);
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG((cnt == 32) & (val >> 31));
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val >>= cnt - 1;
|
|
SET_CFLG(val & 1);
|
|
COPY_CARRY();
|
|
val >>= 1;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 33) cnt -= 33;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 hival = (val << 1) | GET_XFLG();
|
|
hival <<= (31 - cnt);
|
|
val >>= cnt;
|
|
carry = val & 1;
|
|
val >>= 1;
|
|
val |= hival;
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e0b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 hival;
|
|
cnt &= 31;
|
|
hival = val << (32 - cnt);
|
|
val >>= cnt;
|
|
val |= hival;
|
|
val &= 0xffffffff;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e0f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 cflg = val & 1;
|
|
val = (val >> 1) | sign;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(cflg);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ASLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e100_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xff << (7 - cnt)) & 0xff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e108_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e110_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (7 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.B #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e118_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 7;
|
|
loval = val >> (8 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e120_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xff << (7 - cnt)) & 0xff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e128_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 8) {
|
|
SET_CFLG(cnt == 8 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80) >> 7);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xff;
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e130_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 36) cnt -= 36;
|
|
if (cnt >= 18) cnt -= 18;
|
|
if (cnt >= 9) cnt -= 9;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (7 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e138_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s8 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u8)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 7;
|
|
loval = val >> (8 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s8)(val)) == 0);
|
|
SET_NFLG(((uae_s8)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e140_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e148_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e150_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (15 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.W #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e158_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 15;
|
|
loval = val >> (16 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e160_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e168_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 16) {
|
|
SET_CFLG(cnt == 16 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x8000) >> 15);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffff;
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e170_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 34) cnt -= 34;
|
|
if (cnt >= 17) cnt -= 17;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (15 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e178_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s16 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = (uae_u16)data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 15;
|
|
loval = val >> (16 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e180_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e188_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e190_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (31 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROLQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_e198_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 cnt = srcreg;
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
{
|
|
uae_u32 loval;
|
|
cnt &= 31;
|
|
loval = val >> (32 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffffffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1a0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_VFLG(val != 0);
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
|
|
SET_VFLG((val & mask) != mask && (val & mask) != 0);
|
|
val <<= cnt - 1;
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* LSL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1a8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 32) {
|
|
SET_CFLG(cnt == 32 ? val & 1 : 0);
|
|
COPY_CARRY();
|
|
val = 0;
|
|
} else if (cnt > 0) {
|
|
val <<= (cnt - 1);
|
|
SET_CFLG((val & 0x80000000) >> 31);
|
|
COPY_CARRY();
|
|
val <<= 1;
|
|
val &= 0xffffffff;
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROXL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1b0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt >= 33) cnt -= 33;
|
|
if (cnt > 0) {
|
|
cnt--;
|
|
{
|
|
uae_u32 carry;
|
|
uae_u32 loval = val >> (31 - cnt);
|
|
carry = loval & 1;
|
|
val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1);
|
|
SET_XFLG(carry);
|
|
val &= 0xffffffff;
|
|
}
|
|
}
|
|
SET_CFLG(GET_XFLG());
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ROL.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_e1b8_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 cnt = m68k_dreg(regs, srcreg);
|
|
uae_s32 data = m68k_dreg(regs, dstreg);
|
|
uae_u32 val = data;
|
|
CLEAR_CZNV();
|
|
int ccnt = cnt & 63;
|
|
cnt &= 63;
|
|
if (cnt > 0) {
|
|
uae_u32 loval;
|
|
cnt &= 31;
|
|
loval = val >> (32 - cnt);
|
|
val <<= cnt;
|
|
val |= loval;
|
|
val &= 0xffffffff;
|
|
SET_CFLG(val & 1);
|
|
}
|
|
SET_ZFLG(((uae_s32)(val)) == 0);
|
|
SET_NFLG(((uae_s32)(val)) < 0);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ASLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e1f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 sign = 0x8000 & val;
|
|
uae_u32 sign2;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
sign2 = 0x8000 & val;
|
|
SET_CFLG(sign != 0);
|
|
COPY_CARRY();
|
|
SET_VFLG(GET_VFLG() | (sign2 != sign));
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* LSRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e2f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u32 val = (uae_u16)data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* LSLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e3f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ROXRW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e4f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (GET_XFLG()) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ROXLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e5f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (GET_XFLG()) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
COPY_CARRY();
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* RORW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e6f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 1;
|
|
val >>= 1;
|
|
if (carry) val |= 0x8000;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ROLW.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_e7f0_44_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr dataa;
|
|
dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 data = get_word_jit(dataa);
|
|
uae_u16 val = data;
|
|
uae_u32 carry = val & 0x8000;
|
|
val <<= 1;
|
|
if (carry) val |= 1;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(val)) == 0);
|
|
SET_NFLG(((uae_s16)(val)) < 0);
|
|
SET_CFLG(carry >> 15);
|
|
put_word_jit(dataa, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_003c_45_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr |= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_007c_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr |= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte_jit(mempa) & 0xff) << 8;
|
|
val |= (get_byte_jit(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte_jit(mempa) & 0xff) << 24;
|
|
val |= (get_byte_jit(mempa + 2) & 0xff) << 16;
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val;
|
|
val |= (get_byte_jit(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte_jit(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte_jit(mempa, src >> 8);
|
|
put_byte_jit(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte_jit(mempa, src >> 24);
|
|
put_byte_jit(mempa + 2, src >> 16);
|
|
put_byte_jit(mempa + 4, src >> 8);
|
|
put_byte_jit(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_023c_45_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
src |= 0xff00;
|
|
regs.sr &= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ANDSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_027c_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr &= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte_jit(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EORSR.B #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a3c_45_ff(uae_u32 opcode)
|
|
{
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
src &= 0xFF;
|
|
regs.sr ^= src;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EORSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_0a7c_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
MakeSR();
|
|
int t1 = regs.t1;
|
|
uae_s16 src = get_diword(2);
|
|
regs.sr ^= src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
get_word_jit(srca);
|
|
put_word_jit(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long_jit(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word_jit(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte_jit(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTE.L */
|
|
uae_u32 REGPARAM2 op_4e73_45_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr a = m68k_areg(regs, 7);
|
|
uae_u16 sr = get_word_jit(a);
|
|
m68k_areg(regs, 7) += 6;
|
|
uae_u32 pc = get_word_jit(a + 2) << 16;
|
|
pc |= get_word_jit(a + 2 + 2);
|
|
uae_u16 oldt1 = regs.t1;
|
|
regs.sr = sr;
|
|
MakeFromSR();
|
|
if (pc & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode | 0x20000, pc, 1, 2);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(pc);
|
|
#ifdef DEBUGGER
|
|
branch_stack_pop_rte(oldpc);
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu_oldpc(7,oldpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* RTR.L */
|
|
uae_u32 REGPARAM2 op_4e77_45_ff(uae_u32 opcode)
|
|
{
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
uaecptr oldpc = m68k_getpc();
|
|
MakeSR();
|
|
uaecptr sra;
|
|
sra = m68k_areg(regs, 7);
|
|
uae_s16 sr = get_word_jit(sra);
|
|
m68k_areg(regs, 7) += 2;
|
|
uaecptr pca;
|
|
pca = m68k_areg(regs, 7);
|
|
uae_s32 pc = get_long_jit(pca);
|
|
m68k_areg(regs, 7) += 4;
|
|
regs.sr &= 0xFF00; sr &= 0xFF;
|
|
regs.sr |= sr;
|
|
MakeFromSR();
|
|
m68k_setpc_j(pc);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc + 2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(4);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (srca & 1) {
|
|
m68k_incpc(6);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long_jit(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LE) */
|
|
uae_u32 REGPARAM2 op_5fc0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fd0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LE) */
|
|
uae_u32 REGPARAM2 op_5fd8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LE) */
|
|
uae_u32 REGPARAM2 op_5ff8_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LE) */
|
|
uae_u32 REGPARAM2 op_5ff9_45_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte_jit(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte_jit(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long_jit(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_45_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long_jit(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long_jit(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long_jit(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte(mempa) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte(mempa) & 0xff) << 24;
|
|
val |= (get_byte(mempa + 2) & 0xff) << 16;
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val;
|
|
val |= (get_byte(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 8);
|
|
put_byte(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 24);
|
|
put_byte(mempa + 2, src >> 16);
|
|
put_byte(mempa + 4, src >> 8);
|
|
put_byte(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_46_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_46_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu(7);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(4);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (srca & 1) {
|
|
m68k_incpc(6);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LE) */
|
|
uae_u32 REGPARAM2 op_5fc0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fd0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LE) */
|
|
uae_u32 REGPARAM2 op_5fd8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LE) */
|
|
uae_u32 REGPARAM2 op_5ff8_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LE) */
|
|
uae_u32 REGPARAM2 op_5ff9_46_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_46_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte(mempa) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte(mempa) & 0xff) << 24;
|
|
val |= (get_byte(mempa + 2) & 0xff) << 16;
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val;
|
|
val |= (get_byte(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 8);
|
|
put_byte(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 24);
|
|
put_byte(mempa + 2, src >> 16);
|
|
put_byte(mempa + 4, src >> 8);
|
|
put_byte(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_47_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_47_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu(7);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(4);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (srca & 1) {
|
|
m68k_incpc(6);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LE) */
|
|
uae_u32 REGPARAM2 op_5fc0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fd0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LE) */
|
|
uae_u32 REGPARAM2 op_5fd8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LE) */
|
|
uae_u32 REGPARAM2 op_5ff8_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LE) */
|
|
uae_u32 REGPARAM2 op_5ff9_47_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_47_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte(mempa) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte(mempa) & 0xff) << 24;
|
|
val |= (get_byte(mempa + 2) & 0xff) << 16;
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val;
|
|
val |= (get_byte(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 8);
|
|
put_byte(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 24);
|
|
put_byte(mempa + 2, src >> 16);
|
|
put_byte(mempa + 4, src >> 8);
|
|
put_byte(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_48_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_48_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu(7);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(4);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (srca & 1) {
|
|
m68k_incpc(6);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LE) */
|
|
uae_u32 REGPARAM2 op_5fc0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fd0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LE) */
|
|
uae_u32 REGPARAM2 op_5fd8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LE) */
|
|
uae_u32 REGPARAM2 op_5ff8_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LE) */
|
|
uae_u32 REGPARAM2 op_5ff9_48_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_48_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPMR.W (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0108_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u16 val = (get_byte(mempa) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 2) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPMR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_0148_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_u32 val = (get_byte(mempa) & 0xff) << 24;
|
|
val |= (get_byte(mempa + 2) & 0xff) << 16;
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val;
|
|
val |= (get_byte(mempa + 4) & 0xff) << 8;
|
|
val |= (get_byte(mempa + 6) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVPRM.W Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_0188_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 8);
|
|
put_byte(mempa + 2, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(An) */
|
|
uae_u32 REGPARAM2 op_0190_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(An)+ */
|
|
uae_u32 REGPARAM2 op_0198_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,-(An) */
|
|
uae_u32 REGPARAM2 op_01a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* BCLR.B Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_01b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).W */
|
|
uae_u32 REGPARAM2 op_01b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B Dn,(xxx).L */
|
|
uae_u32 REGPARAM2 op_01b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(2);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVPRM.L Dn,(d16,An) */
|
|
uae_u32 REGPARAM2 op_01c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
put_byte(mempa, src >> 24);
|
|
put_byte(mempa + 2, src >> 16);
|
|
put_byte(mempa + 4, src >> 8);
|
|
put_byte(mempa + 6, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0280_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0480_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0680_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An) */
|
|
uae_u32 REGPARAM2 op_0890_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(An)+ */
|
|
uae_u32 REGPARAM2 op_0898_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg);
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,-(An) */
|
|
uae_u32 REGPARAM2 op_08a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d16,An) */
|
|
uae_u32 REGPARAM2 op_08a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_08b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4));
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 4,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).W */
|
|
uae_u32 REGPARAM2 op_08b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = (uae_s32)(uae_s16)get_diword(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BCLR.B #<data>.W,(xxx).L */
|
|
uae_u32 REGPARAM2 op_08b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
uaecptr dsta;
|
|
dsta = get_dilong(4);
|
|
uae_s8 dst = get_byte(dsta);
|
|
src &= 7;
|
|
SET_ZFLG(1 ^ ((dst >> src) & 1));
|
|
dst &= ~(1 << src);
|
|
put_byte(dsta, dst);
|
|
m68k_incpc(8);
|
|
return 0;
|
|
}
|
|
/* 8 0,0 */
|
|
|
|
/* EOR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_0a80_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVSR2.W Dn */
|
|
uae_u32 REGPARAM2 op_40c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
MakeSR();
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An) */
|
|
uae_u32 REGPARAM2 op_40d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (An)+ */
|
|
uae_u32 REGPARAM2 op_40d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W -(An) */
|
|
uae_u32 REGPARAM2 op_40e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
m68k_areg(regs, srcreg) = srca;
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVSR2.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_40e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_40f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MVSR2.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_40f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MVSR2.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_40f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
MakeSR();
|
|
get_word(srca);
|
|
put_word(srca, regs.sr);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* LEA.L (xxx).L,An */
|
|
uae_u32 REGPARAM2 op_41f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
m68k_areg(regs, dstreg) = (srca);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.B Dn */
|
|
uae_u32 REGPARAM2 op_4200_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An) */
|
|
uae_u32 REGPARAM2 op_4210_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4218_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B -(An) */
|
|
uae_u32 REGPARAM2 op_4220_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4228_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4230_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4238_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4239_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(0)) == 0);
|
|
SET_NFLG(((uae_s8)(0)) < 0);
|
|
put_byte(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.W Dn */
|
|
uae_u32 REGPARAM2 op_4240_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An) */
|
|
uae_u32 REGPARAM2 op_4250_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_4258_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W -(An) */
|
|
uae_u32 REGPARAM2 op_4260_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_4268_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4270_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_4278_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_4279_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s16)(0)) == 0);
|
|
SET_NFLG(((uae_s16)(0)) < 0);
|
|
put_word(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* CLR.L Dn */
|
|
uae_u32 REGPARAM2 op_4280_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
m68k_dreg(regs, srcreg) = (0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An) */
|
|
uae_u32 REGPARAM2 op_4290_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (An)+ */
|
|
uae_u32 REGPARAM2 op_4298_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L -(An) */
|
|
uae_u32 REGPARAM2 op_42a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* CLR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_42a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_42b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* CLR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_42b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* CLR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_42b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(0)) == 0);
|
|
SET_NFLG(((uae_s32)(0)) < 0);
|
|
put_long(srca, 0);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B Dn */
|
|
uae_u32 REGPARAM2 op_44c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An) */
|
|
uae_u32 REGPARAM2 op_44d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (An)+ */
|
|
uae_u32 REGPARAM2 op_44d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B -(An) */
|
|
uae_u32 REGPARAM2 op_44e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_44e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_44f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_44f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_44f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.B (d16,PC) */
|
|
uae_u32 REGPARAM2 op_44fa_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.B (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_44fb_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.B #<data>.B */
|
|
uae_u32 REGPARAM2 op_44fc_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
MakeSR();
|
|
regs.sr &= 0xFF00;
|
|
regs.sr |= src & 0xFF;
|
|
MakeFromSR();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W Dn */
|
|
uae_u32 REGPARAM2 op_46c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An) */
|
|
uae_u32 REGPARAM2 op_46d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (An)+ */
|
|
uae_u32 REGPARAM2 op_46d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) += 2;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W -(An) */
|
|
uae_u32 REGPARAM2 op_46e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MV2SR.W (d16,An) */
|
|
uae_u32 REGPARAM2 op_46e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_46f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W (xxx).W */
|
|
uae_u32 REGPARAM2 op_46f8_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (xxx).L */
|
|
uae_u32 REGPARAM2 op_46f9_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MV2SR.W (d16,PC) */
|
|
uae_u32 REGPARAM2 op_46fa_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* MV2SR.W (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_46fb_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s16 src = get_word(srca);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* MV2SR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_46fc_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s16 src = get_diword(2);
|
|
int t1 = regs.t1;
|
|
regs.sr = src;
|
|
MakeFromSR_T0();
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B Dn */
|
|
uae_u32 REGPARAM2 op_4ac0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An) */
|
|
uae_u32 REGPARAM2 op_4ad0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (An)+ */
|
|
uae_u32 REGPARAM2 op_4ad8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B -(An) */
|
|
uae_u32 REGPARAM2 op_4ae0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* TAS.B (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ae8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4af0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* TAS.B (xxx).W */
|
|
uae_u32 REGPARAM2 op_4af8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* TAS.B (xxx).L */
|
|
uae_u32 REGPARAM2 op_4af9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s8)(src)) == 0);
|
|
SET_NFLG(((uae_s8)(src)) < 0);
|
|
uae_u8 old_src = src;
|
|
src |= 0x80;
|
|
put_byte(srca, src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* MVR2USP.L An */
|
|
uae_u32 REGPARAM2 op_4e60_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
regs.usp = src;
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* MVUSP2R.L An */
|
|
uae_u32 REGPARAM2 op_4e68_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
m68k_areg(regs, srcreg) = (regs.usp);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* STOP.L #<data>.W */
|
|
uae_u32 REGPARAM2 op_4e72_49_ff(uae_u32 opcode)
|
|
{
|
|
if (!regs.s) {
|
|
Exception(8);
|
|
return 0;
|
|
}
|
|
if (!regs.stopped) {
|
|
uae_s16 src = get_diword(2);
|
|
regs.irc = src;
|
|
}
|
|
uae_u16 sr = regs.irc;
|
|
checkint();
|
|
regs.sr = sr;
|
|
MakeFromSR_STOP();
|
|
do_cycles_stop(4);
|
|
m68k_setstopped(1);
|
|
return 0;
|
|
}
|
|
|
|
/* RTS.L */
|
|
uae_u32 REGPARAM2 op_4e75_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_rts();
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_pop_rts(oldpc);
|
|
}
|
|
#endif
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr faultpc = m68k_getpc();
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, faultpc);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* TRAPV.L */
|
|
uae_u32 REGPARAM2 op_4e76_49_ff(uae_u32 opcode)
|
|
{
|
|
m68k_incpc(2);
|
|
if (GET_VFLG()) {
|
|
Exception_cpu(7);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* JSR.L (An) */
|
|
uae_u32 REGPARAM2 op_4e90_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JSR.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ea8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4eb0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JSR.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4eb8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(4);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4eb9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 6;
|
|
if (srca & 1) {
|
|
m68k_incpc(6);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(6);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JSR.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4eba_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JSR.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4ebb_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
m68k_areg(regs, 7) -= 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_setpc_j(oldpc);
|
|
m68k_incpc(4);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1);
|
|
return 0;
|
|
}
|
|
put_long(m68k_areg(regs, 7), nextpc);
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (An) */
|
|
uae_u32 REGPARAM2 op_4ed0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* JMP.L (d16,An) */
|
|
uae_u32 REGPARAM2 op_4ee8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,An,Xn) */
|
|
uae_u32 REGPARAM2 op_4ef0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* JMP.L (xxx).W */
|
|
uae_u32 REGPARAM2 op_4ef8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (xxx).L */
|
|
uae_u32 REGPARAM2 op_4ef9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 B */
|
|
|
|
/* JMP.L (d16,PC) */
|
|
uae_u32 REGPARAM2 op_4efa_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* JMP.L (d8,PC,Xn) */
|
|
uae_u32 REGPARAM2 op_4efb_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
if (srca & 1) {
|
|
m68k_incpc(2);
|
|
exception3_read_prefetch_only(opcode, srca);
|
|
return 0;
|
|
}
|
|
m68k_setpc_j(srca);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 B */
|
|
|
|
/* ADDQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (T) */
|
|
uae_u32 REGPARAM2 op_50c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (T) */
|
|
uae_u32 REGPARAM2 op_50c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(0)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(0)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (T) */
|
|
uae_u32 REGPARAM2 op_50d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (T) */
|
|
uae_u32 REGPARAM2 op_50d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (T) */
|
|
uae_u32 REGPARAM2 op_50e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (T) */
|
|
uae_u32 REGPARAM2 op_50e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (T) */
|
|
uae_u32 REGPARAM2 op_50f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (T) */
|
|
uae_u32 REGPARAM2 op_50f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (T) */
|
|
uae_u32 REGPARAM2 op_50f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(0) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBQ.L #<data>,Dn */
|
|
uae_u32 REGPARAM2 op_5180_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)];
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_u32 src = srcreg;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B Dn (F) */
|
|
uae_u32 REGPARAM2 op_51c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (F) */
|
|
uae_u32 REGPARAM2 op_51c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(1)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(1)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (F) */
|
|
uae_u32 REGPARAM2 op_51d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (F) */
|
|
uae_u32 REGPARAM2 op_51d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (F) */
|
|
uae_u32 REGPARAM2 op_51e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (F) */
|
|
uae_u32 REGPARAM2 op_51e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (F) */
|
|
uae_u32 REGPARAM2 op_51f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (F) */
|
|
uae_u32 REGPARAM2 op_51f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (F) */
|
|
uae_u32 REGPARAM2 op_51f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(1) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (HI) */
|
|
uae_u32 REGPARAM2 op_52c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (HI) */
|
|
uae_u32 REGPARAM2 op_52c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(2)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(2)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (HI) */
|
|
uae_u32 REGPARAM2 op_52d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (HI) */
|
|
uae_u32 REGPARAM2 op_52d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (HI) */
|
|
uae_u32 REGPARAM2 op_52e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (HI) */
|
|
uae_u32 REGPARAM2 op_52f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (HI) */
|
|
uae_u32 REGPARAM2 op_52f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (HI) */
|
|
uae_u32 REGPARAM2 op_52f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(2) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LS) */
|
|
uae_u32 REGPARAM2 op_53c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LS) */
|
|
uae_u32 REGPARAM2 op_53c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(3)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(3)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LS) */
|
|
uae_u32 REGPARAM2 op_53d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LS) */
|
|
uae_u32 REGPARAM2 op_53d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LS) */
|
|
uae_u32 REGPARAM2 op_53e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LS) */
|
|
uae_u32 REGPARAM2 op_53f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LS) */
|
|
uae_u32 REGPARAM2 op_53f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LS) */
|
|
uae_u32 REGPARAM2 op_53f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(3) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CC) */
|
|
uae_u32 REGPARAM2 op_54c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CC) */
|
|
uae_u32 REGPARAM2 op_54c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(4)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(4)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CC) */
|
|
uae_u32 REGPARAM2 op_54d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CC) */
|
|
uae_u32 REGPARAM2 op_54d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CC) */
|
|
uae_u32 REGPARAM2 op_54e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CC) */
|
|
uae_u32 REGPARAM2 op_54f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CC) */
|
|
uae_u32 REGPARAM2 op_54f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CC) */
|
|
uae_u32 REGPARAM2 op_54f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(4) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (CS) */
|
|
uae_u32 REGPARAM2 op_55c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (CS) */
|
|
uae_u32 REGPARAM2 op_55c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(5)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(5)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (CS) */
|
|
uae_u32 REGPARAM2 op_55d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (CS) */
|
|
uae_u32 REGPARAM2 op_55d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (CS) */
|
|
uae_u32 REGPARAM2 op_55e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (CS) */
|
|
uae_u32 REGPARAM2 op_55f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (CS) */
|
|
uae_u32 REGPARAM2 op_55f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (CS) */
|
|
uae_u32 REGPARAM2 op_55f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(5) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (NE) */
|
|
uae_u32 REGPARAM2 op_56c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (NE) */
|
|
uae_u32 REGPARAM2 op_56c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(6)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(6)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (NE) */
|
|
uae_u32 REGPARAM2 op_56d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (NE) */
|
|
uae_u32 REGPARAM2 op_56d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (NE) */
|
|
uae_u32 REGPARAM2 op_56e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (NE) */
|
|
uae_u32 REGPARAM2 op_56f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (NE) */
|
|
uae_u32 REGPARAM2 op_56f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (NE) */
|
|
uae_u32 REGPARAM2 op_56f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(6) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (EQ) */
|
|
uae_u32 REGPARAM2 op_57c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (EQ) */
|
|
uae_u32 REGPARAM2 op_57c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(7)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(7)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (EQ) */
|
|
uae_u32 REGPARAM2 op_57d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (EQ) */
|
|
uae_u32 REGPARAM2 op_57e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (EQ) */
|
|
uae_u32 REGPARAM2 op_57f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (EQ) */
|
|
uae_u32 REGPARAM2 op_57f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (EQ) */
|
|
uae_u32 REGPARAM2 op_57f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(7) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VC) */
|
|
uae_u32 REGPARAM2 op_58c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VC) */
|
|
uae_u32 REGPARAM2 op_58c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(8)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(8)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VC) */
|
|
uae_u32 REGPARAM2 op_58d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VC) */
|
|
uae_u32 REGPARAM2 op_58d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VC) */
|
|
uae_u32 REGPARAM2 op_58e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VC) */
|
|
uae_u32 REGPARAM2 op_58f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VC) */
|
|
uae_u32 REGPARAM2 op_58f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VC) */
|
|
uae_u32 REGPARAM2 op_58f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(8) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (VS) */
|
|
uae_u32 REGPARAM2 op_59c0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (VS) */
|
|
uae_u32 REGPARAM2 op_59c8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(9)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(9)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (VS) */
|
|
uae_u32 REGPARAM2 op_59d0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (VS) */
|
|
uae_u32 REGPARAM2 op_59d8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (VS) */
|
|
uae_u32 REGPARAM2 op_59e8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (VS) */
|
|
uae_u32 REGPARAM2 op_59f0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (VS) */
|
|
uae_u32 REGPARAM2 op_59f8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (VS) */
|
|
uae_u32 REGPARAM2 op_59f9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(9) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (PL) */
|
|
uae_u32 REGPARAM2 op_5ac0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (PL) */
|
|
uae_u32 REGPARAM2 op_5ac8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(10)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(10)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ad0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (PL) */
|
|
uae_u32 REGPARAM2 op_5ad8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (PL) */
|
|
uae_u32 REGPARAM2 op_5ae8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (PL) */
|
|
uae_u32 REGPARAM2 op_5af0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (PL) */
|
|
uae_u32 REGPARAM2 op_5af8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (PL) */
|
|
uae_u32 REGPARAM2 op_5af9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(10) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (MI) */
|
|
uae_u32 REGPARAM2 op_5bc0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (MI) */
|
|
uae_u32 REGPARAM2 op_5bc8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(11)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(11)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (MI) */
|
|
uae_u32 REGPARAM2 op_5bd0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (MI) */
|
|
uae_u32 REGPARAM2 op_5bd8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (MI) */
|
|
uae_u32 REGPARAM2 op_5be8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (MI) */
|
|
uae_u32 REGPARAM2 op_5bf0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (MI) */
|
|
uae_u32 REGPARAM2 op_5bf8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (MI) */
|
|
uae_u32 REGPARAM2 op_5bf9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(11) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GE) */
|
|
uae_u32 REGPARAM2 op_5cc0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GE) */
|
|
uae_u32 REGPARAM2 op_5cc8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(12)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(12)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GE) */
|
|
uae_u32 REGPARAM2 op_5cd0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GE) */
|
|
uae_u32 REGPARAM2 op_5cd8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GE) */
|
|
uae_u32 REGPARAM2 op_5ce8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GE) */
|
|
uae_u32 REGPARAM2 op_5cf0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GE) */
|
|
uae_u32 REGPARAM2 op_5cf8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GE) */
|
|
uae_u32 REGPARAM2 op_5cf9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(12) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LT) */
|
|
uae_u32 REGPARAM2 op_5dc0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LT) */
|
|
uae_u32 REGPARAM2 op_5dc8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(13)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(13)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LT) */
|
|
uae_u32 REGPARAM2 op_5dd0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LT) */
|
|
uae_u32 REGPARAM2 op_5dd8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LT) */
|
|
uae_u32 REGPARAM2 op_5de8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LT) */
|
|
uae_u32 REGPARAM2 op_5df0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LT) */
|
|
uae_u32 REGPARAM2 op_5df8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LT) */
|
|
uae_u32 REGPARAM2 op_5df9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(13) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (GT) */
|
|
uae_u32 REGPARAM2 op_5ec0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (GT) */
|
|
uae_u32 REGPARAM2 op_5ec8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(14)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(14)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ed0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (GT) */
|
|
uae_u32 REGPARAM2 op_5ed8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (GT) */
|
|
uae_u32 REGPARAM2 op_5ee8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (GT) */
|
|
uae_u32 REGPARAM2 op_5ef0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (GT) */
|
|
uae_u32 REGPARAM2 op_5ef8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (GT) */
|
|
uae_u32 REGPARAM2 op_5ef9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(14) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* Scc.B Dn (LE) */
|
|
uae_u32 REGPARAM2 op_5fc0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
if (!val) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
}
|
|
opcode |= 0x20000;
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* DBcc.W Dn,#<data>.W (LE) */
|
|
uae_u32 REGPARAM2 op_5fc8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
int pcadjust = -2;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 offs = get_diword(2);
|
|
uaecptr oldpc = m68k_getpc();
|
|
if (!cctrue(15)) {
|
|
m68k_incpc((uae_s32)offs + 2);
|
|
if (offs & 1) {
|
|
exception3_read_prefetch(opcode, m68k_getpc());
|
|
return 0;
|
|
}
|
|
if (src) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
return 0;
|
|
}
|
|
pcadjust = 0;
|
|
}
|
|
m68k_setpc_j(oldpc + 4);
|
|
if (!cctrue(15)) {
|
|
m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);
|
|
}
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* Scc.B (An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fd0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (An)+ (LE) */
|
|
uae_u32 REGPARAM2 op_5fd8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B -(An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* Scc.B (d16,An) (LE) */
|
|
uae_u32 REGPARAM2 op_5fe8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (d8,An,Xn) (LE) */
|
|
uae_u32 REGPARAM2 op_5ff0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* Scc.B (xxx).W (LE) */
|
|
uae_u32 REGPARAM2 op_5ff8_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* Scc.B (xxx).L (LE) */
|
|
uae_u32 REGPARAM2 op_5ff9_49_ff(uae_u32 opcode)
|
|
{
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s8 src = get_byte(srca);
|
|
int val = cctrue(15) ? 0xff : 0x00;
|
|
put_byte(srca, val);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* BSR.W #<data>.W */
|
|
uae_u32 REGPARAM2 op_6100_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_s16 src = get_diword(2);
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 4;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 4 0,0 B */
|
|
|
|
/* BSRQ.B #<data> */
|
|
uae_u32 REGPARAM2 op_6101_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255);
|
|
uae_s32 s;
|
|
uae_u32 src = srcreg;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* BSR.L #<data>.L */
|
|
uae_u32 REGPARAM2 op_61ff_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_s32 s;
|
|
uae_u32 src = 0xffffffff;
|
|
s = (uae_s32)src + 2;
|
|
uaecptr oldpc = m68k_getpc();
|
|
uaecptr nextpc = oldpc + 2;
|
|
if (m68k_areg(regs, 7) & 1) {
|
|
m68k_areg(regs, 7) -= 4;
|
|
m68k_incpc(2);
|
|
exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1);
|
|
return 0;
|
|
}
|
|
m68k_do_bsr(nextpc, s);
|
|
if (m68k_getpc() & 1) {
|
|
uaecptr addr = m68k_getpc();
|
|
m68k_incpc(-2);
|
|
exception3_read_prefetch(opcode, addr);
|
|
return 0;
|
|
}
|
|
#ifdef DEBUGGER
|
|
if (debugmem_trace) {
|
|
branch_stack_push(oldpc, nextpc);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
/* 2 0,0 B */
|
|
|
|
/* OR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_8080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_8090_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_8098_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_80a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* OR.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_80a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_80b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_80b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* OR.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_80ba_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* OR.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_80bb_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* OR.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_80bc_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src |= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L An,Dn */
|
|
uae_u32 REGPARAM2 op_9088_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_9090_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_9098_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_90a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUB.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_90a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_90b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_90b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUB.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_90ba_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* SUB.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_90bb_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* SUB.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_90bc_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgo) & (flgn ^ flgo));
|
|
SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* SUBX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9100_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9108_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9140_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9148_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_9180_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* SUBX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_9188_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgo) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* EOR.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_b180_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = ((real_opcode >> 9) & 7);
|
|
uae_u32 dstreg = real_opcode & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src ^= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_c080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_c090_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_c098_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* AND.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_c0a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_c0b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_c0b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* AND.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_c0ba_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* AND.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_c0bb_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* AND.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_c0bc_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
src &= dst;
|
|
CLEAR_CZNV();
|
|
SET_ZFLG(((uae_s32)(src)) == 0);
|
|
SET_NFLG(((uae_s32)(src)) < 0);
|
|
m68k_dreg(regs, dstreg) = (src);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d080_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L An,Dn */
|
|
uae_u32 REGPARAM2 op_d088_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_areg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An),Dn */
|
|
uae_u32 REGPARAM2 op_d090_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (An)+,Dn */
|
|
uae_u32 REGPARAM2 op_d098_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg);
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) += 4;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L -(An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADD.L (d16,An),Dn */
|
|
uae_u32 REGPARAM2 op_d0a8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,An,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0b0_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L (xxx).W,Dn */
|
|
uae_u32 REGPARAM2 op_d0b8_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (xxx).L,Dn */
|
|
uae_u32 REGPARAM2 op_d0b9_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = get_dilong(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADD.L (d16,PC),Dn */
|
|
uae_u32 REGPARAM2 op_d0ba_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_getpc() + 2;
|
|
srca += (uae_s32)(uae_s16)get_diword(2);
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 0,0 */
|
|
|
|
/* ADD.L (d8,PC,Xn),Dn */
|
|
uae_u32 REGPARAM2 op_d0bb_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
uaecptr tmppc = m68k_getpc() + 2;
|
|
srca = get_disp_ea_000(tmppc, get_diword(2));
|
|
uae_s32 src = get_long(srca);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(4);
|
|
return 0;
|
|
}
|
|
/* 4 4,0 */
|
|
|
|
/* ADD.L #<data>.L,Dn */
|
|
uae_u32 REGPARAM2 op_d0bc_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src;
|
|
src = get_dilong(2);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src));
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_ZFLG(((uae_s32)(newv)) == 0);
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src)));
|
|
COPY_CARRY();
|
|
SET_NFLG(flgn != 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(6);
|
|
return 0;
|
|
}
|
|
/* 6 0,0 */
|
|
|
|
/* ADDX.B Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d100_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s8 src = m68k_dreg(regs, srcreg);
|
|
uae_s8 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.B -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d108_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
|
|
uae_s8 src = get_byte(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
|
|
uae_s8 dst = get_byte(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s8)(src)) < 0;
|
|
int flgo = ((uae_s8)(dst)) < 0;
|
|
int flgn = ((uae_s8)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0));
|
|
SET_NFLG(((uae_s8)(newv)) < 0);
|
|
put_byte(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d140_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s16 src = m68k_dreg(regs, srcreg);
|
|
uae_s16 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.W -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d148_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 2;
|
|
uae_s16 src = get_word(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 2;
|
|
uae_s16 dst = get_word(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int flgs = ((uae_s16)(src)) < 0;
|
|
int flgo = ((uae_s16)(dst)) < 0;
|
|
int flgn = ((uae_s16)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0));
|
|
SET_NFLG(((uae_s16)(newv)) < 0);
|
|
put_word(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L Dn,Dn */
|
|
uae_u32 REGPARAM2 op_d180_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uae_s32 src = m68k_dreg(regs, srcreg);
|
|
uae_s32 dst = m68k_dreg(regs, dstreg);
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
m68k_dreg(regs, dstreg) = (newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|
|
/* ADDX.L -(An),-(An) */
|
|
uae_u32 REGPARAM2 op_d188_49_ff(uae_u32 opcode)
|
|
{
|
|
uae_u32 real_opcode = opcode;
|
|
uae_u32 srcreg = (real_opcode & 7);
|
|
uae_u32 dstreg = (real_opcode >> 9) & 7;
|
|
uaecptr srca;
|
|
srca = m68k_areg(regs, srcreg) - 4;
|
|
uae_s32 src = get_long(srca);
|
|
m68k_areg(regs, srcreg) = srca;
|
|
uaecptr dsta;
|
|
dsta = m68k_areg(regs, dstreg) - 4;
|
|
uae_s32 dst = get_long(dsta);
|
|
m68k_areg(regs, dstreg) = dsta;
|
|
uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0);
|
|
int oldz = GET_ZFLG();
|
|
int flgs = ((uae_s32)(src)) < 0;
|
|
int flgo = ((uae_s32)(dst)) < 0;
|
|
int flgn = ((uae_s32)(newv)) < 0;
|
|
SET_VFLG((flgs ^ flgn) & (flgo ^ flgn));
|
|
SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
|
|
COPY_CARRY();
|
|
SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0));
|
|
SET_NFLG(((uae_s32)(newv)) < 0);
|
|
put_long(dsta, newv);
|
|
m68k_incpc(2);
|
|
return 0;
|
|
}
|
|
/* 2 0,0 */
|
|
|