mirror of
https://github.com/LIV2/WinUAE.git
synced 2025-12-06 00:12:52 +00:00
1073 lines
25 KiB
C++
1073 lines
25 KiB
C++
/*
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* UAE - The Un*x Amiga Emulator
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*
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* A4000T / A4091 NCR 53C710 SCSI
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*
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* (c) 2007-2014 Toni Wilen
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*/
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#include "sysconfig.h"
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#include "sysdeps.h"
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#ifdef NCR
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#define NCR_DEBUG 1
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#include "options.h"
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#include "uae.h"
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#include "memory.h"
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#include "rommgr.h"
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#include "custom.h"
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#include "newcpu.h"
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#include "ncr_scsi.h"
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#include "scsi.h"
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#include "filesys.h"
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#include "zfile.h"
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#include "blkdev.h"
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#include "cpuboard.h"
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#include "qemuvga/qemuuaeglue.h"
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#include "qemuvga/queue.h"
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#include "qemuvga/scsi/scsi.h"
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#include "autoconf.h"
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#include "gui.h"
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#include "devices.h"
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#define BOARD_SIZE 16777216
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#define IO_MASK 0x7f
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#define A4091_ROM_VECTOR 0x0200
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#define A4091_ROM_OFFSET 0x0000
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#define A4091_ROM_SIZE 32768
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#define A4091_ROM_MASK (A4091_ROM_SIZE - 1)
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#define A4091_IO_OFFSET 0x00800000
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#define A4091_IO_ALT 0x00840000
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#define A4091_IO_END 0x00880000
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#define A4091_DIP_OFFSET 0x008c0003
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#define WARP_ENGINE_IO_OFFSET 0x40000
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#define WARP_ENGINE_IO_END 0x80000
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#define CYBERSTORM_SCSI_RAM_OFFSET 0x1000
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#define CYBERSTORM_SCSI_RAM_SIZE 0x2000
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#define CYBERSTORM_SCSI_RAM_MASK 0x1fff
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struct ncr_state
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{
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int id;
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bool newncr;
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DeviceState devobject;
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SCSIDevice *scsid[8];
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SCSIBus scsibus;
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uae_u32 board_mask;
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uae_u8 *rom;
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int ramsize;
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uae_u8 acmemory[128];
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uae_u32 expamem_hi;
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uae_u32 expamem_lo;
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uaecptr baseaddress;
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int configured;
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bool enabled;
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int rom_start, rom_end, rom_offset;
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int io_start, io_end;
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addrbank *bank;
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bool irq;
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bool irqlevel;
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bool z2;
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void (*irq_func)(int, int);
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struct romconfig *rc;
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struct ncr_state **self_ptr;
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};
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#define MAX_NCR_UNITS 10
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static struct ncr_state *ncr_units[MAX_NCR_UNITS + 1];
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static void freescsi (SCSIDevice *scsi)
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{
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if (scsi) {
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free_scsi((struct scsi_data*)scsi->handle);
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xfree (scsi);
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}
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}
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static void freencrunit(struct ncr_state *ncr)
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{
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if (!ncr)
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return;
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for (int i = 0; i < MAX_NCR_UNITS; i++) {
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if (ncr_units[i] == ncr) {
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ncr_units[i] = NULL;
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}
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}
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for (int ch = 0; ch < 8; ch++) {
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freescsi (ncr->scsid[ch]);
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ncr->scsid[ch] = NULL;
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}
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xfree(ncr->rom);
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if (ncr->self_ptr)
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*ncr->self_ptr = NULL;
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xfree(ncr);
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}
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static struct ncr_state *allocscsi(struct ncr_state **ncr, struct romconfig *rc, int ch)
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{
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struct ncr_state *scsi;
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if (ch < 0) {
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freencrunit(*ncr);
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*ncr = NULL;
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}
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if ((*ncr) == NULL) {
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scsi = xcalloc(struct ncr_state, 1);
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for (int i = 0; i < MAX_NCR_UNITS; i++) {
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if (ncr_units[i] == NULL) {
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ncr_units[i] = scsi;
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if (rc)
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rc->unitdata = scsi;
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scsi->rc = rc;
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scsi->self_ptr = ncr;
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*ncr = scsi;
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return scsi;
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}
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}
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}
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return *ncr;
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}
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static struct ncr_state *getscsi(struct romconfig *rc)
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{
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for (int i = 0; i < MAX_NCR_UNITS; i++) {
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if (ncr_units[i]) {
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struct ncr_state *ncr = ncr_units[i];
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if (ncr->rc == rc)
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return ncr;
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}
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}
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return NULL;
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}
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static struct ncr_state *getscsiboard(uaecptr addr)
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{
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for (int i = 0; ncr_units[i]; i++) {
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if (!ncr_units[i]->baseaddress && !ncr_units[i]->configured)
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return ncr_units[i];
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if ((addr & ~ncr_units[i]->board_mask) == ncr_units[i]->baseaddress)
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return ncr_units[i];
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}
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return NULL;
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}
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static struct ncr_state *ncr_cs;
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static struct ncr_state *ncr_bppc;
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static struct ncr_state *ncr_cpuboard;
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static struct ncr_state *ncr_we;
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static struct ncr_state *ncr_a4000t;
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static struct ncr_state *ncra4091[MAX_DUPLICATE_EXPANSION_BOARDS];
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static struct ncr_state *ncr_wildfire;
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static struct ncr_state *ncr_zeus040;
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static void set_irq2(int id, int level)
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{
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if (level)
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safe_interrupt_set(IRQ_SOURCE_NCR, 0, false);
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}
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static void set_irq6(int id, int level)
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{
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if (level)
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safe_interrupt_set(IRQ_SOURCE_NCR, 0, true);
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}
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void ncr_rethink(void)
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{
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for (int i = 0; ncr_units[i]; i++) {
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if (ncr_units[i] != ncr_cs && ncr_units[i]->irq)
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safe_interrupt_set(IRQ_SOURCE_NCR, i + 1, ncr_units[i]->irqlevel);
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}
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if (ncr_cs && ncr_cs->irq)
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cyberstorm_mk3_ppc_irq_setonly(0, 1);
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}
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/* 720+ */
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void pci_set_irq(PCIDevice *pci_dev, int level)
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{
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struct ncr_state *ncr = (struct ncr_state*)pci_dev;
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ncr->irq = level != 0;
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ncr->irq_func(ncr->id, ncr->irq);
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}
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void scsi_req_continue(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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if (sd->data_len < 0) {
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lsi_command_complete(req, sd->status, 0);
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} else if (sd->data_len) {
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lsi_transfer_data(req, sd->data_len);
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} else {
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if (sd->direction > 0)
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scsi_emulate_cmd(sd);
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lsi_command_complete(req, sd->status, 0);
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}
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}
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SCSIRequest *scsi_req_new(SCSIDevice *d, uint32_t tag, uint32_t lun, uint8_t *buf, int len, void *hba_private)
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{
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SCSIRequest *req = xcalloc(SCSIRequest, 1);
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struct scsi_data *sd = (struct scsi_data*)d->handle;
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struct ncr_state *ncr = (struct ncr_state*)sd->privdata;
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req->dev = d;
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req->hba_private = hba_private;
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req->bus = &ncr->scsibus;
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req->bus->qbus.parent = &ncr->devobject;
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memcpy(sd->cmd, buf, len);
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sd->cmd_len = len;
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return req;
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}
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int32_t scsi_req_enqueue(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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if (sd->device_type == UAEDEV_CD)
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gui_flicker_led (LED_CD, sd->id, 1);
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sd->data_len = 0;
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scsi_start_transfer(sd);
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scsi_emulate_analyze(sd);
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//write_log (_T("%02x.%02x.%02x.%02x.%02x.%02x\n"), sd->cmd[0], sd->cmd[1], sd->cmd[2], sd->cmd[3], sd->cmd[4], sd->cmd[5]);
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if (sd->direction <= 0)
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scsi_emulate_cmd(sd);
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if (sd->direction == 0)
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return 1;
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return -sd->direction;
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}
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void scsi_req_unref(SCSIRequest *req)
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{
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xfree(req);
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}
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uint8_t *scsi_req_get_buf(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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sd->data_len = 0;
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return sd->buffer;
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}
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SCSIDevice *scsi_device_find(SCSIBus *bus, int channel, int target, int lun)
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{
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struct ncr_state *ncr = (struct ncr_state*)bus->privdata;
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if (lun != 0 || target < 0 || target >= 8)
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return NULL;
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return ncr->scsid[target];
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}
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void scsi_req_cancel(SCSIRequest *req)
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{
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write_log(_T("scsi_req_cancel\n"));
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}
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int pci_dma_rw(PCIDevice *dev, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir)
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{
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int i = 0;
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uae_u8 *p = (uae_u8*)buf;
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while (len > 0) {
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if (!dir) {
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*p = get_byte(addr);
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}
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else {
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put_byte(addr, *p);
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}
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p++;
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len--;
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addr++;
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}
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return 0;
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}
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/* 710 */
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void pci710_set_irq(PCIDevice *pci_dev, int level)
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{
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struct ncr_state *ncr = (struct ncr_state*)pci_dev;
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ncr->irq = level != 0;
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ncr->irq_func(ncr->id, ncr->irq);
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}
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void scsi710_req_continue(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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if (sd->data_len < 0) {
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lsi710_command_complete(req, sd->status, 0);
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} else if (sd->data_len) {
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lsi710_transfer_data(req, sd->data_len);
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} else {
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if (sd->direction > 0)
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scsi_emulate_cmd(sd);
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lsi710_command_complete(req, sd->status, 0);
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}
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}
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SCSIRequest *scsi710_req_new(SCSIDevice *d, uint32_t tag, uint32_t lun, uint8_t *buf, int len, void *hba_private)
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{
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SCSIRequest *req = xcalloc(SCSIRequest, 1);
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struct scsi_data *sd = (struct scsi_data*)d->handle;
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struct ncr_state *ncr = (struct ncr_state*)sd->privdata;
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req->dev = d;
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req->hba_private = hba_private;
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req->bus = &ncr->scsibus;
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req->bus->qbus.parent = &ncr->devobject;
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memcpy (sd->cmd, buf, len);
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sd->cmd_len = len;
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return req;
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}
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int32_t scsi710_req_enqueue(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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if (sd->device_type == UAEDEV_CD)
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gui_flicker_led (LED_CD, sd->id, 1);
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sd->data_len = 0;
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scsi_start_transfer (sd);
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scsi_emulate_analyze (sd);
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//write_log (_T("%02x.%02x.%02x.%02x.%02x.%02x\n"), sd->cmd[0], sd->cmd[1], sd->cmd[2], sd->cmd[3], sd->cmd[4], sd->cmd[5]);
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if (sd->direction <= 0)
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scsi_emulate_cmd(sd);
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if (sd->direction == 0)
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return 1;
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return -sd->direction;
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}
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void scsi710_req_unref(SCSIRequest *req)
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{
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xfree (req);
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}
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uint8_t *scsi710_req_get_buf(SCSIRequest *req)
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{
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struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
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sd->data_len = 0;
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return sd->buffer;
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}
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SCSIDevice *scsi710_device_find(SCSIBus *bus, int channel, int target, int lun)
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{
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struct ncr_state *ncr = (struct ncr_state*)bus->privdata;
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if (lun != 0 || target < 0 || target >= 8)
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return NULL;
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return ncr->scsid[target];
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}
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void scsi710_req_cancel(SCSIRequest *req)
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{
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write_log (_T("scsi_req_cancel\n"));
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}
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int pci710_dma_rw(PCIDevice *dev, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir)
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{
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int i = 0;
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uae_u8 *p = (uae_u8*)buf;
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while (len > 0) {
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if (!dir) {
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*p = get_byte (addr);
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} else {
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put_byte (addr, *p);
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}
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p++;
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len--;
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addr++;
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}
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return 0;
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}
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static uae_u8 read_rombyte(struct ncr_state *ncr, uaecptr addr)
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{
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uae_u8 v = ncr->rom[addr];
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//write_log (_T("%08X = %02X PC=%08X\n"), addr, v, M68K_GETPC);
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return v;
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}
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static uaecptr beswap(uaecptr addr)
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{
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return (addr & ~3) | (3 - (addr & 3));
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}
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static void ncr_io_bput(struct ncr_state *ncr, uaecptr addr, uae_u32 val)
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{
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if (addr >= CYBERSTORM_SCSI_RAM_OFFSET && ncr->ramsize) {
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cyberstorm_scsi_ram_put(addr, val);
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return;
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}
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addr &= IO_MASK;
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lsi_mmio_write(ncr->devobject.lsistate, beswap(addr), val, 1);
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}
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static void ncr710_io_bput(struct ncr_state *ncr, uaecptr addr, uae_u32 val)
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{
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addr &= IO_MASK;
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lsi710_mmio_write(ncr->devobject.lsistate, beswap(addr), val, 1);
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}
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void cpuboard_ncr710_io_bput(uaecptr addr, uae_u32 v)
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{
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ncr710_io_bput(ncr_cpuboard, addr, v);
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}
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static void ncr_bput2 (struct ncr_state *ncr, uaecptr addr, uae_u32 val)
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{
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uae_u32 v = val;
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addr &= ncr->board_mask;
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if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end)) {
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#if NCR_DEBUG > 1
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write_log(_T("ncr_bput none %08x %02x %08x\n"), addr, v & 0xff, M68K_GETPC);
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#endif
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return;
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}
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#if NCR_DEBUG > 1
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write_log(_T("ncr_bput %08x %02x %08x\n"), addr, v & 0xff, M68K_GETPC);
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#endif
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if (ncr->newncr)
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ncr_io_bput(ncr, addr, val);
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else
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ncr710_io_bput(ncr, addr, val);
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}
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static uae_u32 ncr_io_bget(struct ncr_state *ncr, uaecptr addr)
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{
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if (addr >= CYBERSTORM_SCSI_RAM_OFFSET && ncr->ramsize)
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return cyberstorm_scsi_ram_get(addr);
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addr &= IO_MASK;
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return lsi_mmio_read(ncr->devobject.lsistate, beswap(addr), 1);
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}
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static uae_u32 ncr710_io_bget(struct ncr_state *ncr, uaecptr addr)
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{
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addr &= IO_MASK;
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return lsi710_mmio_read(ncr->devobject.lsistate, beswap(addr), 1);
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}
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uae_u32 cpuboard_ncr710_io_bget(uaecptr addr)
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{
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return ncr710_io_bget(ncr_cpuboard, addr);
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}
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static uae_u32 ncr_bget2 (struct ncr_state *ncr, uaecptr addr)
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{
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uae_u32 v = 0;
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addr &= ncr->board_mask;
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if (ncr->rom && addr >= ncr->rom_start && addr < ncr->rom_end)
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return read_rombyte (ncr, addr - ncr->rom_offset);
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if (addr == A4091_DIP_OFFSET) {
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uae_u8 v = 0;
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v |= ncr->rc->device_id;
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v |= ncr->rc->device_settings << 3;
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v ^= 0xff & ~7;
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return v;
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}
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if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end)) {
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#if NCR_DEBUG > 1
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write_log(_T("ncr_bget none %08x %02x %08x\n"), addr, v, M68K_GETPC);
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#endif
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return v;
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}
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if (ncr->newncr)
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v = ncr_io_bget(ncr, addr);
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else
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v = ncr710_io_bget(ncr, addr);
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#if NCR_DEBUG > 1
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write_log(_T("ncr_bget %08x %02x %08x\n"), addr, v, M68K_GETPC);
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#endif
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return v;
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}
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static uae_u32 REGPARAM2 ncr_lget (struct ncr_state *ncr, uaecptr addr)
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{
|
|
uae_u32 v = 0;
|
|
if (ncr) {
|
|
addr &= ncr->board_mask;
|
|
if (addr >= A4091_IO_ALT) {
|
|
v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
|
|
(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
|
|
} else {
|
|
v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
|
|
(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
|
|
}
|
|
}
|
|
return v;
|
|
}
|
|
|
|
static uae_u32 REGPARAM2 ncr_wget (struct ncr_state *ncr, uaecptr addr)
|
|
{
|
|
uae_u32 v = 0;
|
|
if (ncr) {
|
|
v = (ncr_bget2 (ncr, addr) << 8) | ncr_bget2 (ncr, addr + 1);
|
|
}
|
|
return v;
|
|
}
|
|
|
|
static uae_u32 REGPARAM2 ncr_bget (struct ncr_state *ncr, uaecptr addr)
|
|
{
|
|
uae_u32 v = 0;
|
|
if (ncr) {
|
|
addr &= ncr->board_mask;
|
|
if (!ncr->configured) {
|
|
addr &= 65535;
|
|
if (addr >= sizeof ncr->acmemory)
|
|
return 0;
|
|
return ncr->acmemory[addr];
|
|
}
|
|
v = ncr_bget2 (ncr, addr);
|
|
}
|
|
return v;
|
|
}
|
|
|
|
static void REGPARAM2 ncr_lput (struct ncr_state *ncr, uaecptr addr, uae_u32 l)
|
|
{
|
|
if (!ncr)
|
|
return;
|
|
addr &= ncr->board_mask;
|
|
if (addr >= A4091_IO_ALT) {
|
|
ncr_bput2 (ncr, addr + 3, l >> 0);
|
|
ncr_bput2 (ncr, addr + 2, l >> 8);
|
|
ncr_bput2 (ncr, addr + 1, l >> 16);
|
|
ncr_bput2 (ncr, addr + 0, l >> 24);
|
|
} else {
|
|
ncr_bput2 (ncr, addr + 3, l >> 0);
|
|
ncr_bput2 (ncr, addr + 2, l >> 8);
|
|
ncr_bput2 (ncr, addr + 1, l >> 16);
|
|
ncr_bput2 (ncr, addr + 0, l >> 24);
|
|
}
|
|
}
|
|
|
|
static void REGPARAM2 ncr_wput (struct ncr_state *ncr, uaecptr addr, uae_u32 w)
|
|
{
|
|
if (!ncr)
|
|
return;
|
|
w &= 0xffff;
|
|
addr &= ncr->board_mask;
|
|
if (!ncr->configured) {
|
|
addr &= 65535;
|
|
switch (addr)
|
|
{
|
|
case 0x44:
|
|
map_banks_z3(ncr->bank, expamem_board_pointer >> 16, BOARD_SIZE >> 16);
|
|
ncr->board_mask = 0x00ffffff;
|
|
ncr->baseaddress = expamem_board_pointer;
|
|
ncr->configured = 1;
|
|
expamem_next (ncr->bank, NULL);
|
|
break;
|
|
}
|
|
return;
|
|
}
|
|
ncr_bput2(ncr, addr, w >> 8);
|
|
ncr_bput2 (ncr, addr + 1, w);
|
|
}
|
|
|
|
static void REGPARAM2 ncr_bput (struct ncr_state *ncr, uaecptr addr, uae_u32 b)
|
|
{
|
|
if (!ncr)
|
|
return;
|
|
b &= 0xff;
|
|
addr &= ncr->board_mask;
|
|
if (!ncr->configured) {
|
|
addr &= 65535;
|
|
if (ncr->z2) {
|
|
switch (addr)
|
|
{
|
|
case 0x48:
|
|
ncr->expamem_hi = b & 0xff;
|
|
map_banks_z2(ncr->bank, expamem_board_pointer >> 16, expamem_board_size >> 16);
|
|
ncr->baseaddress = expamem_board_pointer;
|
|
ncr->configured = 1;
|
|
expamem_next(ncr->bank, NULL);
|
|
break;
|
|
case 0x4c:
|
|
ncr->configured = 1;
|
|
expamem_shutup(ncr->bank);
|
|
break;
|
|
case 0x4a:
|
|
ncr->expamem_lo = b & 0xff;
|
|
break;
|
|
}
|
|
} else {
|
|
switch (addr)
|
|
{
|
|
case 0x4c:
|
|
ncr->configured = 1;
|
|
expamem_shutup(ncr->bank);
|
|
break;
|
|
case 0x48:
|
|
ncr->expamem_lo = b & 0xff;
|
|
break;
|
|
}
|
|
}
|
|
return;
|
|
}
|
|
ncr_bput2 (ncr, addr, b);
|
|
}
|
|
|
|
void ncr710_io_bput_a4000t(uaecptr addr, uae_u32 v)
|
|
{
|
|
ncr710_io_bput(ncr_a4000t, addr, v);
|
|
}
|
|
uae_u32 ncr710_io_bget_a4000t(uaecptr addr)
|
|
{
|
|
return ncr710_io_bget(ncr_a4000t, addr);
|
|
}
|
|
|
|
void ncr815_io_bput_wildfire(uaecptr addr, uae_u32 v)
|
|
{
|
|
ncr_io_bput(ncr_wildfire, addr, v);
|
|
}
|
|
uae_u32 ncr815_io_bget_wildfire(uaecptr addr)
|
|
{
|
|
return ncr_io_bget(ncr_wildfire, addr);
|
|
}
|
|
|
|
static void REGPARAM2 ncr_generic_bput (uaecptr addr, uae_u32 b)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
ncr_bput(ncr, addr, b);
|
|
}
|
|
static void REGPARAM2 ncr_generic_wput (uaecptr addr, uae_u32 b)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
ncr_wput(ncr, addr, b);
|
|
}
|
|
static void REGPARAM2 ncr_generic_lput (uaecptr addr, uae_u32 b)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
ncr_lput(ncr, addr, b);
|
|
}
|
|
static uae_u32 REGPARAM2 ncr_generic_bget (uaecptr addr)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
return ncr_bget(ncr, addr);
|
|
return 0;
|
|
}
|
|
static uae_u32 REGPARAM2 ncr_generic_wget (uaecptr addr)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
return ncr_wget(ncr, addr);
|
|
return 0;
|
|
}
|
|
static uae_u32 REGPARAM2 ncr_generic_lget (uaecptr addr)
|
|
{
|
|
struct ncr_state *ncr = getscsiboard(addr);
|
|
if (ncr)
|
|
return ncr_lget(ncr, addr);
|
|
return 0;
|
|
}
|
|
|
|
static void REGPARAM2 cs_bput(uaecptr addr, uae_u32 b)
|
|
{
|
|
ncr_bput(ncr_cs, addr, b);
|
|
}
|
|
static void REGPARAM2 cs_wput(uaecptr addr, uae_u32 b)
|
|
{
|
|
ncr_wput(ncr_cs, addr, b);
|
|
}
|
|
static void REGPARAM2 cs_lput(uaecptr addr, uae_u32 b)
|
|
{
|
|
ncr_lput(ncr_cs, addr, b);
|
|
}
|
|
static uae_u32 REGPARAM2 cs_bget(uaecptr addr)
|
|
{
|
|
return ncr_bget(ncr_cs, addr);
|
|
}
|
|
static uae_u32 REGPARAM2 cs_wget(uaecptr addr)
|
|
{
|
|
return ncr_wget(ncr_cs, addr);
|
|
}
|
|
static uae_u32 REGPARAM2 cs_lget(uaecptr addr)
|
|
{
|
|
return ncr_lget(ncr_cs, addr);
|
|
}
|
|
|
|
static addrbank ncr_bank_cs_scsi_ram = {
|
|
cs_lget, cs_wget, cs_bget,
|
|
cs_lput, cs_wput, cs_bput,
|
|
cyberstorm_scsi_ram_xlate, cyberstorm_scsi_ram_check, NULL, NULL, _T("CyberStorm SCSI RAM"),
|
|
cs_lget, cs_wget,
|
|
ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
|
|
};
|
|
static addrbank ncr_bank_cs_scsi_io = {
|
|
cs_lget, cs_wget, cs_bget,
|
|
cs_lput, cs_wput, cs_bput,
|
|
default_xlate, default_check, NULL, NULL, _T("CyberStorm SCSI IO"),
|
|
dummy_lgeti, dummy_wgeti,
|
|
ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
|
|
};
|
|
|
|
static struct addrbank_sub ncr_sub_bank_cs[] = {
|
|
{ &ncr_bank_cs_scsi_io, 0x0000, 0x0000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0x1000, 0x0000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0x3000, 0x2000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0x5000, 0x4000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0x7000, 0x6000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0x9000, 0x8000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0xb000, 0xa000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0xd000, 0xc000 },
|
|
{ &ncr_bank_cs_scsi_ram, 0xf000, 0xe000 },
|
|
{ NULL }
|
|
};
|
|
|
|
addrbank ncr_bank_cyberstorm = {
|
|
sub_bank_lget, sub_bank_wget, sub_bank_bget,
|
|
sub_bank_lput, sub_bank_wput, sub_bank_bput,
|
|
sub_bank_xlate, sub_bank_check, NULL, NULL, _T("CyberStorm SCSI"),
|
|
sub_bank_lgeti, sub_bank_wgeti,
|
|
ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE, ncr_sub_bank_cs
|
|
};
|
|
|
|
addrbank ncr_bank_generic = {
|
|
ncr_generic_lget, ncr_generic_wget, ncr_generic_bget,
|
|
ncr_generic_lput, ncr_generic_wput, ncr_generic_bput,
|
|
default_xlate, default_check, NULL, NULL, _T("NCR53C700/800"),
|
|
dummy_lgeti, dummy_wgeti,
|
|
ABFLAG_IO | ABFLAG_THREADSAFE | ABFLAG_SAFE, S_READ, S_WRITE
|
|
};
|
|
|
|
static void ew (struct ncr_state *ncr, int addr, uae_u8 value)
|
|
{
|
|
if (addr == 00 || addr == 02 || addr == 0x40 || addr == 0x42) {
|
|
ncr->acmemory[addr] = (value & 0xf0);
|
|
ncr->acmemory[addr + 2] = (value & 0x0f) << 4;
|
|
} else {
|
|
ncr->acmemory[addr] = ~(value & 0xf0);
|
|
ncr->acmemory[addr + 2] = ~((value & 0x0f) << 4);
|
|
}
|
|
}
|
|
|
|
static void ncr_init_board(struct ncr_state *ncr)
|
|
{
|
|
if (!ncr)
|
|
return;
|
|
if (!ncr->devobject.lsistate) {
|
|
if (ncr->newncr)
|
|
lsi_scsi_init(&ncr->devobject);
|
|
else
|
|
lsi710_scsi_init (&ncr->devobject);
|
|
}
|
|
if (ncr->newncr)
|
|
lsi_scsi_reset(&ncr->devobject, ncr);
|
|
else
|
|
lsi710_scsi_reset (&ncr->devobject, ncr);
|
|
ncr->board_mask = 0xffff;
|
|
ncr->irq_func = set_irq2;
|
|
ncr->bank = &ncr_bank_generic;
|
|
ncr->configured = 0;
|
|
}
|
|
|
|
static void ncr_reset_board (struct ncr_state *ncr)
|
|
{
|
|
if (!ncr)
|
|
return;
|
|
ncr->irq = false;
|
|
}
|
|
|
|
// 01010040
|
|
// 01020040 = H
|
|
// 01040040 = J
|
|
// 01080040 = K
|
|
|
|
static const uae_u8 warpengine_a4000_autoconfig[16] = {
|
|
0x90, 0x13, 0x75, 0x00, 0x08, 0x9b, 0x00, 0x19, 0x01, 0x0e, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00
|
|
};
|
|
#define WARP_ENGINE_ROM_SIZE 32768
|
|
|
|
bool ncr710_warpengine_autoconfig_init(struct autoconfig_info *aci)
|
|
{
|
|
aci->autoconfigp = warpengine_a4000_autoconfig;
|
|
if (!aci->doinit)
|
|
return true;
|
|
|
|
struct ncr_state *ncr = getscsi(aci->rc);
|
|
if (!ncr)
|
|
return false;
|
|
|
|
xfree(ncr->rom);
|
|
ncr->rom = NULL;
|
|
|
|
ncr->enabled = true;
|
|
memset (ncr->acmemory, 0xff, sizeof ncr->acmemory);
|
|
ncr->rom_start = 0x10;
|
|
ncr->rom_offset = 0;
|
|
ncr->rom_end = WARP_ENGINE_ROM_SIZE * 4;
|
|
ncr->io_start = WARP_ENGINE_IO_OFFSET;
|
|
ncr->io_end = WARP_ENGINE_IO_END;
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
uae_u8 b = warpengine_a4000_autoconfig[i];
|
|
if (i == 9) {
|
|
b = currprefs.cpuboard_settings & 7;
|
|
if (!b)
|
|
b = 1;
|
|
else
|
|
b <<= 1;
|
|
}
|
|
ew(ncr, i * 4, b);
|
|
}
|
|
ncr->rom = xcalloc (uae_u8, WARP_ENGINE_ROM_SIZE * 4);
|
|
struct zfile *z = read_device_from_romconfig(aci->rc, ROMTYPE_CB_WENGINE);
|
|
if (z) {
|
|
for (int i = 0; i < WARP_ENGINE_ROM_SIZE; i++) {
|
|
uae_u8 b = 0xff;
|
|
zfile_fread(&b, 1, 1, z);
|
|
ncr->rom[i * 4 + 0] = b | 0x0f;
|
|
ncr->rom[i * 4 + 1] = 0xff;
|
|
ncr->rom[i * 4 + 2] = (b << 4) | 0x0f;
|
|
ncr->rom[i * 4 + 3] = 0xff;
|
|
}
|
|
zfile_fclose(z);
|
|
}
|
|
|
|
ncr_reset_board(ncr);
|
|
|
|
aci->addrbank = &ncr_bank_generic;
|
|
return true;
|
|
}
|
|
|
|
bool ncr710_a4091_autoconfig_init (struct autoconfig_info *aci)
|
|
{
|
|
uae_u8 *rom = NULL;
|
|
struct zfile *z = read_device_from_romconfig(aci->rc, ROMTYPE_A4091);
|
|
if (z) {
|
|
rom = xmalloc(uae_u8, A4091_ROM_SIZE * 4);
|
|
for (int i = 0; i < A4091_ROM_SIZE; i++) {
|
|
uae_u8 b;
|
|
zfile_fread(&b, 1, 1, z);
|
|
rom[i * 4 + 0] = b | 0x0f;
|
|
rom[i * 4 + 2] = (b << 4) | 0x0f;
|
|
if (i < 0x20) {
|
|
aci->autoconfig_raw[i * 4 + 0] = b;
|
|
} else if (i >= 0x40 && i < 0x60) {
|
|
aci->autoconfig_raw[(i - 0x40) * 4 + 2] = b;
|
|
}
|
|
}
|
|
zfile_fclose(z);
|
|
}
|
|
|
|
if (!aci->doinit) {
|
|
xfree(rom);
|
|
return true;
|
|
}
|
|
|
|
struct ncr_state *ncr = getscsi(aci->rc);
|
|
if (!ncr)
|
|
return false;
|
|
|
|
xfree(ncr->rom);
|
|
ncr->rom = rom;
|
|
|
|
ncr->enabled = true;
|
|
memcpy(ncr->acmemory, aci->autoconfig_raw, sizeof ncr->acmemory);
|
|
ncr->rom_start = 0;
|
|
ncr->rom_offset = A4091_ROM_OFFSET;
|
|
ncr->rom_end = A4091_IO_OFFSET;
|
|
ncr->io_start = A4091_IO_OFFSET;
|
|
ncr->io_end = A4091_IO_END;
|
|
|
|
ncr_reset_board(ncr);
|
|
|
|
aci->addrbank = &ncr_bank_generic;
|
|
return true;
|
|
}
|
|
|
|
static const uae_u8 zeus040_autoconfig[16] = {
|
|
0xd1, 0x96, 0x40, 0x00, 0x07, 0xea, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
|
|
};
|
|
|
|
bool ncr710_zeus040_autoconfig_init(struct autoconfig_info *aci)
|
|
{
|
|
aci->autoconfigp = zeus040_autoconfig;
|
|
if (!aci->doinit)
|
|
return true;
|
|
|
|
struct ncr_state *ncr = getscsi(aci->rc);
|
|
if (!ncr)
|
|
return false;
|
|
|
|
xfree(ncr->rom);
|
|
ncr->rom = NULL;
|
|
|
|
ncr->enabled = true;
|
|
memset(ncr->acmemory, 0xff, sizeof ncr->acmemory);
|
|
ncr->rom_start = 0x8000;
|
|
ncr->rom_offset = 0x8000;
|
|
ncr->rom_end = 0x10000;
|
|
ncr->io_start = 0x4000;
|
|
ncr->io_end = 0x8000;
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
uae_u8 b = zeus040_autoconfig[i];
|
|
if (i == 0 && (currprefs.cpuboard_settings & 1))
|
|
b &= ~0x10;
|
|
ew(ncr, i * 4, b);
|
|
}
|
|
ncr->rom = xcalloc(uae_u8, 32768);
|
|
load_rom_rc(aci->rc, ROMTYPE_CB_ZEUS040, 16384, 0, ncr->rom, 32768, 0);
|
|
|
|
ncr_reset_board(ncr);
|
|
|
|
aci->addrbank = &ncr_bank_generic;
|
|
return true;
|
|
}
|
|
|
|
|
|
void ncr_free(void)
|
|
{
|
|
for (int i = 0; i < MAX_NCR_UNITS; i++) {
|
|
freencrunit(ncr_units[i]);
|
|
}
|
|
}
|
|
|
|
void ncr_init(void)
|
|
{
|
|
}
|
|
|
|
void ncr_reset(void)
|
|
{
|
|
for (int i = 0; i < MAX_NCR_UNITS; i++) {
|
|
ncr_reset_board(ncr_units[i]);
|
|
}
|
|
}
|
|
|
|
static void allocscsidevice(struct ncr_state *ncr, int ch, struct scsi_data *handle)
|
|
{
|
|
handle->privdata = ncr;
|
|
ncr->scsid[ch] = xcalloc (SCSIDevice, 1);
|
|
ncr->scsid[ch]->id = ch;
|
|
ncr->scsid[ch]->handle = handle;
|
|
}
|
|
|
|
static void add_ncr_scsi_hd (struct ncr_state *ncr, int ch, struct hd_hardfiledata *hfd, struct uaedev_config_info *ci)
|
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{
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struct scsi_data *handle = NULL;
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freescsi (ncr->scsid[ch]);
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ncr->scsid[ch] = NULL;
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if (!add_scsi_hd(&handle, ch, hfd, ci))
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return;
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allocscsidevice(ncr, ch, handle);
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ncr->enabled = true;
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}
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static void add_ncr_scsi_cd (struct ncr_state *ncr, int ch, int unitnum)
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{
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struct scsi_data *handle = NULL;
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freescsi (ncr->scsid[ch]);
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ncr->scsid[ch] = NULL;
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if (!add_scsi_cd(&handle, ch, unitnum))
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return;
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allocscsidevice(ncr, ch, handle);
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ncr->enabled = true;
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}
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static void add_ncr_scsi_tape (struct ncr_state *ncr, int ch, const TCHAR *tape_directory, bool readonly)
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{
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struct scsi_data *handle = NULL;
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freescsi (ncr->scsid[ch]);
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ncr->scsid[ch] = NULL;
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if (!add_scsi_tape(&handle, ch, tape_directory, readonly))
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return;
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allocscsidevice(ncr, ch, handle);
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ncr->enabled = true;
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}
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static void ncr_add_scsi_unit(struct ncr_state **ncrp, int ch, struct uaedev_config_info *ci, struct romconfig *rc, bool newncr)
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{
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struct ncr_state *ncr = allocscsi(ncrp, rc, ch);
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if (!ncr)
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return;
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ncr->newncr = newncr;
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ncr_init_board(ncr);
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if (ch >= 0 && ncr) {
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if (ci->type == UAEDEV_CD)
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add_ncr_scsi_cd (ncr, ch, ci->device_emu_unit);
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else if (ci->type == UAEDEV_TAPE)
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add_ncr_scsi_tape (ncr, ch, ci->rootdir, ci->readonly);
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else if (ci->type == UAEDEV_HDF)
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add_ncr_scsi_hd (ncr, ch, NULL, ci);
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}
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}
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bool a4000t_scsi_init(struct autoconfig_info *aci)
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{
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aci->start = 0xdd0000;
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aci->size = 0x10000;
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aci->zorro = 0;
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return true;
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}
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bool is_a4000t_scsi(void)
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{
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return ncr_a4000t && ncr_a4000t->enabled;
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}
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|
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void a4000t_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
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{
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ncr_add_scsi_unit(&ncr_a4000t, ch, ci, rc, false);
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ncr_a4000t->configured = -1;
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ncr_a4000t->enabled = true;
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}
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|
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void warpengine_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
|
|
{
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|
ncr_add_scsi_unit(&ncr_we, ch, ci, rc, false);
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}
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|
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void tekmagic_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
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{
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ncr_add_scsi_unit(&ncr_cpuboard, ch, ci, rc, false);
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}
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|
|
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void a4091_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
|
|
{
|
|
ncr_add_scsi_unit(&ncra4091[ci->controller_type_unit], ch, ci, rc, false);
|
|
}
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|
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void cyberstorm_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
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|
{
|
|
ncr_add_scsi_unit(&ncr_cs, ch, ci, rc, true);
|
|
ncr_cs->configured = -1;
|
|
ncr_cs->enabled = true;
|
|
ncr_cs->ramsize = CYBERSTORM_SCSI_RAM_SIZE;
|
|
ncr_cs->irq_func = cyberstorm_mk3_ppc_irq;
|
|
ncr_cs->bank = &ncr_bank_cyberstorm;
|
|
ncr_cs->baseaddress = 0xf40000;
|
|
}
|
|
|
|
void blizzardppc_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
|
|
{
|
|
ncr_add_scsi_unit(&ncr_bppc, ch, ci, rc, false);
|
|
ncr_bppc->configured = -1;
|
|
ncr_bppc->enabled = true;
|
|
ncr_bppc->irq_func = blizzardppc_irq;
|
|
ncr_bppc->bank = &ncr_bank_cyberstorm;
|
|
ncr_bppc->baseaddress = 0xf40000;
|
|
}
|
|
|
|
void wildfire_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
|
|
{
|
|
ncr_add_scsi_unit(&ncr_wildfire, ch, ci, rc, true);
|
|
ncr_wildfire->configured = -1;
|
|
ncr_wildfire->enabled = true;
|
|
ncr_wildfire->irq_func = wildfire_ncr815_irq;
|
|
ncr_wildfire->bank = &ncr_bank_generic;
|
|
}
|
|
|
|
void zeus040_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
|
|
{
|
|
ncr_add_scsi_unit(&ncr_zeus040, ch, ci, rc, false);
|
|
ncr_zeus040->irq_func = set_irq6;
|
|
ncr_zeus040->irqlevel = true;
|
|
ncr_zeus040->z2 = true;
|
|
}
|
|
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|
#endif
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