[cputest]

; CPU model (68000, 68020).
; Always select 68020 when testing FPU instructions, even if test hardware CPU is 68040 or 68060.
cpu=68000

; FPU model (empty string or 0, 68881, 68882, 68040, 68060)
; Enable only when testing FPU. Enabled FPU mode will slow down execution.
fpu=

; Write generated instructions to standard output. Always disabled in "all" mode.
verbose=1

; Where to generate test files
path=data/

; Low address space limits (0x0000 to 0x8000 is complete space)
test_low_memory_start=0x0000
test_low_memory_end=0x8000

; High address space limits (0x00ff8000 to 0x01000000 is complete space)
test_high_memory_start=0x00ff8000
test_high_memory_end=0x01000000

; ROM high address space
high_rom=D:\amiga\roms\Kickstart v3.1 rev 40.63 (1993)(Commodore)(A500-A600-A2000)[!].rom

; main test memory start and size (real hardware must have RAM in same address space)
test_memory_start=0x780000
test_memory_size=0x080000

; test word or long odd data access address errors (68000/010 only)
; 0 = do not generate address errors
; 1 = include address errors
; 2 = only generate test instructions that generate address errors
feature_exception3_data=1

; test branches to odd addresses
; same as above
feature_exception3_instruction=1

; SR extra mask.
; 0x8000 = T1
; 0x4000 = T0 (68020)
; 0x2000 = S
; 0x1000 = M (68020)
; Other bits are ignored.
; For example 0xa000 adds 3 extra test rounds: S=1/T1=0, S=0/T1=1 and S=1/T1=1
; Note: instructions that generate privilege violation exception will automatically add extra S=1 round.
feature_sr_mask=0x0000

; 68020+ addressing modes (this makes test files much larger if other addressing modes are also enabled)
; currently does not generate any reserved mode bit combinations.
feature_full_extension_format=0

; empty = all addressing modes (feature_full_extension_format=1 enables 68020+ modes)
; Dreg, Areg, Aind, Aipi, Apdi, Ad16, PC16, Ad8r, PC8r, absw, absl, imm.
; Ad8rf and PC8rf = 68020+ full extension only. For example "Aind,Aipi,imm"
; Note: FPU source EA is considered destination EA.
feature_addressing_modes_src=
feature_addressing_modes_dst=

; mnemonics separated by comma or all.
; all = generate all. tst = generate tst.b, tst.w and tst.l. tst.l = generate only tst.l
mode=abcd,mv2sr,mvsr2