LIV2/WinUAE
1
0
Fork 0
mirror of https://github.com/LIV2/WinUAE.git synced 2025-12-06 00:12:52 +00:00
Code Issues Packages Projects Releases Wiki Activity

MMU mode MOVEM.x <regs>,-(An) where <regs> includes target An update.

Browse Source
This commit is contained in:
Toni Wilen 2023-09-17 11:06:51 +03:00
parent c58eee00c1
commit fe444426bf
6 changed files with 259 additions and 126 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
cpuemu_31.cpp
View File

@ -18663,12 +18663,14 @@ uae_u32 REGPARAM2 op_4890_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -18696,12 +18698,14 @@ uae_u32 REGPARAM2 op_48a0_31_ff(uae_u32 opcode)
mmu040_movem_ea = srca;
while (amask) {
srca -= 2;
put_word_mmu040(srca, m68k_areg (regs, movem_index2[amask]));
int predec = movem_index2[amask] != dstreg ? 0 : 2;
put_word_mmu040(srca, m68k_areg (regs, movem_index2[amask]) - predec);
amask = movem_next[amask];
}
while (dmask) {
srca -= 2;
put_word_mmu040(srca, m68k_dreg (regs, movem_index2[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index2[dmask]) - predec);
dmask = movem_next[dmask];
}
m68k_areg(regs, dstreg) = srca;
@ -18728,12 +18732,14 @@ uae_u32 REGPARAM2 op_48a8_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -18761,12 +18767,14 @@ uae_u32 REGPARAM2 op_48b0_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -18790,12 +18798,14 @@ uae_u32 REGPARAM2 op_48b8_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -18820,12 +18830,14 @@ uae_u32 REGPARAM2 op_48b9_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -18869,12 +18881,14 @@ uae_u32 REGPARAM2 op_48d0_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -18902,12 +18916,14 @@ uae_u32 REGPARAM2 op_48e0_31_ff(uae_u32 opcode)
mmu040_movem_ea = srca;
while (amask) {
srca -= 4;
put_long_mmu040(srca, m68k_areg (regs, movem_index2[amask]));
int predec = movem_index2[amask] != dstreg ? 0 : 4;
put_long_mmu040(srca, m68k_areg (regs, movem_index2[amask]) - predec);
amask = movem_next[amask];
}
while (dmask) {
srca -= 4;
put_long_mmu040(srca, m68k_dreg (regs, movem_index2[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index2[dmask]) - predec);
dmask = movem_next[dmask];
}
m68k_areg(regs, dstreg) = srca;
@ -18934,12 +18950,14 @@ uae_u32 REGPARAM2 op_48e8_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -18967,12 +18985,14 @@ uae_u32 REGPARAM2 op_48f0_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -18996,12 +19016,14 @@ uae_u32 REGPARAM2 op_48f8_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -19026,12 +19048,14 @@ uae_u32 REGPARAM2 op_48f9_31_ff(uae_u32 opcode)
mmu040_movem = 1;
mmu040_movem_ea = srca;
while (dmask) {
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}

72
cpuemu_32.cpp
View File

@ -18633,7 +18633,8 @@ uae_u32 REGPARAM2 op_4890_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -18655,7 +18656,8 @@ uae_u32 REGPARAM2 op_4890_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -18698,7 +18700,8 @@ uae_u32 REGPARAM2 op_48a0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 2;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -18721,7 +18724,8 @@ uae_u32 REGPARAM2 op_48a0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -18764,7 +18768,8 @@ uae_u32 REGPARAM2 op_48a8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -18786,7 +18791,8 @@ uae_u32 REGPARAM2 op_48a8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -18829,7 +18835,8 @@ uae_u32 REGPARAM2 op_48b0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.instruction_pc = m68k_getpci();
mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE;
@ -18850,7 +18857,8 @@ uae_u32 REGPARAM2 op_48b0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.instruction_pc = m68k_getpci();
mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE;
@ -18888,7 +18896,8 @@ uae_u32 REGPARAM2 op_48b8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -18910,7 +18919,8 @@ uae_u32 REGPARAM2 op_48b8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -18950,7 +18960,8 @@ uae_u32 REGPARAM2 op_48b9_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(8);
regs.instruction_pc = m68k_getpci();
@ -18972,7 +18983,8 @@ uae_u32 REGPARAM2 op_48b9_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(8);
regs.instruction_pc = m68k_getpci();
@ -19031,7 +19043,8 @@ uae_u32 REGPARAM2 op_48d0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -19053,7 +19066,8 @@ uae_u32 REGPARAM2 op_48d0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -19096,7 +19110,8 @@ uae_u32 REGPARAM2 op_48e0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 4;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -19119,7 +19134,8 @@ uae_u32 REGPARAM2 op_48e0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(4);
regs.instruction_pc = m68k_getpci();
@ -19162,7 +19178,8 @@ uae_u32 REGPARAM2 op_48e8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -19184,7 +19201,8 @@ uae_u32 REGPARAM2 op_48e8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -19227,7 +19245,8 @@ uae_u32 REGPARAM2 op_48f0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.instruction_pc = m68k_getpci();
mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE;
@ -19248,7 +19267,8 @@ uae_u32 REGPARAM2 op_48f0_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.instruction_pc = m68k_getpci();
mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE;
@ -19286,7 +19306,8 @@ uae_u32 REGPARAM2 op_48f8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -19308,7 +19329,8 @@ uae_u32 REGPARAM2 op_48f8_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(6);
regs.instruction_pc = m68k_getpci();
@ -19348,7 +19370,8 @@ uae_u32 REGPARAM2 op_48f9_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
m68k_incpci(8);
regs.instruction_pc = m68k_getpci();
@ -19370,7 +19393,8 @@ uae_u32 REGPARAM2 op_48f9_32_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
m68k_incpci(8);
regs.instruction_pc = m68k_getpci();

72
cpuemu_33.cpp
View File

@ -17654,12 +17654,14 @@ uae_u32 REGPARAM2 op_4890_33_ff(uae_u32 opcode)
srca = m68k_areg(regs, dstreg);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -17680,12 +17682,14 @@ uae_u32 REGPARAM2 op_48a0_33_ff(uae_u32 opcode)
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
while (amask) {
srca -= 2;
put_word_mmu060(srca, m68k_areg (regs, movem_index2[amask]));
int predec = movem_index2[amask] != dstreg ? 0 : 2;
put_word_mmu060(srca, m68k_areg (regs, movem_index2[amask]) - predec);
amask = movem_next[amask];
}
while (dmask) {
srca -= 2;
put_word_mmu060(srca, m68k_dreg (regs, movem_index2[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index2[dmask]) - predec);
dmask = movem_next[dmask];
}
m68k_areg(regs, dstreg) = srca;
@ -17705,12 +17709,14 @@ uae_u32 REGPARAM2 op_48a8_33_ff(uae_u32 opcode)
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -17731,12 +17737,14 @@ uae_u32 REGPARAM2 op_48b0_33_ff(uae_u32 opcode)
srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -17753,12 +17761,14 @@ uae_u32 REGPARAM2 op_48b8_33_ff(uae_u32 opcode)
srca = (uae_s32)(uae_s16)get_iword_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -17776,12 +17786,14 @@ uae_u32 REGPARAM2 op_48b9_33_ff(uae_u32 opcode)
srca = get_ilong_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 2;
dmask = movem_next[dmask];
}
while (amask) {
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 2;
amask = movem_next[amask];
}
@ -17818,12 +17830,14 @@ uae_u32 REGPARAM2 op_48d0_33_ff(uae_u32 opcode)
srca = m68k_areg(regs, dstreg);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -17844,12 +17858,14 @@ uae_u32 REGPARAM2 op_48e0_33_ff(uae_u32 opcode)
uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
while (amask) {
srca -= 4;
put_long_mmu060(srca, m68k_areg (regs, movem_index2[amask]));
int predec = movem_index2[amask] != dstreg ? 0 : 4;
put_long_mmu060(srca, m68k_areg (regs, movem_index2[amask]) - predec);
amask = movem_next[amask];
}
while (dmask) {
srca -= 4;
put_long_mmu060(srca, m68k_dreg (regs, movem_index2[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index2[dmask]) - predec);
dmask = movem_next[dmask];
}
m68k_areg(regs, dstreg) = srca;
@ -17869,12 +17885,14 @@ uae_u32 REGPARAM2 op_48e8_33_ff(uae_u32 opcode)
srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -17895,12 +17913,14 @@ uae_u32 REGPARAM2 op_48f0_33_ff(uae_u32 opcode)
srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -17917,12 +17937,14 @@ uae_u32 REGPARAM2 op_48f8_33_ff(uae_u32 opcode)
srca = (uae_s32)(uae_s16)get_iword_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}
@ -17940,12 +17962,14 @@ uae_u32 REGPARAM2 op_48f9_33_ff(uae_u32 opcode)
srca = get_ilong_mmu060(4);
uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
while (dmask) {
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]));
int predec = 0;
put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask]) - predec);
srca += 4;
dmask = movem_next[dmask];
}
while (amask) {
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]));
int predec = 0;
put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask]) - predec);
srca += 4;
amask = movem_next[amask];
}

72
cpuemu_34.cpp
View File

@ -19454,7 +19454,8 @@ uae_u32 REGPARAM2 op_4890_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19477,7 +19478,8 @@ uae_u32 REGPARAM2 op_4890_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19522,7 +19524,8 @@ uae_u32 REGPARAM2 op_48a0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 2;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19546,7 +19549,8 @@ uae_u32 REGPARAM2 op_48a0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19591,7 +19595,8 @@ uae_u32 REGPARAM2 op_48a8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -19614,7 +19619,8 @@ uae_u32 REGPARAM2 op_48a8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -19659,7 +19665,8 @@ uae_u32 REGPARAM2 op_48b0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -19681,7 +19688,8 @@ uae_u32 REGPARAM2 op_48b0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -19721,7 +19729,8 @@ uae_u32 REGPARAM2 op_48b8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -19744,7 +19753,8 @@ uae_u32 REGPARAM2 op_48b8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -19786,7 +19796,8 @@ uae_u32 REGPARAM2 op_48b9_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -19809,7 +19820,8 @@ uae_u32 REGPARAM2 op_48b9_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -19871,7 +19883,8 @@ uae_u32 REGPARAM2 op_48d0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19894,7 +19907,8 @@ uae_u32 REGPARAM2 op_48d0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19939,7 +19953,8 @@ uae_u32 REGPARAM2 op_48e0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 4;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -19963,7 +19978,8 @@ uae_u32 REGPARAM2 op_48e0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -20008,7 +20024,8 @@ uae_u32 REGPARAM2 op_48e8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -20031,7 +20048,8 @@ uae_u32 REGPARAM2 op_48e8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -20076,7 +20094,8 @@ uae_u32 REGPARAM2 op_48f0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -20098,7 +20117,8 @@ uae_u32 REGPARAM2 op_48f0_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -20138,7 +20158,8 @@ uae_u32 REGPARAM2 op_48f8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -20161,7 +20182,8 @@ uae_u32 REGPARAM2 op_48f8_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -20203,7 +20225,8 @@ uae_u32 REGPARAM2 op_48f9_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -20226,7 +20249,8 @@ uae_u32 REGPARAM2 op_48f9_34_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);

72
cpuemu_35.cpp
View File

@ -21023,7 +21023,8 @@ void REGPARAM2 op_4890_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21046,7 +21047,8 @@ void REGPARAM2 op_4890_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21091,7 +21093,8 @@ void REGPARAM2 op_48a0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 2;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21115,7 +21118,8 @@ void REGPARAM2 op_48a0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21160,7 +21164,8 @@ void REGPARAM2 op_48a8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21183,7 +21188,8 @@ void REGPARAM2 op_48a8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21228,7 +21234,8 @@ void REGPARAM2 op_48b0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -21250,7 +21257,8 @@ void REGPARAM2 op_48b0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -21290,7 +21298,8 @@ void REGPARAM2 op_48b8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21313,7 +21322,8 @@ void REGPARAM2 op_48b8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21355,7 +21365,8 @@ void REGPARAM2 op_48b9_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -21378,7 +21389,8 @@ void REGPARAM2 op_48b9_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -21441,7 +21453,8 @@ void REGPARAM2 op_48d0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21464,7 +21477,8 @@ void REGPARAM2 op_48d0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21509,7 +21523,8 @@ void REGPARAM2 op_48e0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]);
int predec = movem_index2[amask] != dstreg ? 0 : 4;
mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21533,7 +21548,8 @@ void REGPARAM2 op_48e0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(4);
m68k_incpci(4);
@ -21578,7 +21594,8 @@ void REGPARAM2 op_48e8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21601,7 +21618,8 @@ void REGPARAM2 op_48e8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21646,7 +21664,8 @@ void REGPARAM2 op_48f0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -21668,7 +21687,8 @@ void REGPARAM2 op_48f0_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(0);
regs.instruction_pc = m68k_getpci();
@ -21708,7 +21728,8 @@ void REGPARAM2 op_48f8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21731,7 +21752,8 @@ void REGPARAM2 op_48f8_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(6);
m68k_incpci(6);
@ -21773,7 +21795,8 @@ void REGPARAM2 op_48f9_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]);
int predec = 0;
mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]) - predec;
if(!amask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);
@ -21796,7 +21819,8 @@ void REGPARAM2 op_48f9_35_ff(uae_u32 opcode)
if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {
mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;
} else {
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]);
int predec = 0;
mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]) - predec;
if(!dmask && !nextmask) {
regs.irc = get_iword_mmu030c_opcode_state(8);
m68k_incpci(8);

25
gencpu.cpp
View File

@ -4342,7 +4342,12 @@ static void movem_mmu060 (const char *code, int size, bool put, bool aipi, bool
if (apdi)
out("srca -= %d;\n", size);
if (put) {
out("%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg);
if (apdi && !i) {
out("int predec = movem_index2[amask] != dstreg ? 0 : %d;\n", size);
} else {
out("int predec = 0;\n");
}
out("%s, m68k_%creg (regs, %s[%cmask]) - predec);\n", code, reg, index, reg);
} else {
out("m68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code);
}
@ -4390,7 +4395,12 @@ static void movem_mmu040 (const char *code, int size, bool put, bool aipi, bool
if (apdi)
out("srca -= %d;\n", size);
if (put) {
out("%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg);
if (apdi && !i) {
out("int predec = movem_index2[amask] != dstreg ? 0 : %d;\n", size);
} else {
out("int predec = 0;\n");
}
out("%s, m68k_%creg (regs, %s[%cmask]) - predec);\n", code, reg, index, reg);
} else {
out("m68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code);
}
@ -4447,7 +4457,12 @@ static void movem_mmu030 (const char *code, int size, bool put, bool aipi, bool
out("val = %smmu030_data_buffer_out;\n", size == 2 ? "(uae_s32)(uae_s16)" : "");
out("} else {\n");
if (put) {
out("mmu030_data_buffer_out = m68k_%creg(regs, %s[%cmask]);\n", reg, index, reg);
if (apdi && !i) {
out("int predec = movem_index2[amask] != dstreg ? 0 : %d;\n", size);
} else {
out("int predec = 0;\n");
}
out("mmu030_data_buffer_out = m68k_%creg(regs, %s[%cmask]) - predec;\n", reg, index, reg);
if (MMU68030_LAST_WRITE) {
// last write?
if (dphase == i)
@ -4742,9 +4757,7 @@ static void genmovemle(uae_u16 opcode)
if (table68k[opcode].dmode == Apdi) {
out("uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
movem_ex3(1);
if (!using_mmu) {
out("int type = %d;\n", cpu_level > 1);
}
out("int type = %d;\n", cpu_level > 1);
out("while (amask) {\n");
out("srca -= %d;\n", size);