mirror of
https://github.com/LIV2/WinUAE.git
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CPUTester update (68000 IPL timing, wait states, etc)
This commit is contained in:
Toni Wilen
parent
645df54f71
commit
819595132d
622
cputest.cpp
622
cputest.cpp
File diff suppressed because it is too large
Load Diff
@ -6,6 +6,8 @@
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.globl _allocate_absolute
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.globl _free_absolute
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.globl _allocate_blttemp
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.globl _free_blttemp
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.globl _touser
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.globl _tosuper
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.globl _testexit
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@ -44,12 +46,29 @@ uaefuncname:
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.asciz "uaelib_demux"
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sync:
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move.l a1,d0
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lea 0xdff040,a1
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move.w #0x0400+0x200+0x0100,(a1)+ | BCD
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move.w #0x0000,(a1)+
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addq.l #4,a1
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move.l d0,(a1)+ | A
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move.l d0,(a1)+ | B
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move.l d0,(a1)+ | C
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move.l d0,(a1)+ | D
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move.b 0xdff006,d0
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beq.s sync
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cmp.b #0xff,d0
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beq.s sync
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cmp.b #0x38,d0
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beq.s sync
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cmp.b #0xfc,d0
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bcc.s sync
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cmp.b #0x34,d0
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bcs.s sync2
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cmp.b #0x39,d0
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bcs.s sync
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sync2:
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move.b 0xdff007,d0
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cmp.b #110,d0
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bcs.s sync2
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cmp.b #130,d0
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bcc.s sync2
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| above prevent wraparound between
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| dff004.w and dff006.w reads
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move.l 0xdff004,d0
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@ -70,9 +89,11 @@ _tosuper:
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move.l 4.w,a6
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jsr -0x78(a6) | Disable
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jsr -0x96(a6) | SuperState
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move.w 0xdff002,dmacon
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tst.l 8+1*4(sp)
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beq.s .keepdisplay
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move.w #0x0200,0xdff096
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move.w #0x7fff,0xdff096
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move.w #0x8000+0x0400+0x0200+0x0040,0xdff096
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.keepdisplay:
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move.w #0x2700,sr
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move.l (sp)+,a6
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@ -84,7 +105,10 @@ _touser:
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move.l 4.w,a6
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move.l 8(sp),d0
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jsr -0x9c(a6) | UserState
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move.w #0x8200,0xdff096
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move.w #0x7fff,0xdff096
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move.w dmacon,d0
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or.w #0x8000,d0
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move.w d0,0xdff096
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jsr -0x7e(a6) | Enable
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move.l (sp)+,a6
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rts
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@ -109,6 +133,24 @@ _allocate_absolute:
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move.l (sp)+,a6
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rts
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_allocate_blttemp:
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move.l a6,-(sp)
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move.l 8(sp),d0
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move.l #65536+2,d1
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move.l 4.w,a6
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jsr -0xc6(a6) | AllocMem
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move.l (sp)+,a6
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rts
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_free_blttemp:
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move.l a6,-(sp)
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move.l 8(sp),a1
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move.l 12(sp),d0
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move.l 4.w,a6
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jsr -0xd2(a6) | FreeMem
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move.l (sp)+,a6
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rts
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| return CPU model (68000=0, 68010=1, 68020=2, 68030=3, 68040=4, 68060=5)
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_get_cpu_model:
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move.l 4.w,a0
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@ -151,4 +193,7 @@ illg:
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move.l a1,sp
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rte
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dmacon:
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dc.l 0
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.include "asm.S"
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@ -43,7 +43,8 @@ S_TRACESTACK = S_TRACECNT+4
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S_CYCLES = S_TRACESTACK+12
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S_CYCLES2 = S_CYCLES+4
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S_CYCLEST = S_CYCLES2+4
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S_FPU = S_CYCLEST+4
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S_BLTTEMP = S_CYCLEST+4
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S_FPU = S_BLTTEMP+4
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S_FPIAR = S_FPU+8*12
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S_FPCR = S_FPIAR+4
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S_FPSR = S_FPCR+4
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@ -202,6 +203,7 @@ _execute_test000:
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move.w S_SR+2(a0),-(sp)
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move.l S_AREG+7*4(a0),a1
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move.l a1,USP
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move.l S_BLTTEMP(a0),a1
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bsr sync
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move.l d0,S_CYCLES2(a0)
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movem.l (a0),d0-d7/a0-a6
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@ -292,6 +294,7 @@ exception_trace000:
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move.w sr,-(sp)
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_cyclereg_address3:
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move.w CYCLEREG,cycles+4
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| pop SR and bsr.s exception_trace000
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addq.l #2+4,sp
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move.l a0,-(sp)
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move.l datapointer(pc),a0
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@ -364,16 +367,23 @@ _cyclereg_address4:
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bcs.s .okpc
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cmp.l #asm_end,2+4+2(sp)
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bhi.s .okpc
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| interrupt?
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cmp.l #_exceptiontable000+24*2,2(sp)
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bcs.s .okpc
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cmp.l #_exceptiontable000+(24+8)*2,2(sp)
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bcc.s .okpc
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| possibly IPL tester spurious interrupt
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| ignore it. Mark cycle count as invalid.
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#ifdef AMIGA
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move.w #0x0800,0xdff09c
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#endif
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move.w #0x7fff,0xdff09c
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| Interrupt exception interrupted trace?
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cmp.l #_exceptiontable000+(9-2)*2,2+4+2(sp)
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bne.s .notokpc
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| Store trace, copy trace PC/SR to interrupt PC/SR
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move.l a0,-(sp)
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move.l datapointer(pc),a0
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move.l 4+2+6+4+0(sp),S_TRACESTACK(a0)
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move.l 4+2+6+4+4(sp),S_TRACESTACK+4(a0)
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| set exception PC and SR same as Trace
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move.w 4+2+6+4+0(sp),4+2+4+0(sp)
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move.l 4+2+6+4+2(sp),4+2+4+2(sp)
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addq.l #1,S_TRACECNT(a0)
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move.l (sp)+,a0
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bra.s .okpc
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.notokpc:
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| Mark cycle count as invalid.
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move.l #0xffffffff,cycles
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addq.l #2+4,sp
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rte
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@ -404,7 +414,7 @@ _cyclereg_address4:
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cmp.w #24+8,d0
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bcc.s .nointerrupt
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#ifdef AMIGA
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move.w #0x0800,0xdff09c
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move.w #0x7fff,0xdff09c
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#endif
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.nointerrupt:
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@ -1,5 +1,5 @@
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#define DATA_VERSION 23
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#define DATA_VERSION 24
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#define CT_FPREG 0
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#define CT_DREG 0
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@ -55,13 +55,18 @@
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// MOVEA.L A0,A0
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// not NOP because on 68040 NOP generates T0 trace.
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#define NOP_OPCODE 0x2048
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#define REAL_NOP_OPCODE 0x4e71
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#define ILLG_OPCODE 0x4afc
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#define LM_OPCODE 0x42db
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#define IPL_TEST_NOP1 0x4e71
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#define IPL_TEST_NOP2 0x4e71
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#define IPL_TRIGGER_ADDR 0xdff030
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#define IPL_TRIGGER_ADDR_SIZE 2
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#define IPL_TRIGGER_DATA 0x100
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#define IPL_TRIGGER_DATA (0x100 | 0xCA)
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#define IPL_TRIGGER_SERPER 10
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#define INTERRUPT_CYCLES ((((IPL_TRIGGER_SERPER + 1) * 9) + (((IPL_TRIGGER_SERPER + 1) - 1) / 2) + 1 + 3 + 9) * 2)
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#define INTERRUPT_CYCLES ((((IPL_TRIGGER_SERPER + 1) * 9) + (((IPL_TRIGGER_SERPER + 1) - 1) / 2) + 1 + 3 + 9 + 0) * 2)
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#define IPL_TRIGGER_INTMASK 0x0800
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#define IPL_TEST_IPL_LEVEL 5
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#define IPL_BLTSIZE 0xdff058
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@ -139,12 +139,18 @@ exceptions=
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; 2 = always all zeros and all ones only
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feature_flags_mode=1
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; SR initial interrupt mask
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feature_initial_interrupt_mask=0
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; SR min interrupt mask
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; Amiga: can be zero.
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; Atari ST: should be 4 or larger.
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; Skips all tests that would set lower interrupt mask.
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feature_min_interrupt_mask=0
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; Initial active interrupt level, 0 to 6. (Amiga only)
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feature_initial_interrupt=0
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; Interrupt test
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; 1 = interrupt request is set before test.
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; Tests all INTREQ bits one by one. Compatible with cycle count mode.
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@ -202,6 +208,11 @@ feature_full_extension_format=0
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feature_addressing_modes_src=
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feature_addressing_modes_dst=
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; empty = all condition codes
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; T, F, HI, LS, CC etc.. select condition codes to generate. All others will be skipped.
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; Xcc instructions only.
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feature_condition_codes=
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; Limit test instruction size
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; B = byte, W = word, L = long, empty = no size limit
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; FPU only: S = single, D = double, X = extended, P = packed
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@ -234,10 +245,27 @@ feature_sr_mask=0x8000
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[test=BASIC]
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cpu=68000-68010
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enabled=0
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verbose=0
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feature_sr_mask=0x8000
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feature_undefined_ccr=1
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mode=all
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; interrupt timing test with waitstates
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[test=WIPL]
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cpu=68000-68010
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enabled=1
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verbose=0
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feature_undefined_ccr=1
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feature_interrupts=2
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feature_waitstates=2
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#feature_addressing_modes_src=dreg
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feature_condition_codes=
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# wait state mode requires use of chip ram
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test_memory_start=0xd0000
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test_memory_size=0x20000
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rnd_seed=10
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mode=btst.b
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; interrupt timing test
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[test=IPL]
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cpu=68000-68010
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@ -245,17 +273,33 @@ enabled=1
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verbose=0
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feature_undefined_ccr=1
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feature_interrupts=2
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;feature_sr_mask=0x2100
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mode=all
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feature_sr_mask=0x2000
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#feature_addressing_modes_dst=apdi
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feature_condition_codes=pl
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rnd_seed=10
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mode=btst.b
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; STOP/SR modification timing special test
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[test=SR]
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cpu=68000-68010
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enabled=0
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verbose=0
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feature_undefined_ccr=1
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feature_interrupts=1
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feature_initial_interrupt_mask=4
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feature_sr_mask=0x8000
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#mode=stop,eorsr.w,andsr.w,mvsr2.w,mv2sr.w
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mode=stop
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; interrupt exception
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[test=IRQ]
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enabled=0
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verbose=0
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cpu=68000-68010
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feature_sr_mask=0x8000
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feature_interrupts=1
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feature_undefined_ccr=1
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mode=jsr,jmp,bsr,bcc,dbcc,nop,exg,swap,stop,mvsr2,mv2sr,andsr,eorsr,orsr
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mode=jsr,jmp,bsr,bcc,dbcc,nop,exg,swap,stop,mvsr2.w,mv2sr.w,andsr.w,eorsr.w,orsr.w
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min_opcode_test_rounds=100
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; source EA address error
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222
cputest/main.c
222
cputest/main.c
@ -49,6 +49,7 @@ struct registers
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uae_u32 tracecnt;
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uae_u16 tracedata[6];
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uae_u32 cycles, cycles2, cyclest;
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uae_u32 blttemp;
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struct fpureg fpuregs[8];
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uae_u32 fpiar, fpcr, fpsr;
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@ -77,6 +78,8 @@ static uae_u8 *test_memory;
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static uae_u32 test_memory_addr, test_memory_end;
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static uae_u32 test_memory_size;
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static uae_u8 *test_data;
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#define BLT_TEMP_SIZE 8000
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static uae_u32 blt_data;
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static uae_u8 *safe_memory_start, *safe_memory_end;
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static short safe_memory_mode;
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static uae_u32 user_stack_memory, super_stack_memory;
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@ -136,6 +139,8 @@ static uae_u8 ccr_mask;
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static uae_u32 fpsr_ignore_mask;
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static uae_u32 addressing_mask = 0x00ffffff;
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static uae_u32 interrupt_mask;
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static short initial_interrupt_mask;
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static short initial_interrupt;
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static short loop_mode_jit, loop_mode_68010, loop_mode_cnt;
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static short instructionsize;
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static short disasm;
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@ -163,6 +168,8 @@ static uae_u16 main_intena;
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static int prealloc_test_data_size = 1001000;
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static int prealloc_gzip_size = 500000;
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static int prealloc;
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static uae_u8 *debug_item_data;
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static short debug_item_count;
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#define SIZE_STORED_ADDRESS_OFFSET 6
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#define SIZE_STORED_ADDRESS 20
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@ -190,6 +197,13 @@ static uae_u8 *allocate_absolute(uae_u32 addr, uae_u32 size)
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static void free_absolute(uae_u32 addr, uae_u32 size)
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{
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}
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static uae_u8 *allocate_blttemp(uae_u32 size)
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{
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return calloc(1, size);
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}
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static void free_blttemp(uae_u32 addr, uae_u32 size)
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{
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}
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static void execute_test000(struct registers *regs)
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{
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}
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@ -245,6 +259,8 @@ static void xmemcpy(void *d, void *s, int size)
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extern uae_u8 *allocate_absolute(uae_u32, uae_u32);
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extern void free_absolute(uae_u32, uae_u32);
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extern uae_u32 allocate_blttemp(uae_u32);
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extern void free_blttemp(uae_u32, uae_u32);
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extern void execute_test000(struct registers*);
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extern void execute_test010(struct registers *);
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extern void execute_test020(struct registers *);
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@ -454,7 +470,7 @@ static void start_test(void)
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error_vectors[i - 2] = p[i];
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}
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}
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if (interrupttest) {
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if (interrupttest || initial_interrupt_mask || initial_interrupt) {
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for (int i = 24; i < 24 + 8; i++) {
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p[i] = (uae_u32)(((uae_u32)&exceptiontable000) + (i - 2) * 2);
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if (exception_vectors) {
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@ -618,7 +634,7 @@ static int load_file_offset(FILE *f, int *foffsetp)
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unsigned char buf[4] = { 0 };
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fseek(f, *foffsetp, SEEK_SET);
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fread(buf, 1, sizeof(buf), f);
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if (buf[0] == 0xff && buf[1] == 0xff && buf[2] == 0xff && buf[3] == 0xff) {
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if (buf[0] == 0xaf && buf[1] == 'M' && buf[2] == 'R' && buf[3] == 'G') {
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fread(buf, 1, sizeof(buf), f);
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size = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | (buf[3] << 0);
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if (size == 0) {
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@ -653,7 +669,7 @@ static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *siz
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}
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FILE *f = fopen(fname, "rb");
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if (f) {
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int gsize;
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int gsize = 0;
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if (foffsetp) {
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gsize = load_file_offset(f, foffsetp);
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if (gsize == 0) {
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@ -663,7 +679,7 @@ static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *siz
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*sizep = gsize;
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}
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}
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if (*sizep <= 0) {
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if (*sizep <= 0 || foffsetp == NULL) {
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fseek(f, 0, SEEK_END);
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gsize = ftell(f);
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fseek(f, 0, SEEK_SET);
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@ -719,11 +735,17 @@ static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *siz
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printf("Decompressing '%s' (%d -> %d)\n", fname, gsize, size);
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callinflate(p, gzdata, inflatestack);
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*sizep = size;
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if (!prealloc_gzip) {
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free(gzbuf);
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}
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return p;
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} else if (candirect) {
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printf("Decompressing '%s' (%d -> %d)\n", fname, gsize, size);
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callinflate(p, gzdata, inflatestack);
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*sizep = size;
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if (!prealloc_gzip) {
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free(gzbuf);
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}
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return p;
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} else {
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unpack = calloc(1, size);
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@ -870,6 +892,11 @@ end:
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return p;
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}
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static void endinfo_debug(uae_u8 *p)
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{
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printf("PTR %08x, %08x, count %d\n", debug_item_data, p, debug_item_count);
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}
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static void pl(uae_u8 *p, uae_u32 v)
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{
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||||
p[0] = v >> 24;
|
||||
@ -899,6 +926,7 @@ static uae_u8 *restore_fpvalue(uae_u8 *p, struct fpureg *fp)
|
||||
if ((v & CT_SIZE_MASK) != CT_SIZE_FPU) {
|
||||
end_test();
|
||||
printf("Expected CT_SIZE_FPU, got %02x\n", v);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -967,7 +995,8 @@ static uae_u8 *restore_value(uae_u8 *p, uae_u32 *vp, int *sizep)
|
||||
break;
|
||||
case CT_SIZE_FPU:
|
||||
end_test();
|
||||
printf("Unexpected CT_SIZE_FPU\n");
|
||||
printf("Unexpected CT_SIZE_FPU (%02x)\n", v);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
break;
|
||||
@ -1020,6 +1049,7 @@ static uae_u8 *restore_rel(uae_u8 *p, uae_u32 *vp, int nocheck)
|
||||
} else if ((val & addressing_mask) < test_memory_addr || (val & addressing_mask) >= test_memory_addr + test_memory_size) {
|
||||
end_test();
|
||||
printf("restore_rel CT_ABSOLUTE_LONG outside of test memory! %08x\n", v);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1039,11 +1069,13 @@ static uae_u8 *restore_rel_ordered(uae_u8 *p, uae_u32 *vp)
|
||||
}
|
||||
|
||||
|
||||
static void validate_mode(uae_u8 mode, uae_u8 v)
|
||||
static void validate_mode(uae_u8 *p, uae_u8 v)
|
||||
{
|
||||
uae_u8 mode = p[0];
|
||||
if ((mode & CT_DATA_MASK) != v) {
|
||||
end_test();
|
||||
printf("CT_MEMWRITE expected but got %02X\n", mode);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1066,7 +1098,7 @@ static uae_u8 *get_memory_addr(uae_u8 *p, uae_u8 **addrp)
|
||||
} else {
|
||||
addr = low_memory + offset;
|
||||
}
|
||||
validate_mode(p[0], CT_MEMWRITE);
|
||||
validate_mode(p, CT_MEMWRITE);
|
||||
*addrp = addr;
|
||||
return p;
|
||||
}
|
||||
@ -1083,7 +1115,7 @@ static uae_u8 *get_memory_addr(uae_u8 *p, uae_u8 **addrp)
|
||||
#else
|
||||
uae_u8 *addr = (uae_u8*)val;
|
||||
#endif
|
||||
validate_mode(p[0], CT_MEMWRITE);
|
||||
validate_mode(p, CT_MEMWRITE);
|
||||
*addrp = addr;
|
||||
return p;
|
||||
} else if (val >= test_memory_addr && val < test_memory_addr + test_memory_size) {
|
||||
@ -1092,12 +1124,13 @@ static uae_u8 *get_memory_addr(uae_u8 *p, uae_u8 **addrp)
|
||||
#else
|
||||
uae_u8 *addr = (uae_u8*)val;
|
||||
#endif
|
||||
validate_mode(p[0], CT_MEMWRITE);
|
||||
validate_mode(p, CT_MEMWRITE);
|
||||
*addrp = addr;
|
||||
return p;
|
||||
} else {
|
||||
end_test();
|
||||
printf("get_memory_addr CT_ABSOLUTE_LONG outside of test memory! %08x\n", val);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1109,7 +1142,7 @@ static uae_u8 *get_memory_addr(uae_u8 *p, uae_u8 **addrp)
|
||||
val |= *p++;
|
||||
uae_s16 offset = (uae_s16)val;
|
||||
uae_u8 *addr = opcode_memory + offset;
|
||||
validate_mode(p[0], CT_MEMWRITE);
|
||||
validate_mode(p, CT_MEMWRITE);
|
||||
*addrp = addr;
|
||||
return p;
|
||||
}
|
||||
@ -1118,6 +1151,7 @@ static uae_u8 *get_memory_addr(uae_u8 *p, uae_u8 **addrp)
|
||||
default:
|
||||
end_test();
|
||||
printf("get_memory_addr unknown size %02x\n", v);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1171,21 +1205,27 @@ static void restoreahist(void)
|
||||
static uae_u8 *restore_bytes(uae_u8 *mem, uae_u8 *p)
|
||||
{
|
||||
uae_u8 *addr = mem;
|
||||
uae_u16 v = *p++;
|
||||
addr += v >> 5;
|
||||
v &= 31;
|
||||
if (v == 31) {
|
||||
v = *p++;
|
||||
if (v == 0) {
|
||||
v = 256;
|
||||
uae_u16 len, offset;
|
||||
if (*p == 0xff) {
|
||||
p++;
|
||||
offset = *p++;
|
||||
len = *p++;
|
||||
if (len == 0) {
|
||||
len = 256;
|
||||
}
|
||||
} else {
|
||||
uae_u8 v = *p++;
|
||||
offset = v >> 5;
|
||||
len = v & 31;
|
||||
if (len == 0) {
|
||||
len = 32;
|
||||
}
|
||||
} else if (v == 0) {
|
||||
v = 32;
|
||||
}
|
||||
addr += offset;
|
||||
#ifndef _MSC_VER
|
||||
xmemcpy(addr, p, v);
|
||||
xmemcpy(addr, p, len);
|
||||
#endif
|
||||
p += v;
|
||||
p += len;
|
||||
return p;
|
||||
}
|
||||
|
||||
@ -1230,6 +1270,7 @@ static uae_u8 *restore_memory(uae_u8 *p, int storedata)
|
||||
default:
|
||||
end_test();
|
||||
printf("Unknown restore_memory type!?\n");
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
break;
|
||||
@ -1251,6 +1292,7 @@ static uae_u8 *restore_memory(uae_u8 *p, int storedata)
|
||||
default:
|
||||
end_test();
|
||||
printf("Unknown restore_memory type!?\n");
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
break;
|
||||
@ -1271,6 +1313,7 @@ static uae_u8 *restore_edata(uae_u8 *p)
|
||||
default:
|
||||
end_test();
|
||||
printf("Unexpected CT_EDATA 0x%02x\n", *p);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1283,6 +1326,7 @@ static uae_u8 *restore_data(uae_u8 *p, struct registers *r)
|
||||
if (v & CT_END) {
|
||||
end_test();
|
||||
printf("Unexpected end bit!? 0x%02x offset %d\n", v, p - test_data);
|
||||
endinfo_debug(p);
|
||||
endinfo();
|
||||
exit(0);
|
||||
}
|
||||
@ -1510,18 +1554,20 @@ struct srbit
|
||||
{
|
||||
char *name;
|
||||
int bit;
|
||||
int size;
|
||||
};
|
||||
static const struct srbit srbits[] = {
|
||||
{ "T1", 15 },
|
||||
{ "T0", 14 },
|
||||
{ "S", 13 },
|
||||
{ "M", 12 },
|
||||
{ "X", 4 },
|
||||
{ "N", 3 },
|
||||
{ "Z", 2 },
|
||||
{ "V", 1 },
|
||||
{ "C", 0 },
|
||||
{ NULL, 0 }
|
||||
{ "T1", 15, 1 },
|
||||
{ "T0", 14, 1 },
|
||||
{ "S", 13, 1 },
|
||||
{ "M", 12, 1 },
|
||||
{ "IM", 8, 3 },
|
||||
{ "X", 4, 1 },
|
||||
{ "N", 3, 1 },
|
||||
{ "Z", 2, 1 },
|
||||
{ "V", 1, 1 },
|
||||
{ "C", 0, 1 },
|
||||
{ NULL, 0, 0 }
|
||||
};
|
||||
|
||||
// r = registers to output
|
||||
@ -1593,9 +1639,13 @@ static void out_regs(struct registers *r, struct registers *r1, struct registers
|
||||
for (int i = 0; srbits[i].name; i++) {
|
||||
if (i > 0)
|
||||
*outbp++ = ' ';
|
||||
uae_u16 mask = 1 << srbits[i].bit;
|
||||
uae_u16 mask = 0;
|
||||
for (int j = 0; j < srbits[i].size; j++) {
|
||||
mask <<= 1;
|
||||
mask |= 1 << srbits[i].bit;
|
||||
}
|
||||
sprintf(outbp, "%s%c%d", srbits[i].name,
|
||||
(s2 & mask) != (s3 & mask) ? '!' : ((s1 & mask) != (s2 & mask) ? '*' : '='), (s & mask) != 0);
|
||||
(s2 & mask) != (s3 & mask) ? '!' : ((s1 & mask) != (s2 & mask) ? '*' : '='), (s & mask) >> srbits[i].bit);
|
||||
outbp += strlen(outbp);
|
||||
}
|
||||
*outbp++ = '\n';
|
||||
@ -1782,19 +1832,19 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
|
||||
}
|
||||
sprintf(outbp, "Expected trace exception (PC=%08x) but got none.\n", pc);
|
||||
outbp += strlen(outbp);
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
} else if (!(last_exception_extra & 0x80)) {
|
||||
// Trace stacked with group 2 exception
|
||||
if (!(sr & 0x2000) || (sr | 0x2000 | 0xc000) != (regs->sr | 0x2000 | 0xc000)) {
|
||||
sprintf(outbp, "Trace (%d stacked) SR mismatch: %04x != %04x\n", excnum, sr, regs->sr);
|
||||
outbp += strlen(outbp);
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
}
|
||||
uae_u32 retv = exceptiontableinuse + (excnum - 2) * 2;
|
||||
if (ret != retv) {
|
||||
sprintf(outbp, "Trace (%d stacked) PC mismatch: %08x != %08x\n", excnum, ret, retv);
|
||||
outbp += strlen(outbp);
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
}
|
||||
*extratrace = 1;
|
||||
} else {
|
||||
@ -1806,13 +1856,14 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
|
||||
if ((vsr & test_ccrignoremask) != (sr & test_ccrignoremask)) {
|
||||
sprintf(outbp, "Trace (non-stacked) SR mismatch: %04x != %04x (PC=%08x)\n", sr, vsr, v);
|
||||
outbp += strlen(outbp);
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
}
|
||||
if (v != ret) {
|
||||
sprintf(outbp, "Trace (non-stacked) PC mismatch: %08x != %08x (SR=%04x)\n", ret, v, vsr);
|
||||
outbp += strlen(outbp);
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
}
|
||||
*extratrace = -1;
|
||||
}
|
||||
} else if (!last_exception_extra && excnum != 9) {
|
||||
if (regs->tracecnt > 0) {
|
||||
@ -1824,7 +1875,7 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
|
||||
sprintf(outbp, "Exception %d also pending.\n", excnum);
|
||||
outbp += strlen(outbp);
|
||||
}
|
||||
*experr = 1;
|
||||
*experr |= 2;
|
||||
}
|
||||
} else if (last_exception_extra) {
|
||||
end_test();
|
||||
@ -2081,7 +2132,7 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
|
||||
strcpy(outbp, "Got : ");
|
||||
outbp += strlen(outbp);
|
||||
hexdump(sp, exclen, 1);
|
||||
*experr = 1;
|
||||
*experr |= 1;
|
||||
}
|
||||
exception_stored = exclen;
|
||||
return p;
|
||||
@ -2200,6 +2251,18 @@ static int get_cycles_amiga(void)
|
||||
|
||||
static uae_u16 test_intena, test_intreq;
|
||||
|
||||
static const uae_u16 itable[] =
|
||||
{
|
||||
0,
|
||||
1 << 2,
|
||||
1 << 3,
|
||||
1 << 4,
|
||||
1 << 7,
|
||||
1 << 11,
|
||||
1 << 13,
|
||||
0
|
||||
};
|
||||
|
||||
static void set_interrupt(void)
|
||||
{
|
||||
if (interrupttest == 1) {
|
||||
@ -2221,6 +2284,13 @@ static void set_interrupt(void)
|
||||
*intena = 0x8000 | 0x4000 | IPL_TRIGGER_INTMASK;
|
||||
*intreq = IPL_TRIGGER_INTMASK;
|
||||
}
|
||||
if (initial_interrupt) {
|
||||
uae_u16 mask = itable[initial_interrupt];
|
||||
volatile uae_u16 *intena = (uae_u16*)0xdff09a;
|
||||
volatile uae_u16 *intreq = (uae_u16*)0xdff09c;
|
||||
*intena = 0x8000 | 0x4000 | mask;
|
||||
*intreq = 0x8000 | mask;
|
||||
}
|
||||
}
|
||||
|
||||
static void clear_interrupt(void)
|
||||
@ -2305,7 +2375,7 @@ static int check_cycles(int exc, short extratrace, short extrag2w1, struct regis
|
||||
}
|
||||
gotcycles += cycles_adjust;
|
||||
|
||||
if (extratrace) {
|
||||
if (extratrace > 0) {
|
||||
expectedcycles += getexceptioncycles(9);
|
||||
}
|
||||
// address error during group 2 exception stacking (=odd exception vector)
|
||||
@ -2328,10 +2398,9 @@ static int check_cycles(int exc, short extratrace, short extrag2w1, struct regis
|
||||
}
|
||||
|
||||
if (0 || abs(gotcycles - expectedcycles) > cycles_range) {
|
||||
addinfo();
|
||||
sprintf(outbp, "Got %d cycles (%d + %d) but expected %d (%d + %d)\n",
|
||||
sprintf(outbp, "Got %d cycles (%d + %d) but expected %d (%d + %d) %08x\n",
|
||||
gotcycles, gotcycles - exceptioncycles, exceptioncycles,
|
||||
expectedcycles, expectedcycles - exceptioncycles, exceptioncycles);
|
||||
expectedcycles, expectedcycles - exceptioncycles, exceptioncycles, test_regs.cycles);
|
||||
outbp += strlen(outbp);
|
||||
return 0;
|
||||
}
|
||||
@ -2521,7 +2590,7 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st
|
||||
if (cpu_lvl > 0 && exc >= 2 && cpuexc010 != cpuexc) {
|
||||
if (dooutput) {
|
||||
sprintf(outbp, "Exception: vector number does not match vector offset! (%d <> %d) %d\n", exc, cpuexc010, cpuexc);
|
||||
experr = 1;
|
||||
experr |= 1;
|
||||
outbp += strlen(outbp);
|
||||
errflag |= 1 << 16;
|
||||
}
|
||||
@ -2589,7 +2658,11 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st
|
||||
hexdump(excp, excsize, 1);
|
||||
}
|
||||
}
|
||||
experr = 1;
|
||||
if ((experr & 2) && !(experr & 1) && extratrace) {
|
||||
sprintf(outbp, "Valid trace exception found\n");
|
||||
outbp += strlen(outbp);
|
||||
}
|
||||
experr |= 2;
|
||||
}
|
||||
errflag |= 1 << 16;
|
||||
}
|
||||
@ -2967,7 +3040,7 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st
|
||||
}
|
||||
#endif
|
||||
if (exc > 1) {
|
||||
if (!experr) {
|
||||
if (!(experr & 1)) {
|
||||
sprintf(outbp, "OK: exception %d ", exc);
|
||||
outbp += strlen(outbp);
|
||||
if (exception_stored) {
|
||||
@ -3002,7 +3075,7 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st
|
||||
|
||||
static void out_endinfo(void)
|
||||
{
|
||||
sprintf(outbp, "%u (%u/%u) ", testcnt, testcntsub, testcntsubmax);
|
||||
sprintf(outbp, "%u (%u/%u/%u) ", testcnt, testcntsub, testcntsubmax, interrupt_delay_cnt);
|
||||
outbp += strlen(outbp);
|
||||
sprintf(outbp, "S=%d", supercnt);
|
||||
outbp += strlen(outbp);
|
||||
@ -3104,7 +3177,7 @@ static void process_test(uae_u8 *p)
|
||||
|
||||
short doopcodeswap = 1;
|
||||
|
||||
if (interrupttest >= 1) {
|
||||
if (interrupttest >= 2) {
|
||||
doopcodeswap = 0;
|
||||
}
|
||||
|
||||
@ -3113,12 +3186,16 @@ static void process_test(uae_u8 *p)
|
||||
cur_regs.endpc = endpc;
|
||||
cur_regs.pc = startpc;
|
||||
|
||||
debug_item_data = p;
|
||||
debug_item_count = 0;
|
||||
for (;;) {
|
||||
uae_u8 v = *p;
|
||||
if (v == CT_END_INIT || v == CT_END_FINISH)
|
||||
break;
|
||||
p = restore_data(p, &cur_regs);
|
||||
debug_item_count++;
|
||||
}
|
||||
debug_item_count = -1;
|
||||
if (*p == CT_END_FINISH)
|
||||
break;
|
||||
p++;
|
||||
@ -3213,6 +3290,7 @@ static void process_test(uae_u8 *p)
|
||||
test_regs.pc = startpc;
|
||||
test_regs.cyclest = 0xffffffff;
|
||||
test_regs.fpeaset = 0;
|
||||
test_regs.blttemp = blt_data;
|
||||
|
||||
#ifdef M68K
|
||||
if (stackcopysize > 0)
|
||||
@ -3223,7 +3301,7 @@ static void process_test(uae_u8 *p)
|
||||
} else {
|
||||
test_regs.sr = (ccr & 1) ? 31 : 0;
|
||||
}
|
||||
test_regs.sr |= sr_mask | (interrupt_mask << 8);
|
||||
test_regs.sr |= sr_mask | (initial_interrupt_mask << 8);
|
||||
if (fpumode) {
|
||||
test_regs.fpcr = 0;
|
||||
test_regs.fpsr = 0;
|
||||
@ -3347,7 +3425,7 @@ static void process_test(uae_u8 *p)
|
||||
|
||||
|
||||
#ifdef AMIGA
|
||||
if (interrupttest) {
|
||||
if (interrupttest || initial_interrupt_mask || initial_interrupt) {
|
||||
set_interrupt();
|
||||
}
|
||||
#endif
|
||||
@ -3365,7 +3443,7 @@ static void process_test(uae_u8 *p)
|
||||
}
|
||||
|
||||
#ifdef AMIGA
|
||||
if (interrupttest) {
|
||||
if (interrupttest || initial_interrupt_mask || initial_interrupt) {
|
||||
clear_interrupt();
|
||||
}
|
||||
#endif
|
||||
@ -3494,8 +3572,12 @@ end:
|
||||
|
||||
static void freestuff(void)
|
||||
{
|
||||
if (test_memory && test_memory_addr)
|
||||
if (test_memory && test_memory_addr) {
|
||||
free_absolute(test_memory_addr, test_memory_size);
|
||||
}
|
||||
if (blt_data) {
|
||||
free_blttemp(blt_data, BLT_TEMP_SIZE);
|
||||
}
|
||||
#ifdef WAITEXIT
|
||||
getchar();
|
||||
#endif
|
||||
@ -3546,15 +3628,20 @@ static int test_mnemo(const char *opcode)
|
||||
test_memory_end = test_memory_addr + test_memory_size;
|
||||
opcode_memory_addr = read_u32(headerfile, &headoffset);
|
||||
opcode_memory = (uae_u8*)opcode_memory_addr;
|
||||
uae_u32 lvl_mask = read_u32(headerfile, &headoffset);
|
||||
lvl = (lvl_mask >> 16) & 15;
|
||||
interrupt_mask = (lvl_mask >> 20) & 7;
|
||||
addressing_mask = (lvl_mask & 0x80000000) ? 0xffffffff : 0x00ffffff;
|
||||
interrupttest = (lvl_mask >> 26) & 3;
|
||||
sr_undefined_mask = lvl_mask & 0xffff;
|
||||
safe_memory_mode = (lvl_mask >> 23) & 7;
|
||||
loop_mode_jit = (lvl_mask >> 28) & 1;
|
||||
loop_mode_68010 = (lvl_mask >> 29) & 1;
|
||||
v = read_u32(headerfile, &headoffset);
|
||||
lvl = (v >> 16) & 15;
|
||||
interrupt_mask = (v >> 20) & 7;
|
||||
addressing_mask = (v & 0x80000000) ? 0xffffffff : 0x00ffffff;
|
||||
interrupttest = (v >> 26) & 3;
|
||||
sr_undefined_mask = v & 0xffff;
|
||||
safe_memory_mode = (v >> 23) & 7;
|
||||
loop_mode_jit = (v >> 28) & 1;
|
||||
loop_mode_68010 = (v >> 29) & 1;
|
||||
v = read_u32(headerfile, &headoffset);
|
||||
initial_interrupt_mask = v & 7;
|
||||
initial_interrupt = (v >> 3) & 7;
|
||||
v = read_u32(headerfile, &headoffset);
|
||||
v = read_u32(headerfile, &headoffset);
|
||||
fpu_model = read_u32(headerfile, &headoffset);
|
||||
test_low_memory_start = read_u32(headerfile, &headoffset);
|
||||
test_low_memory_end = read_u32(headerfile, &headoffset);
|
||||
@ -3666,6 +3753,12 @@ static int test_mnemo(const char *opcode)
|
||||
}
|
||||
}
|
||||
|
||||
blt_data = allocate_blttemp(BLT_TEMP_SIZE);
|
||||
if (!blt_data) {
|
||||
printf("blt_temp failed to allocated.\n");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
int otestcnt = -1;
|
||||
for (;;) {
|
||||
if (otestcnt != testcnt) {
|
||||
@ -3739,6 +3832,11 @@ static int test_mnemo(const char *opcode)
|
||||
}
|
||||
}
|
||||
|
||||
if (blt_data) {
|
||||
free_blttemp(blt_data, BLT_TEMP_SIZE);
|
||||
blt_data = 0;
|
||||
}
|
||||
|
||||
if (errorcnt == 0) {
|
||||
outbp = outbuffer;
|
||||
out_endinfo();
|
||||
|
||||
@ -10,13 +10,14 @@
|
||||
#include "cpummu030.h"
|
||||
|
||||
cpuop_func *loop_mode_table[65536];
|
||||
int cpuipldelay2, cpuipldelay4;
|
||||
|
||||
void my_trim(TCHAR *s)
|
||||
{
|
||||
int len;
|
||||
while (s[0] != '\0' && _tcscspn(s, _T("\t \r\n")) == 0)
|
||||
memmove(s, s + 1, (_tcslen(s + 1) + 1) * sizeof(TCHAR));
|
||||
len = _tcslen(s);
|
||||
memmove(s, s + 1, (uaetcslen(s + 1) + 1) * sizeof(TCHAR));
|
||||
len = uaetcslen(s);
|
||||
while (len > 0 && _tcscspn(s + len - 1, _T("\t \r\n")) == 0)
|
||||
s[--len] = '\0';
|
||||
}
|
||||
@ -40,8 +41,8 @@ TCHAR *buf_out(TCHAR *buffer, int *bufsize, const TCHAR *format, ...)
|
||||
return 0;
|
||||
count = _vsntprintf(buffer, (*bufsize) - 1, format, parms);
|
||||
va_end(parms);
|
||||
*bufsize -= _tcslen(buffer);
|
||||
return buffer + _tcslen(buffer);
|
||||
*bufsize -= uaetcslen(buffer);
|
||||
return buffer + uaetcslen(buffer);
|
||||
}
|
||||
|
||||
void fpux_restore(int *v)
|
||||
@ -52,10 +53,11 @@ void fp_init_native(void)
|
||||
wprintf(_T("fp_init_native called!"));
|
||||
exit(0);
|
||||
}
|
||||
void fp_init_native_80(void)
|
||||
bool fp_init_native_80(void)
|
||||
{
|
||||
wprintf(_T("fp_init_native_80 called!"));
|
||||
exit(0);
|
||||
return false;
|
||||
}
|
||||
void init_fpucw_x87(void)
|
||||
{
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user