2820b6

cd32_fmv.cpp

@@ -22,11 +22,10 @@
 #include "custom.h"
 
 #include "cda_play.h"
-#include "archivers\mp2\kjmp2.h"
+#include "archivers/mp2/kjmp2.h"
 #include "mpeg2.h"
 #include "mpeg2convert.h"
 
-
 #define FMV_DEBUG 0
 static int fmv_audio_debug = 0;
 static int fmv_video_debug = 0;
@@ -1432,7 +1431,7 @@ void cd32_fmv_vsync_handler(void)
 	l64111_regs[A_CB_STATUS] -= PCM_SECTORS;
 }
 
-static addrbank fmv_bank = {
+addrbank fmv_bank = {
 	fmv_lget, fmv_wget, fmv_bget,
 	fmv_lput, fmv_wput, fmv_bput,
 	default_xlate, default_check, NULL, _T("CD32 FMV IO"),
@@ -1441,7 +1440,7 @@ static addrbank fmv_bank = {
 
 MEMORY_FUNCTIONS_NOJIT(fmv_rom);
 
-static addrbank fmv_rom_bank = {
+addrbank fmv_rom_bank = {
 	fmv_rom_lget, fmv_rom_wget, fmv_rom_bget,
 	fmv_rom_lput, fmv_rom_wput, fmv_rom_bput,
 	fmv_rom_xlate, fmv_rom_check, NULL, _T("CD32 FMV ROM"),
@@ -1451,7 +1450,7 @@ static addrbank fmv_rom_bank = {
 
 MEMORY_FUNCTIONS_NOJIT(fmv_ram);
 
-static addrbank fmv_ram_bank = {
+addrbank fmv_ram_bank = {
 	fmv_ram_lget, fmv_ram_wget, fmv_ram_bget,
 	fmv_ram_lput, fmv_ram_wput, fmv_ram_bput,
 	fmv_ram_xlate, fmv_ram_check, NULL, _T("CD32 FMV RAM"),

cdtv.cpp

@@ -1654,7 +1654,7 @@ void cdtv_free (void)
 	configured = 0;
 }
 
-void cdtv_init (void)
+addrbank *cdtv_init (void)
 {
 	close_unit ();
 	if (!thread_alive) {
@@ -1681,7 +1681,6 @@ void cdtv_init (void)
 	ew (0x24, 0x00); /* ser.no. Byte 3 */
 
 	/* KS autoconfig handles the rest */
-	map_banks (&dmac_bank, 0xe80000 >> 16, 0x10000 >> 16, 0x10000);
 	if (!savestate_state) {
 		cdtv_reset_int ();
 		configured = 0;
@@ -1699,6 +1698,7 @@ void cdtv_init (void)
 	if (currprefs.cs_cdtvscsi) {
 		init_scsi (&wd_cdtv);
 	}
+	return &dmac_bank;
 }
 
 void cdtv_check_banks (void)

cfgfile.cpp

@@ -205,7 +205,21 @@ static const TCHAR *rtgtype[] = {
 	_T("Spectrum28/24_Z2"), _T("Spectrum28/24_Z3"),
 	_T("PicassoIV_Z2"), _T("PicassoIV_Z3"),
 	0 };
-static const TCHAR *cpuboards[] = {	_T("none"), _T("Blizzard1230IV"), _T("Blizzard1260"), _T("Blizzard2060"), _T("CyberStormMK3"), _T("CyberStormPPC"), _T("BlizzardPPC"), _T("WarpEngineA4000"), NULL };
+static const TCHAR *cpuboards[] = {
+	_T("none"),
+	_T("Blizzard1230IV"),
+	_T("Blizzard1230IV+SCSI"),
+	_T("Blizzard1260"),
+	_T("Blizzard1260+SCSI"),
+	_T("Blizzard2060"),
+	_T("CyberStormMK1"),
+	_T("CyberStormMK2"),
+	_T("CyberStormMK3"),
+	_T("CyberStormPPC"),
+	_T("BlizzardPPC"),
+	_T("WarpEngineA4000"),
+	NULL
+};
 static const TCHAR *waitblits[] = { _T("disabled"), _T("automatic"), _T("noidleonly"), _T("always"), 0 };
 static const TCHAR *autoext2[] = { _T("disabled"), _T("copy"), _T("replace"), 0 };
 static const TCHAR *leds[] = { _T("power"), _T("df0"), _T("df1"), _T("df2"), _T("df3"), _T("hd"), _T("cd"), _T("fps"), _T("cpu"), _T("snd"), _T("md"), 0 };
@@ -1466,6 +1480,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	cfgfile_write_bool (f, _T("cpu_compatible"), p->cpu_compatible);
 	cfgfile_write_bool (f, _T("cpu_24bit_addressing"), p->address_space_24);
 	/* do not reorder end */
+	cfgfile_dwrite_bool(f, _T("cpu_reset_pause"), p->reset_delay);
 
 	if (p->cpu_cycle_exact) {
 		if (p->cpu_frequency)
@@ -3554,8 +3569,9 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 		|| cfgfile_yesno (option, value, _T("sana2"), &p->sana2)
 		|| cfgfile_yesno (option, value, _T("genlock"), &p->genlock)
 		|| cfgfile_yesno (option, value, _T("cpu_compatible"), &p->cpu_compatible)
-		|| cfgfile_yesno (option, value, _T("cpu_24bit_addressing"), &p->address_space_24)
-		|| cfgfile_yesno (option, value, _T("parallel_on_demand"), &p->parallel_demand)
+		|| cfgfile_yesno(option, value, _T("cpu_24bit_addressing"), &p->address_space_24)
+		|| cfgfile_yesno(option, value, _T("cpu_reset_pause"), &p->reset_delay)
+		|| cfgfile_yesno(option, value, _T("parallel_on_demand"), &p->parallel_demand)
 		|| cfgfile_yesno (option, value, _T("parallel_postscript_emulation"), &p->parallel_postscript_emulation)
 		|| cfgfile_yesno (option, value, _T("parallel_postscript_detection"), &p->parallel_postscript_detection)
 		|| cfgfile_yesno (option, value, _T("serial_on_demand"), &p->serial_demand)

custom.cpp

@@ -56,6 +56,7 @@
 #include "a2065.h"
 #include "gfxboard.h"
 #include "ncr_scsi.h"
+#include "ncr9x_scsi.h"
 #include "blkdev.h"
 #include "sampler.h"
 #include "clipboard.h"
@@ -3670,7 +3671,7 @@ void compute_framesync (void)
 					changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate = vblank_hz;
 					cfgfile_parse_lines (&changed_prefs, cr->commands, -1);
 					if (cr->commands[0])
-						write_log (L"CMD1: '%s'\n", cr->commands);
+						write_log (_T("CMD1: '%s'\n"), cr->commands);
 					break;
 				} else {
 					v = cr->rate;
@@ -3682,7 +3683,7 @@ void compute_framesync (void)
 				changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate = v;
 				cfgfile_parse_lines (&changed_prefs, cr->commands, -1);
 				if (cr->commands[0])
-					write_log (L"CMD2: '%s'\n", cr->commands);
+					write_log (_T("CMD2: '%s'\n"), cr->commands);
 			}
 		} else {
 			if (cr->locked == false)
@@ -3692,7 +3693,7 @@ void compute_framesync (void)
 			changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate = v;
 			cfgfile_parse_lines (&changed_prefs, cr->commands, -1);
 			if (cr->commands[0])
-				write_log (L"CMD3: '%s'\n", cr->commands);
+				write_log (_T("CMD3: '%s'\n"), cr->commands);
 		}
 		found = true;
 		break;
@@ -4625,6 +4626,9 @@ static void rethink_intreq (void)
 #endif
 #ifdef NCR
 	ncr_rethink();
+#endif
+#ifdef NCR9X
+	ncr9x_rethink();
 #endif
 	cpuboard_rethink();
 	rethink_gayle ();
@@ -5380,11 +5384,11 @@ static void SPRxCTLPOS(int num)
 
 static void SPRxCTL_1(uae_u16 v, int num, int hpos)
 {
-	struct sprite *s = &spr[num];
 	sprctl[num] = v;
 	spr_arm (num, 0);
 	SPRxCTLPOS (num);
 #if SPRITE_DEBUG > 0
+	struct sprite *s = &spr[num];
 	if (vpos >= SPRITE_DEBUG_MINY && vpos <= SPRITE_DEBUG_MAXY && (SPRITE_DEBUG & (1 << num))) {
 		write_log (_T("%d:%d:SPR%dCTL %04X P=%06X VSTRT=%d VSTOP=%d HSTRT=%d D=%d A=%d CP=%x PC=%x\n"),
 			vpos, hpos, num, v, s->pt, s->vstart, s->vstop, s->xpos, spr[num].dmastate, spr[num].armed, cop_state.ip, M68K_GETPC);
@@ -5394,10 +5398,10 @@ static void SPRxCTL_1(uae_u16 v, int num, int hpos)
 }
 static void SPRxPOS_1(uae_u16 v, int num, int hpos)
 {
-	struct sprite *s = &spr[num];
 	sprpos[num] = v;
 	SPRxCTLPOS (num);
 #if SPRITE_DEBUG > 0
+	struct sprite *s = &spr[num];
 	if (vpos >= SPRITE_DEBUG_MINY && vpos <= SPRITE_DEBUG_MAXY && (SPRITE_DEBUG & (1 << num))) {
 		write_log (_T("%d:%d:SPR%dPOS %04X P=%06X VSTRT=%d VSTOP=%d HSTRT=%d D=%d A=%d CP=%x PC=%x\n"),
 			vpos, hpos, num, v, s->pt, s->vstart, s->vstop, s->xpos, spr[num].dmastate, spr[num].armed, cop_state.ip, M68K_GETPC);
@@ -5755,7 +5759,7 @@ static int custom_wput_copper (int hpos, uaecptr addr, uae_u32 value, int noget)
 	return v;
 }
 
-static void dump_copper (TCHAR *error, int until_hpos)
+static void dump_copper (const TCHAR *error, int until_hpos)
 {
 	write_log (_T("\n"));
 	write_log (_T("%s: vpos=%d until_hpos=%d vp=%d\n"),
@@ -6591,8 +6595,6 @@ void init_hardware_for_drawing_frame (void)
 	next_sprite_forced = 1;
 }
 
-static void do_savestate(void);
-
 static int rpt_vsync (int adjust)
 {
 	frame_time_t curr_time = read_processor_time ();
@@ -6868,7 +6870,6 @@ static bool framewait (void)
 			}
 
 			frame_shown = true;
-
 		}
 		return status != 0;
 	}
@@ -7513,11 +7514,12 @@ static void hsync_handler_pre (bool onvsync)
 #ifdef PICASSO96
 	picasso_handle_hsync ();
 #endif
+#ifdef AHI
 	{
 		void ahi_hsync (void);
 		ahi_hsync ();
 	}
-
+#endif
 	DISK_hsync ();
 	if (currprefs.produce_sound)
 		audio_hsync ();
@@ -7946,7 +7948,6 @@ void custom_prepare (void)
 void custom_reset (bool hardreset, bool keyboardreset)
 {
 	int i;
-	int zero = 0;
 
 	target_reset ();
 	reset_all_systems ();
@@ -8035,6 +8036,9 @@ void custom_reset (bool hardreset, bool keyboardreset)
 	ncr710_reset();
 	ncr_reset();
 #endif
+#ifdef NCR9X
+	ncr9x_reset();
+#endif
 #ifdef JIT
 	compemu_reset ();
 #endif
@@ -8690,7 +8694,6 @@ static void REGPARAM2 custom_wput (uaecptr addr, uae_u32 value)
 
 static void REGPARAM2 custom_bput (uaecptr addr, uae_u32 value)
 {
-	static int warned;
 	uae_u16 rval;
 
 	if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0) {

debug.cpp

@@ -2908,7 +2908,7 @@ static void memory_map_dump_2 (int log)
 		if (i < max)
 			a2 = mem_banks[i];
 		if (a1 != a2) {
-			int k, mirrored, size, size_out;
+			int k, mirrored, mirrored2, size, size_out;
 			TCHAR size_ext;
 			uae_u8 *caddr;
 			TCHAR *name;
@@ -2927,10 +2927,13 @@ static void memory_map_dump_2 (int log)
 					mirrored++;
 				k++;
 			}
+			mirrored2 = mirrored;
+			if (mirrored2 == 0)
+				mirrored2 = 1;
 			size = (i - j) << (16 - 10);
 			size_out = size;
 			size_ext = 'K';
-			if (j >= 256 && size_out >= 1024) {
+			if (j >= 256 && (size_out / mirrored2 >= 1024) && !((size_out / mirrored2) & 1023)) {
 				size_out /= 1024;
 				size_ext = 'M';
 			}
@@ -3073,6 +3076,35 @@ static TCHAR *getfrombstr(uaecptr pp)
 	return au_copy (s, p[0] + 1, (char*)p + 1);
 }
 
+// read one byte from expansion autoconfig ROM
+static void copyromdata(uae_u8 bustype, uaecptr rom, uae_u8 *out, int size)
+{
+	int offset = 0;
+
+	switch (bustype & 0xc0)
+	{
+	case 0x00: // nibble
+		while (size-- > 0) {
+			*out++ = (get_byte_debug(rom + offset * 4 + 0) & 0xf0) | ((get_byte_debug(rom + offset * 4 + 2) & 0xf0) >> 4);
+			offset++;
+		}
+		break;
+	case 0x40: // byte
+		while (size-- > 0) {
+			*out++ = get_byte_debug(rom + offset * 2);
+			offset++;
+		}
+		break;
+	case 0x80: // word
+	default:
+		while (size-- > 0) {
+			*out++ = get_byte_debug(rom + offset);
+			offset++;
+		}
+		break;
+	}
+}
+
 static void show_exec_lists (TCHAR *t)
 {
 	uaecptr execbase = get_long_debug (4);
@@ -3182,8 +3214,48 @@ static void show_exec_lists (TCHAR *t)
 			list += 12;
 		}
 		return;
+	} else if (c == 'e') { // expansion
+		uaecptr expbase = get_base("expansion.library", 378);
+		if (expbase) {
+			list = get_long_debug(expbase + 60);
+			while (list && get_long_debug(list)) {
+				uae_u32 addr = get_long_debug(list + 32);
+				uae_u16 rom_vector = get_word_debug(list + 16 + 10);
+				uae_u8 type = get_byte_debug(list + 16 + 0);
+				console_out_f(_T("%02x %02x %08x %08x %04x %02x %08x %04x (%u/%u)\n"),
+					type, get_byte_debug(list + 16 + 2),
+					addr, get_long_debug(list + 36),
+					get_word_debug(list + 16 + 4), get_byte_debug(list + 16 + 1),
+					get_long_debug(list + 16 + 6), rom_vector,
+					get_word_debug(list + 16 + 4), get_byte_debug(list + 16 + 1));
+				if (type & 0x10) {
+					uae_u8 diagarea[32];
+					uae_u16 nameoffset;
+					uaecptr rom = addr + rom_vector;
+					uae_u8 config = get_byte_debug(rom);
+					copyromdata(config, rom, diagarea, 16);
+					nameoffset = (diagarea[8] << 8) | diagarea[9];
+					console_out_f(_T(" %02x %02x Size %04x Diag %04x Boot %04x Name %04x %04x %04x\n"),
+						diagarea[0], diagarea[1],
+						(diagarea[2] << 8) | diagarea[3],
+						(diagarea[4] << 8) | diagarea[5],
+						(diagarea[6] << 8) | diagarea[7],
+						nameoffset,
+						(diagarea[10] << 8) | diagarea[11],
+						(diagarea[12] << 8) | diagarea[13]);
+					if (nameoffset != 0 && nameoffset != 0xffff) {
+						copyromdata(config, rom + nameoffset, diagarea, 32);
+						diagarea[31] = 0;
+						TCHAR *str = au((char*)diagarea);
+						console_out_f(_T(" '%s'"), str);
+						xfree(str);
+					}
+				}
+				list = get_long_debug(list);
+			}
+		}
 	} else if (c == 'R') { // residents
-		list = get_long (execbase + 300);
+		list = get_long_debug(execbase + 300);
 		while (list) {
 			uaecptr resident = get_long_debug (list);
 			if (!resident)

expansion.cpp

@@ -142,7 +142,7 @@ static bool chipdone;
 
 static addrbank* (*card_init[MAX_EXPANSION_BOARDS]) (void);
 static void (*card_map[MAX_EXPANSION_BOARDS]) (void);
-static TCHAR *card_name[MAX_EXPANSION_BOARDS];
+static const TCHAR *card_name[MAX_EXPANSION_BOARDS];
 static int card_flags[MAX_EXPANSION_BOARDS];
 
 static int ecard, cardno, z3num;
@@ -231,6 +231,7 @@ static void addextrachip (uae_u32 sysbase)
 	}
 }
 
+addrbank expamem_null;
 
 static uae_u32 REGPARAM3 expamem_lget (uaecptr) REGPARAM;
 static uae_u32 REGPARAM3 expamem_wget (uaecptr) REGPARAM;
@@ -295,8 +296,13 @@ static addrbank *expamem_init_last (void)
 static void call_card_init(int index)
 {	
 	addrbank *ab;
-	expamem_bank.name = card_name[ecard] ? card_name[ecard] : (TCHAR*)_T("None");
+
+	expamem_bank.name = card_name[ecard] ? card_name[ecard] : _T("None");
 	ab = (*card_init[ecard]) ();
+	if (ab == &expamem_null) {
+		expamem_next();
+		return;
+	}
 	if (ab) {
 		// non-NULL: not using expamem_bank
 		if ((card_flags[ecard] & 1) && currprefs.cs_z3autoconfig) {
@@ -340,14 +346,14 @@ static int REGPARAM2 expamem_type (void)
 
 static uae_u32 REGPARAM2 expamem_lget (uaecptr addr)
 {
-	write_log (_T("warning: Z2 READ.L from address $%lx PC=%x\n"), addr, M68K_GETPC);
+	write_log (_T("warning: Z2 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
 	return (expamem_wget (addr) << 16) | expamem_wget (addr + 2);
 }
 
 static uae_u32 REGPARAM2 expamem_wget (uaecptr addr)
 {
 	uae_u32 v = (expamem_bget (addr) << 8) | expamem_bget (addr + 1);
-	write_log (_T("warning: READ.W from address $%lx=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
+	write_log (_T("warning: READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
 	return v;
 }
 
@@ -389,7 +395,7 @@ static void REGPARAM2 expamem_lput (uaecptr addr, uae_u32 value)
 #ifdef JIT
 	special_mem |= S_WRITE;
 #endif
-	write_log (_T("warning: Z2 WRITE.L to address $%lx : value $%lx\n"), addr, value);
+	write_log (_T("warning: Z2 WRITE.L to address $%08x : value $%08x\n"), addr, value);
 }
 
 static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value)
@@ -404,7 +410,7 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value)
 	if (ecard >= cardno)
 		return;
 	if (expamem_type () != zorroIII) {
-		write_log (_T("warning: WRITE.W to address $%lx : value $%x\n"), addr, value);
+		write_log (_T("warning: WRITE.W to address $%08x : value $%x\n"), addr, value);
 	} else {
 		switch (addr & 0xff) {
 		case 0x44:
@@ -511,12 +517,12 @@ static uae_u32 REGPARAM2 expamemz3_bget (uaecptr addr)
 static uae_u32 REGPARAM2 expamemz3_wget (uaecptr addr)
 {
 	uae_u32 v = (expamemz3_bget (addr) << 8) | expamemz3_bget (addr + 1);
-	write_log (_T("warning: Z3 READ.W from address $%lx=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
+	write_log (_T("warning: Z3 READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
 	return v;
 }
 static uae_u32 REGPARAM2 expamemz3_lget (uaecptr addr)
 {
-	write_log (_T("warning: Z3 READ.L from address $%lx PC=%x\n"), addr, M68K_GETPC);
+	write_log (_T("warning: Z3 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
 	return (expamemz3_wget (addr) << 16) | expamemz3_wget (addr + 2);
 }
 static void REGPARAM2 expamemz3_bput (uaecptr addr, uae_u32 value)
@@ -544,7 +550,7 @@ static void REGPARAM2 expamemz3_lput (uaecptr addr, uae_u32 value)
 #ifdef JIT
 	special_mem |= S_WRITE;
 #endif
-	write_log (_T("warning: Z3 WRITE.L to address $%lx : value $%lx\n"), addr, value);
+	write_log (_T("warning: Z3 WRITE.L to address $%08x : value $%08x\n"), addr, value);
 }
 
 #ifdef CD32
@@ -717,7 +723,7 @@ static void expamem_map_catweasel (void)
 	catweasel_start = ((expamem_hi | (expamem_lo >> 4)) << 16);
 	if (catweasel_start) {
 		map_banks (&catweasel_bank, catweasel_start >> 16, 1, 0);
-		write_log (_T("Catweasel MK%d: mapped @$%lx\n"), cwc.type, catweasel_start);
+		write_log (_T("Catweasel MK%d: mapped @$%08x\n"), cwc.type, catweasel_start);
 	}
 }
 
@@ -818,7 +824,7 @@ static void REGPARAM2 filesys_lput (uaecptr addr, uae_u32 l)
 #ifdef JIT
 	special_mem |= S_WRITE;
 #endif
-	write_log (_T("filesys_lput called PC=%p\n"), M68K_GETPC);
+	write_log (_T("filesys_lput called PC=%08x\n"), M68K_GETPC);
 }
 
 static void REGPARAM2 filesys_wput (uaecptr addr, uae_u32 w)
@@ -826,7 +832,7 @@ static void REGPARAM2 filesys_wput (uaecptr addr, uae_u32 w)
 #ifdef JIT
 	special_mem |= S_WRITE;
 #endif
-	write_log (_T("filesys_wput called PC=%p\n"), M68K_GETPC);
+	write_log (_T("filesys_wput called PC=%08x\n"), M68K_GETPC);
 }
 
 static void REGPARAM2 filesys_bput (uaecptr addr, uae_u32 b)
@@ -889,9 +895,9 @@ static void expamem_map_fastcard_2 (int boardnum)
 	if (ab->start) {
 		map_banks (ab, ab->start >> 16, ab->allocated >> 16, 0);
 		if (ab->allocated <= 524288)
-		write_log (_T("%s: mapped @$%lx: %dKB fast memory\n"), ab->name, ab->start, ab->allocated >> 10);
+		write_log (_T("%s: mapped @$%08x: %dKB fast memory\n"), ab->name, ab->start, ab->allocated >> 10);
 		else
-		write_log (_T("%s: mapped @$%lx: %dMB fast memory\n"), ab->name, ab->start, ab->allocated >> 20);
+		write_log (_T("%s: mapped @$%08x: %dMB fast memory\n"), ab->name, ab->start, ab->allocated >> 20);
 	}
 }
 
@@ -972,7 +978,7 @@ static void expamem_map_filesys (void)
 
 	filesys_start = ((expamem_hi | (expamem_lo >> 4)) << 16);
 	map_banks (&filesys_bank, filesys_start >> 16, 1, 0);
-	write_log (_T("Filesystem: mapped memory @$%lx.\n"), filesys_start);
+	write_log (_T("Filesystem: mapped memory @$%08x.\n"), filesys_start);
 	/* 68k code needs to know this. */
 	a = here ();
 	org (rtarea_base + RTAREA_FSBOARD);
@@ -1128,7 +1134,7 @@ static void expamem_map_gfxcard (void)
 	gfxmem_bank.start = (expamem_hi | (expamem_lo >> 4)) << 16;
 	if (gfxmem_bank.start) {
 		map_banks (&gfxmem_bank, gfxmem_bank.start >> 16, gfxmem_bank.allocated >> 16, gfxmem_bank.allocated);
-		write_log (_T("%sUAEGFX-card: mapped @$%lx, %d MB RTG RAM\n"), currprefs.rtgmem_type ? _T("Z3") : _T("Z2"), gfxmem_bank.start, gfxmem_bank.allocated / 0x100000);
+		write_log (_T("%sUAEGFX-card: mapped @$%08x, %d MB RTG RAM\n"), currprefs.rtgmem_type ? _T("Z3") : _T("Z2"), gfxmem_bank.start, gfxmem_bank.allocated / 0x100000);
 	}
 }
 
@@ -1385,6 +1391,9 @@ static uaecptr check_boot_rom (void)
 		b = RTAREA_BACKUP;
 	if (currprefs.cs_mbdmac == 1 || currprefs.cpuboard_type)
 		b = RTAREA_BACKUP;
+	// CSPPC enables MMU at boot and remaps 0xea0000->0xeffff.
+	if (currprefs.cpuboard_type == BOARD_BLIZZARDPPC)
+		b = RTAREA_BACKUP_2;
 	ab = &get_mem_bank (RTAREA_DEFAULT);
 	if (ab) {
 		if (valid_address (RTAREA_DEFAULT, 65536))
@@ -1430,77 +1439,56 @@ uaecptr need_uae_boot_rom (void)
 	return v;
 }
 
+#ifdef A2065
 static addrbank *expamem_init_a2065(void)
 {
-#ifdef A2065
 	return a2065_init ();
-#else
-	return NULL;
-#endif
 }
+#endif
+#ifdef CDTV
 static addrbank *expamem_init_cdtv(void)
 {
-#ifdef CDTV
-	cdtv_init ();
-#endif
-	return NULL;
+	return cdtv_init ();
 }
+#endif
+#ifdef A2091
 static addrbank *expamem_init_a2091(void)
 {
-#ifdef A2091
 	return a2091_init (0);
-#else
-	return NULL;
-#endif
 }
+#endif
+#ifdef A2091
 static addrbank *expamem_init_a2091_2(void)
 {
-#ifdef A2091
 	return a2091_init (1);
-#else
-	return NULL;
-#endif
 }
+#endif
+#ifdef NCR
 static addrbank *expamem_init_a4091(void)
 {
-#ifdef NCR
 	return ncr710_a4091_autoconfig_init (0);
-#else
-	return NULL;
-#endif
 }
 static addrbank *expamem_init_a4091_2(void)
 {
-#ifdef NCR
 	return ncr710_a4091_autoconfig_init (1);
-#else
-	return NULL;
-#endif
 }
 static addrbank *expamem_init_warpengine(void)
 {
-#ifdef NCR
 	return ncr710_warpengine_autoconfig_init();
-#else
-	return NULL;
-#endif
 }
+#endif
+#ifdef GFXBOARD
 static addrbank *expamem_init_gfxboard_memory(void)
 {
-#ifdef GFXBOARD
 	return gfxboard_init_memory ();
-#else
-	return NULL;
-#endif
 }
+#endif
+#ifdef GFXBOARD
 static addrbank *expamem_init_gfxboard_registers(void)
 {
-#ifdef GFXBOARD
 	return gfxboard_init_registers ();
-#else
-	return NULL;
-#endif
 }
+#endif
 
 void expamem_reset (void)
 {
@@ -1533,9 +1521,9 @@ void expamem_reset (void)
 		do_mount = 0;
 
 	if (currprefs.cpuboard_type) {
-		// This requires first 128k slot.
+		// This may require first 128k slot.
 		card_flags[cardno] = 1;
-		card_name[cardno] = _T("Blizzard");
+		card_name[cardno] = _T("CPUBoard");
 		card_init[cardno] = cpuboard_autoconfig_init;
 		card_map[cardno++] = NULL;
 	}
@@ -1909,7 +1897,7 @@ uae_u8 *restore_expansion (uae_u8 *src)
 	gfxmem_bank.start = restore_u32 ();
 	rtarea_base = restore_u32 ();
 	fastmem2_bank.start = restore_u32 ();
-	if (rtarea_base != 0 && rtarea_base != RTAREA_DEFAULT && rtarea_base != RTAREA_BACKUP)
+	if (rtarea_base != 0 && rtarea_base != RTAREA_DEFAULT && rtarea_base != RTAREA_BACKUP && rtarea_base != RTAREA_BACKUP_2)
 		rtarea_base = 0;
 	return src;
 }

filesys.cpp

@@ -46,6 +46,7 @@
 #include "savestate.h"
 #include "a2091.h"
 #include "ncr_scsi.h"
+#include "ncr9x_scsi.h"
 #include "cdtv.h"
 #include "sana2.h"
 #include "bsdsocket.h"
@@ -881,6 +882,13 @@ static void initialize_mountinfo (void)
 			} else if (currprefs.cpuboard_type == BOARD_BLIZZARDPPC) {
 				blizzardppc_add_scsi_unit(unit, uci);
 				added = true;
+			} else if (currprefs.cpuboard_type == BOARD_BLIZZARD_2060 ||
+				currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI ||
+				currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI ||
+				currprefs.cpuboard_type == BOARD_CSMK1 ||
+				currprefs.cpuboard_type == BOARD_CSMK2) {
+					cpuboard_ncr9x_add_scsi_unit(unit, uci);
+					added = true;
 			}
 #endif
 		} else if (type == HD_CONTROLLER_TYPE_SCSI_A4000T) {

gencpu.cpp

@@ -4982,6 +4982,7 @@ static void gen_opcode (unsigned long int opcode)
 	case i_CPUSHL:
 	case i_CPUSHP:
 	case i_CPUSHA:
+		printf ("\tflush_cpu_caches_040(opcode);\n");
 		if (using_mmu)
 			printf ("\tflush_mmu%s(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n", mmu_postfix);
 		printf ("\tif (opcode & 0x80)\n");

include/autoconf.h

@@ -8,6 +8,7 @@
 
 #define RTAREA_DEFAULT 0xf00000
 #define RTAREA_BACKUP  0xef0000
+#define RTAREA_BACKUP_2 0xdb0000
 #define RTAREA_SIZE 0x10000
 #define RTAREA_TRAPS 0x2000
 #define RTAREA_RTG 0x3000

include/cdtv.h

@@ -3,7 +3,7 @@
 
 extern addrbank dmac_bank;
 
-extern void cdtv_init (void);
+extern addrbank *cdtv_init (void);
 extern void cdtv_free (void);
 extern void CDTV_hsync_handler(void);
 extern void cdtv_check_banks (void);

include/cpuboard.h

@@ -8,19 +8,23 @@ extern void cpuboard_init(void);
 extern void cpuboard_clear(void);
 extern void cpuboard_vsync(void);
 extern void cpuboard_rethink(void);
+extern bool cpuboard_08000000(struct uae_prefs *p);
 
 extern void cyberstorm_scsi_ram_put(uaecptr addr, uae_u32);
 extern uae_u32 cyberstorm_scsi_ram_get(uaecptr addr);
 extern int REGPARAM3 cyberstorm_scsi_ram_check(uaecptr addr, uae_u32 size) REGPARAM;
 extern uae_u8 *REGPARAM3 cyberstorm_scsi_ram_xlate(uaecptr addr) REGPARAM;
 
-extern addrbank blizzardram_bank;
-
 #define BOARD_BLIZZARD_1230_IV 1
-#define BOARD_BLIZZARD_1260 2
-#define BOARD_BLIZZARD_2060 3
-#define BOARD_CSMK3 4
-#define BOARD_CSPPC 5
-#define BOARD_BLIZZARDPPC 6
-#define BOARD_WARPENGINE_A4000 7
+#define BOARD_BLIZZARD_1230_IV_SCSI 2
+#define BOARD_BLIZZARD_1260 3
+#define BOARD_BLIZZARD_1260_SCSI 4
+#define BOARD_BLIZZARD_2060 5
+#define BOARD_CSMK1 6
+#define BOARD_CSMK2 7
+#define BOARD_CSMK3 8
+#define BOARD_CSPPC 9
+#define BOARD_BLIZZARDPPC 10
+#define BOARD_WARPENGINE_A4000 11
+
 

include/custom.h

@@ -81,6 +81,7 @@ STATIC_INLINE int dmaen (unsigned int dmamask)
 #ifdef JIT
 #define SPCFLAG_END_COMPILE 16384
 #endif
+#define SPCFLAG_CHECK 32768
 
 extern uae_u16 adkcon;
 

include/memory.h

@@ -260,6 +260,16 @@ static uae_u8 *REGPARAM2 name ## _xlate (uaecptr addr) \
 }
 #endif
 
+#define DECLARE_MEMORY_FUNCTIONS(name) \
+ static uae_u32 REGPARAM3 name ## _lget (uaecptr) REGPARAM; \
+ static uae_u32 REGPARAM3 name ## _wget (uaecptr) REGPARAM; \
+ static uae_u32 REGPARAM3 name ## _bget (uaecptr) REGPARAM; \
+ static void REGPARAM3 name ## _lput (uaecptr, uae_u32) REGPARAM; \
+ static void REGPARAM3 name ## _wput (uaecptr, uae_u32) REGPARAM; \
+ static void REGPARAM3 name ## _bput (uaecptr, uae_u32) REGPARAM; \
+ static int REGPARAM3 name ## _check (uaecptr addr, uae_u32 size) REGPARAM; \
+ static uae_u8 *REGPARAM3 name ## _xlate (uaecptr addr) REGPARAM;
+
 #define MEMORY_FUNCTIONS(name) \
 MEMORY_LGET(name, 0); \
 MEMORY_WGET(name, 0); \
@@ -269,6 +279,7 @@ MEMORY_WPUT(name, 0); \
 MEMORY_BPUT(name, 0); \
 MEMORY_CHECK(name); \
 MEMORY_XLATE(name);
+
 #define MEMORY_FUNCTIONS_NOJIT(name) \
 MEMORY_LGET(name, 1); \
 MEMORY_WGET(name, 1); \
@@ -291,6 +302,7 @@ extern addrbank clock_bank;
 extern addrbank cia_bank;
 extern addrbank rtarea_bank;
 extern addrbank expamem_bank;
+extern addrbank expamem_null;
 extern addrbank fastmem_bank;
 extern addrbank fastmem_nojit_bank;
 extern addrbank fastmem2_bank;
@@ -509,7 +521,7 @@ extern void (REGPARAM3 *chipmem_wput_indirect)(uaecptr, uae_u32) REGPARAM;
 extern void (REGPARAM3 *chipmem_bput_indirect)(uaecptr, uae_u32) REGPARAM;
 extern int (REGPARAM3 *chipmem_check_indirect)(uaecptr, uae_u32) REGPARAM;
 extern uae_u8 *(REGPARAM3 *chipmem_xlate_indirect)(uaecptr) REGPARAM;
- 
+
 #ifdef NATMEM_OFFSET
 
 typedef struct shmpiece_reg {

include/newcpu.h

@@ -486,6 +486,8 @@ extern void sm68k_disasm (TCHAR*, TCHAR*, uaecptr addr, uaecptr *nextpc);
 extern int get_cpu_model (void);
 
 extern void set_cpu_caches (bool flush);
+extern void flush_cpu_caches(bool flush);
+extern void flush_cpu_caches_040(uae_u16 opcode);
 extern void REGPARAM3 MakeSR (void) REGPARAM;
 extern void REGPARAM3 MakeFromSR (void) REGPARAM;
 extern void REGPARAM3 Exception (int) REGPARAM;

include/options.h

@@ -409,6 +409,7 @@ struct uae_prefs {
 	int filesys_limit;
 	int filesys_max_name;
 	int filesys_max_file_size;
+	bool reset_delay;
 
 	int cs_compatible;
 	int cs_ciaatod;

main.cpp

@@ -46,6 +46,7 @@
 #include "a2091.h"
 #include "a2065.h"
 #include "ncr_scsi.h"
+#include "ncr9x_scsi.h"
 #include "scsi.h"
 #include "sana2.h"
 #include "blkdev.h"
@@ -59,6 +60,7 @@
 #include "luascript.h"
 #include "uaenative.h"
 #include "tabletlibrary.h"
+#include "cpuboard.h"
 #ifdef RETROPLATFORM
 #include "rp.h"
 #endif
@@ -316,6 +318,9 @@ void fixup_prefs (struct uae_prefs *p)
 	built_in_chipset_prefs (p);
 	fixup_cpu (p);
 
+	if (cpuboard_08000000(p))
+		p->mbresmem_high_size = p->cpuboardmem1_size;
+
 	if (((p->chipmem_size & (p->chipmem_size - 1)) != 0 && p->chipmem_size != 0x180000)
 		|| p->chipmem_size < 0x20000
 		|| p->chipmem_size > 0x800000)
@@ -974,6 +979,9 @@ void do_leave_program (void)
 	ncr710_free();
 	ncr_free();
 #endif
+#ifdef NCR9X
+	ncr9x_free();
+#endif
 #ifdef CD32
 	akiko_free ();
 	cd32_fmv_free();
@@ -1056,6 +1064,9 @@ void virtualdevice_init (void)
 	ncr710_init();
 	ncr_init();
 #endif
+#ifdef NCR9X
+	ncr9x_init();
+#endif
 }
 
 static int real_main2 (int argc, TCHAR **argv)

newcpu.cpp

@@ -62,6 +62,7 @@ int cpu_cycles;
 static int baseclock;
 bool m68k_pc_indirect;
 bool m68k_interrupt_delay;
+static bool m68k_reset_delay;
 static int cpu_prefs_changed_flag;
 
 int cpucycleunit;
@@ -1010,10 +1011,75 @@ bool set_cpu_tracer (bool state)
 	return is_cpu_tracer ();
 }
 
+void flush_cpu_caches(bool force)
+{
+	bool doflush = currprefs.cpu_compatible || currprefs.cpu_cycle_exact;
+
+	if (currprefs.cpu_model == 68020) {
+		if (regs.cacr & 0x08) { // clear instr cache
+			for (int i = 0; i < CACHELINES020; i++)
+				caches020[i].valid = 0;
+			regs.cacr &= ~0x08;
+		}
+		if (regs.cacr & 0x04) { // clear entry in instr cache
+			caches020[(regs.caar >> 2) & (CACHELINES020 - 1)].valid = 0;
+			regs.cacr &= ~0x04;
+		}
+	} else if (currprefs.cpu_model == 68030) {
+		if (regs.cacr & 0x08) { // clear instr cache
+			if (doflush) {
+				for (int i = 0; i < CACHELINES030; i++) {
+					icaches030[i].valid[0] = 0;
+					icaches030[i].valid[1] = 0;
+					icaches030[i].valid[2] = 0;
+					icaches030[i].valid[3] = 0;
+				}
+			}
+			regs.cacr &= ~0x08;
+		}
+		if (regs.cacr & 0x04) { // clear entry in instr cache
+			icaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
+			regs.cacr &= ~0x04;
+		}
+		if (regs.cacr & 0x800) { // clear data cache
+			if (doflush) {
+				for (int i = 0; i < CACHELINES030; i++) {
+					dcaches030[i].valid[0] = 0;
+					dcaches030[i].valid[1] = 0;
+					dcaches030[i].valid[2] = 0;
+					dcaches030[i].valid[3] = 0;
+				}
+			}
+			regs.cacr &= ~0x800;
+		}
+		if (regs.cacr & 0x400) { // clear entry in data cache
+			dcaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
+			regs.cacr &= ~0x400;
+		}
+	} else if (currprefs.cpu_model >= 68040) {
+		icachelinecnt = 0;
+		dcachelinecnt = 0;
+		if (doflush) {
+			for (int i = 0; i < CACHESETS040; i++) {
+				icaches040[i].valid[0] = 0;
+				icaches040[i].valid[1] = 0;
+				icaches040[i].valid[2] = 0;
+				icaches040[i].valid[3] = 0;
+			}
+		}
+	}
+}
+
+void flush_cpu_caches_040(uae_u16 opcode)
+{
+	int cache = (opcode >> 6) & 3;
+	if (!(cache & 2))
+			return;
+	flush_cpu_caches(true);
+}
+
 void set_cpu_caches (bool flush)
 {
-	int i;
-
 	regs.prefetch020addr = 0xffffffff;
 	regs.cacheholdingaddr020 = 0xffffffff;
 
@@ -1029,54 +1095,7 @@ void set_cpu_caches (bool flush)
 		}
 	}
 #endif
-	if (currprefs.cpu_model == 68020) {
-		if ((regs.cacr & 0x08) || flush) { // clear instr cache
-			for (i = 0; i < CACHELINES020; i++)
-				caches020[i].valid = 0;
-		}
-		if (regs.cacr & 0x04) { // clear entry in instr cache
-			caches020[(regs.caar >> 2) & (CACHELINES020 - 1)].valid = 0;
-			regs.cacr &= ~0x04;
-		}
-	} else if (currprefs.cpu_model == 68030) {
-		//regs.cacr |= 0x100;
-		if ((regs.cacr & 0x08) || flush) { // clear instr cache
-			for (i = 0; i < CACHELINES030; i++) {
-				icaches030[i].valid[0] = 0;
-				icaches030[i].valid[1] = 0;
-				icaches030[i].valid[2] = 0;
-				icaches030[i].valid[3] = 0;
-			}
-		}
-		if (regs.cacr & 0x04) { // clear entry in instr cache
-			icaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
-			regs.cacr &= ~0x04;
-		}
-		if ((regs.cacr & 0x800) || flush) { // clear data cache
-			for (i = 0; i < CACHELINES030; i++) {
-				dcaches030[i].valid[0] = 0;
-				dcaches030[i].valid[1] = 0;
-				dcaches030[i].valid[2] = 0;
-				dcaches030[i].valid[3] = 0;
-			}
-			regs.cacr &= ~0x800;
-		}
-		if (regs.cacr & 0x400) { // clear entry in data cache
-			dcaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
-			regs.cacr &= ~0x400;
-		}
-	} else if (currprefs.cpu_model == 68040) {
-		icachelinecnt = 0;
-		dcachelinecnt = 0;
-		if (!(regs.cacr & 0x8000)) {
-			for (i = 0; i < CACHESETS040; i++) {
-				icaches040[i].valid[0] = 0;
-				icaches040[i].valid[1] = 0;
-				icaches040[i].valid[2] = 0;
-				icaches040[i].valid[3] = 0;
-			}
-		}
-	}
+	flush_cpu_caches(flush);
 }
 
 STATIC_INLINE void count_instr (unsigned int opcode)
@@ -1356,6 +1375,7 @@ static void prefs_changed_cpu (void)
 	currprefs.int_no_unimplemented = changed_prefs.int_no_unimplemented;
 	currprefs.fpu_no_unimplemented = changed_prefs.fpu_no_unimplemented;
 	currprefs.blitter_cycle_exact = changed_prefs.blitter_cycle_exact;
+	currprefs.reset_delay = changed_prefs.reset_delay;
 }
 
 
@@ -1380,6 +1400,7 @@ static int check_prefs_changed_cpu2(void)
 		|| currprefs.m68k_speed != changed_prefs.m68k_speed
 		|| currprefs.m68k_speed_throttle != changed_prefs.m68k_speed_throttle
 		|| currprefs.cpu_clock_multiplier != changed_prefs.cpu_clock_multiplier
+		|| currprefs.reset_delay != changed_prefs.reset_delay
 		|| currprefs.cpu_frequency != changed_prefs.cpu_frequency) {
 			cpu_prefs_changed_flag |= 2;
 	}
@@ -2693,6 +2714,8 @@ static void m68k_reset2(bool hardreset)
 	uae_u32 v;
 
 	regs.spcflags = 0;
+	m68k_reset_delay = true;
+	set_special(SPCFLAG_CHECK);
 	regs.ipl = regs.ipl_pin = 0;
 #ifdef SAVESTATE
 	if (isrestore ()) {
@@ -3162,6 +3185,24 @@ static int do_specialties (int cycles)
 	if (regs.spcflags & SPCFLAG_MODE_CHANGE)
 		return 1;
 	
+	if (regs.spcflags & SPCFLAG_CHECK) {
+		if (m68k_reset_delay) {
+			int vsynccnt = 60;
+			int vsyncstate = -1;
+			m68k_reset_delay = 0;
+			while (vsynccnt > 0 && !quit_program) {
+				x_do_cycles(8 * CYCLE_UNIT);
+				if (regs.spcflags & SPCFLAG_COPPER)
+					do_copper();
+				if (timeframes != vsyncstate) {
+					vsyncstate = timeframes;
+					vsynccnt--;
+				}
+			}
+		}
+		unset_special(SPCFLAG_CHECK);
+	}
+
 	regs.instruction_pc = m68k_getpc();
 
 #ifdef ACTION_REPLAY
@@ -5848,7 +5889,9 @@ void cpureset (void)
 	uae_u16 ins;
 	addrbank *ab;
 
-	send_internalevent (INTERNALEVENT_CPURESET);
+	m68k_reset_delay = true;
+	set_special(SPCFLAG_CHECK);
+	send_internalevent(INTERNALEVENT_CPURESET);
 	if ((currprefs.cpu_compatible || currprefs.cpu_cycle_exact) && currprefs.cpu_model <= 68020) {
 		custom_reset (false, false);
 		return;

od-win32/mman.cpp

@@ -177,6 +177,8 @@ bool preinit_shm (void)
 	if (natmem_size < 17 * 1024 * 1024)
 		natmem_size = 17 * 1024 * 1024;
 
+	//natmem_size = 257 * 1024 * 1024;
+
 	write_log (_T("Total physical RAM %lluM, all RAM %lluM. Attempting to reserve: %uM.\n"), totalphys64 >> 20, total64 >> 20, natmem_size >> 20);
 	natmem_offset_allocated = 0;
 	if (natmem_size <= 768 * 1024 * 1024) {
@@ -588,6 +590,12 @@ void *shmat (int shmid, void *shmaddr, int shmflg)
 			if (!a3000hmem_bank.start)
 				size += BARRIER;
 			got = TRUE;
+		} else if (!_tcscmp(shmids[shmid].name, _T("csmk1_maprom"))) {
+			shmaddr = natmem_offset + 0x07f80000;
+			got = TRUE;
+		} else if (!_tcscmp(shmids[shmid].name, _T("ramsey_high"))) {
+			shmaddr = natmem_offset + 0x08000000;
+			got = TRUE;
 		} else if (!_tcscmp(shmids[shmid].name, _T("cyberstorm"))) {
 			shmaddr = natmem_offset + 0x0c000000;
 			got = TRUE;

od-win32/resources/winuae.rc

@@ -1914,7 +1914,7 @@ BEGIN
     IDS_WSTYLE_STANDARD     "Standard"
     IDS_WSTYLE_EXTENDED     "Extended"
     IDS_MISCLISTITEMS1      "Untrap = middle button\nShow GUI on startup\nUse CTRL-F11 to quit\nDon't show taskbar button\nDon't show notification icon\n"
-    IDS_MISCLISTITEMS2      "Always on top\nDisable screensaver\nSynchronize clock\nFaster RTG\nClipboard sharing\nAllow native code\n"
+    IDS_MISCLISTITEMS2      "Always on top\nDisable screensaver\nSynchronize clock\nOne second reboot pause\nFaster RTG\nClipboard sharing\nAllow native code\n"
     IDS_MISCLISTITEMS3      "Native on-screen display\nRTG on-screen display\nCreate winuaelog.txt log\nLog illegal memory accesses\nBlank unused displays\nStart mouse uncaptured\nStart minimized\nMinimize when focus is lost\n100/120Hz VSync black frame insertion\nMaster floppy write protection\nHide all UAE autoconfig boards\n"
     IDS_JOYMODE_WHEELMOUSE  "Wheel Mouse"
     IDS_NUMSG_KS68030PLUS   "The selected system ROM requires a 68030 or higher CPU."

od-win32/sysconfig.h

@@ -76,7 +76,8 @@
 #define A2091 /* A590/A2091 SCSI */
 #define A2065 /* A2065 Ethernet card */
 #define GFXBOARD /* Hardware graphics board */
-#define NCR /* A4000T/A4091 SCSI */
+#define NCR /* A4000T/A4091, 53C710/53C770 SCSI */
+#define NCR9X /* 53C9X SCSI */
 #define SANA2 /* SANA2 network driver */
 #define AMAX /* A-Max ROM adapater emulation */
 #define RETROPLATFORM /* Cloanto RetroPlayer support */

od-win32/win32.h

@@ -20,12 +20,12 @@
 #define LANG_DLL_FULL_VERSION_MATCH 1
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("5")
+#define WINUAEBETA _T("6")
 #else
 #define WINUAEBETA _T("")
 #endif
 
-#define WINUAEDATE MAKEBD(2014, 7, 25)
+#define WINUAEDATE MAKEBD(2014, 7, 28)
 
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

od-win32/win32gui.cpp

@@ -77,6 +77,7 @@
 #include "gfxfilter.h"
 #include "driveclick.h"
 #include "scsi.h"
+#include "cpuboard.h"
 #ifdef PROWIZARD
 #include "moduleripper.h"
 #endif
@@ -3845,6 +3846,7 @@ static struct miscentry misclist[] = {
 	{ 0, 1, _T("Always on top"), &workprefs.win32_alwaysontop },
 	{ 0, 1, _T("Disable screensaver"), &workprefs.win32_powersavedisabled },
 	{ 0, 0, _T("Synchronize clock"), &workprefs.tod_hack },
+	{ 0, 1, _T("One second reboot pause"), &workprefs.reset_delay },
 	{ 0, 1, _T("Faster RTG"), &workprefs.picasso96_nocustom },
 	{ 0, 0, _T("Clipboard sharing"), &workprefs.clipboard_sharing },
 	{ 0, 1, _T("Allow native code"), &workprefs.native_code },
@@ -7317,6 +7319,10 @@ static void enable_for_memorydlg (HWND hDlg)
 {
 	int fast = true;
 	int z3 = true;
+	int mbram2 = z3;
+
+	if (cpuboard_08000000(&workprefs))
+		mbram2 = false;
 
 #ifndef AUTOCONFIG
 	z3 = FALSE;
@@ -7337,8 +7343,8 @@ static void enable_for_memorydlg (HWND hDlg)
 	ew (hDlg, IDC_GFXCARDTEXT, z3);
 	ew (hDlg, IDC_MBRAM1, z3);
 	ew (hDlg, IDC_MBMEM1, z3);
-	ew (hDlg, IDC_MBRAM2, z3);
-	ew (hDlg, IDC_MBMEM2, z3);
+	ew (hDlg, IDC_MBRAM2, mbram2);
+	ew (hDlg, IDC_MBMEM2, mbram2);
 	ew(hDlg, IDC_CPUBOARDMEM, workprefs.cpuboard_type > 0);
 	ew(hDlg, IDC_CPUBOARDRAM, workprefs.cpuboard_type > 0);
 	ew(hDlg, IDC_CPUBOARD_TYPE, workprefs.address_space_24 == false);
@@ -7633,6 +7639,9 @@ static void values_to_memorydlg (HWND hDlg)
 	SendDlgItemMessage (hDlg, IDC_MBMEM1, TBM_SETPOS, TRUE, mem_size);
 	SetDlgItemText (hDlg, IDC_MBRAM1, memsize_names[msi_gfx[mem_size]]);
 
+	if (cpuboard_08000000(&workprefs))
+		workprefs.mbresmem_high_size = workprefs.cpuboardmem1_size;
+
 	mem_size = 0;
 	switch (workprefs.mbresmem_high_size) {
 	case 0x00000000: mem_size = 0; break;
@@ -8153,9 +8162,13 @@ static INT_PTR CALLBACK MemoryDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARA
 		CheckDlgButton(hDlg, IDC_Z3REALMAPPING, workprefs.jit_direct_compatible_memory);
 		SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_RESETCONTENT, 0, 0);
 		SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("-"));
-		SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1230 IV"));
-		SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1260"));
-		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 2060 (Do not use)"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1230 IV"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1230 IV + SCSI"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1260"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1260 + SCSI"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 2060"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm MK I"));
+		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm MK II"));
 		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm MK III"));
 		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm PPC (NO PPC CPU!)"));
 		SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard PPC (NO PPC CPU!)"));

od-win32/winuae_msvc11/winuae_msvc.vcxproj

@@ -804,8 +804,10 @@
     <ClCompile Include="..\..\inputrecord.cpp" />
     <ClCompile Include="..\..\isofs.cpp" />
     <ClCompile Include="..\..\luascript.cpp" />
+    <ClCompile Include="..\..\ncr9x_scsi.cpp" />
     <ClCompile Include="..\..\newcpu_common.cpp" />
     <ClCompile Include="..\..\qemuvga\cirrus_vga.cpp" />
+    <ClCompile Include="..\..\qemuvga\esp.cpp" />
     <ClCompile Include="..\..\qemuvga\lsi53c710.cpp" />
     <ClCompile Include="..\..\qemuvga\lsi53c895a.cpp" />
     <ClCompile Include="..\..\qemuvga\qemuuaeglue.cpp" />

od-win32/winuae_msvc11/winuae_msvc.vcxproj.filters

@@ -667,6 +667,12 @@
     <ClCompile Include="..\..\qemuvga\lsi53c710.cpp">
       <Filter>qemu</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\ncr9x_scsi.cpp">
+      <Filter>common</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\qemuvga\esp.cpp">
+      <Filter>qemu</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <None Include="..\resources\35floppy.ico">