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CPU tester fixes, cycle counting was unreliable.
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parent
d1fc24084c
commit
4cb2a36d7c
16
cputest.cpp
16
cputest.cpp
@ -216,9 +216,6 @@ static int is_superstack_use_required(void)
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return 0;
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}
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#define OPCODE_AREA 32
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#define BRANCHTARGET_AREA 4
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static bool valid_address(uaecptr addr, int size, int rwp)
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{
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int w = rwp == 2;
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@ -880,13 +877,6 @@ void MakeFromSR_x(int t0trace)
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SET_VFLG((regs.sr >> 1) & 1);
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SET_CFLG(regs.sr & 1);
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if (regs.t1 == ((regs.sr >> 15) & 1) &&
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regs.t0 == ((regs.sr >> 14) & 1) &&
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regs.s == ((regs.sr >> 13) & 1) &&
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regs.m == ((regs.sr >> 12) & 1) &&
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regs.intmask == ((regs.sr >> 8) & 7))
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return;
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regs.t1 = (regs.sr >> 15) & 1;
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regs.t0 = (regs.sr >> 14) & 1;
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regs.s = (regs.sr >> 13) & 1;
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@ -1058,6 +1048,7 @@ static void doexcstack2(void)
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static void doexcstack(void)
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{
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bool g1 = generates_group1_exception(regs.ir);
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uaecptr original_pc = regs.pc;
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doexcstack2();
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if (test_exception < 4)
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@ -1098,6 +1089,7 @@ static void doexcstack(void)
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regs.read_buffer = regs.irc;
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// vector offset (not vbr + offset)
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regs.write_buffer = original_exception * 4;
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regs.pc = original_pc;
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}
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if (interrupt) {
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@ -4510,8 +4502,8 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi
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uae_u8 *bo = opcode_memory_ptr + 2;
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uae_u16 bopw1 = (bo[0] << 8) | (bo[1] << 0);
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uae_u16 bopw2 = (bo[2] << 8) | (bo[3] << 0);
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if (opc == 0x0662
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&& bopw1 == 0x3dec
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if (opc == 0x4e96
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//&& bopw1 == 0x3dec
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//&& bopw2 == 0x2770
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)
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printf("");
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@ -44,3 +44,6 @@
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#define CT_EMPTY CT_END_INIT
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#define CT_OVERRIDE_REG (0x80 | 0x40 | 0x10)
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#define CT_BRANCHED 0x40
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#define OPCODE_AREA 32
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#define BRANCHTARGET_AREA 4
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@ -2273,12 +2273,8 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st
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}
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if (exc == 0 && cpuexc == 4) {
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// successful complete generates exception 4 with matching PC
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if ((!branched && lregs->pc + opcodeendsizeextra != tregs->pc) || (branched && lregs->pc != tregs->pc)) {
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if (lregs->pc == tregs->pc) {
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branched2 = 1;
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} else {
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branched2 = 0;
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}
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if (lregs->pc + opcodeendsizeextra != tregs->pc) {
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branched2 = lregs->pc < opcode_memory_addr || lregs->pc >= opcode_memory_addr + OPCODE_AREA;
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if (dooutput) {
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sprintf(outbp, "PC (%c): expected %08x but got %08x\n", branched ? 'B' : '-', lregs->pc, tregs->pc);
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outbp += strlen(outbp);
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@ -2739,9 +2735,10 @@ static uae_u32 xorshift32(void)
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static void copyregs(struct registers *d, struct registers *s, short fpumode)
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{
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memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, cycles));
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if (fpumode) {
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memcpy(&d->fpuregs[0], &s->fpuregs[0], offsetof(struct registers, fsave) - offsetof(struct registers, fpuregs));
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memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, fsave));
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} else {
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memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, fpuregs));
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}
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}
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@ -2849,18 +2846,19 @@ static void process_test(uae_u8 *p)
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pw(opcode_memory_end, opcodeend >> 16);
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}
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if (test_regs.branchtarget != 0xffffffff && !(test_regs.branchtarget & 1)) {
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if (test_regs.branchtarget_mode == 1) {
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uae_u32 bv = gl((uae_u8*)test_regs.branchtarget);
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if (cur_regs.branchtarget != 0xffffffff && !(cur_regs.branchtarget & 1)) {
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if (cur_regs.branchtarget_mode == 1) {
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uae_u32 bv = gl((uae_u8*)cur_regs.branchtarget);
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bv = (bv >> 16) | (bv << 16);
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pl((uae_u8*)test_regs.branchtarget, bv);
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} else if (test_regs.branchtarget_mode == 2) {
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uae_u16 bv = gw((uae_u8 *)test_regs.branchtarget);
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pl((uae_u8*)cur_regs.branchtarget, bv);
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} else if (cur_regs.branchtarget_mode == 2) {
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uae_u16 bv = gw((uae_u8 *)cur_regs.branchtarget);
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if (bv == 0x4e71)
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bv = 0x4afc;
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else
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bv = 0x4e71;
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pw((uae_u8 *)test_regs.branchtarget, bv);
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pw((uae_u8 *)cur_regs.branchtarget, bv);
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}
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}
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