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This commit is contained in:
Toni Wilen 2022-11-19 19:48:51 +02:00
parent d9cf4ff3a5
commit 2c8b3fd26a
7 changed files with 71 additions and 73 deletions
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10
custom.cpp
View File

@ -8602,7 +8602,7 @@ static void BLTAPTL(int hpos, uae_u16 v)
maybe_blit(hpos, 0);
bltptx = bltapt;
setblitx(hpos, 1);
bltapt = (bltapt & ~0xffff) | (v & 0xFFFE);
bltapt = (bltapt & ~0xffff) | (v & 0xfffe);
}
static void BLTBPTH(int hpos, uae_u16 v)
{
@ -8617,7 +8617,7 @@ static void BLTBPTL(int hpos, uae_u16 v)
maybe_blit(hpos, 0);
bltptx = bltbpt;
setblitx(hpos, 2);
bltbpt = (bltbpt & ~0xffff) | (v & 0xFFFE);
bltbpt = (bltbpt & ~0xffff) | (v & 0xfffe);
}
static void BLTCPTH(int hpos, uae_u16 v)
{
@ -8631,7 +8631,7 @@ static void BLTCPTL(int hpos, uae_u16 v)
maybe_blit(hpos, 0);
bltptx = bltcpt;
setblitx(hpos, 3);
bltcpt = (bltcpt & ~0xffff) | (v & 0xFFFE);
bltcpt = (bltcpt & ~0xffff) | (v & 0xfffe);
}
static void BLTDPTH (int hpos, uae_u16 v)
{
@ -8662,7 +8662,7 @@ static void BLTDPTL(int hpos, uae_u16 v)
bltptx = bltdpt;
setblitx(hpos, 4);
bltdpt = (bltdpt & ~0xffff) | (v & 0xFFFE);
bltdpt = (bltdpt & ~0xffff) | (v & 0xfffe);
}
static void BLTSIZE(int hpos, uae_u16 v)
@ -13797,7 +13797,7 @@ static uae_u32 REGPARAM2 custom_bget(uaecptr addr)
return dummy_get(addr, 1, false, 0);
debug_invalid_reg(addr, 1, 0);
v = custom_wget2(addr & ~1, true);
v >>= (addr & 1 ? 0 : 8);
v >>= (addr & 1) ? 0 : 8;
return v;
}

3
debug.cpp
View File

@ -1317,7 +1317,6 @@ static void record_dma_clear(int r)
for (int h = 0; h < NR_DMA_REC_HPOS; h++) {
struct dma_rec *dr2 = &dr[v * NR_DMA_REC_HPOS + h];
memset(dr2, 0, sizeof(struct dma_rec));
dr->reg = 0xffff;
dr2->reg = 0xffff;
dr2->cf_reg = 0xffff;
dr2->addr = 0xffffffff;
@ -2129,7 +2128,7 @@ void record_dma_clear(int hpos, int vpos)
void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vpos, int phase)
{
struct dma_rec* dr;
struct dma_rec *dr;
dma_record_init();

36
disk.cpp
View File

@ -4810,34 +4810,35 @@ void DISK_update_adkcon (int hpos, uae_u16 v)
bitoffset = 0;
}
void DSKSYNC (int hpos, uae_u16 v)
void DSKSYNC(int hpos, uae_u16 v)
{
if (v == dsksync)
return;
DISK_update (hpos);
DISK_update(hpos);
dsksync = v;
}
STATIC_INLINE bool iswrite (void)
STATIC_INLINE bool iswrite(void)
{
return dskdmaen == DSKDMA_WRITE;
}
void DSKDAT (uae_u16 v)
void DSKDAT(uae_u16 v)
{
if (fifo_inuse[2]) {
write_log (_T("DSKDAT: FIFO overflow!\n"));
write_log(_T("DSKDAT: FIFO overflow!\n"));
return;
}
fifo_inuse[2] = fifo_inuse[1];
fifo[2] = fifo[1];
fifo_inuse[1] = fifo_inuse[0];
fifo[1] = fifo[0];
fifo_inuse[0] = iswrite () ? 2 : 1;
fifo_inuse[0] = iswrite() ? 2 : 1;
fifo[0] = v;
fifo_filled = 1;
}
uae_u16 DSKDATR (void)
uae_u16 DSKDATR(void)
{
int i;
uae_u16 v = 0;
@ -4849,14 +4850,14 @@ uae_u16 DSKDATR (void)
}
}
if (i < 0) {
write_log (_T("DSKDATR: FIFO underflow!\n"));
} else if (dskdmaen > 0 && dskdmaen < 3 && dsklength <= 0 && disk_fifostatus () < 0) {
disk_dmafinished ();
write_log(_T("DSKDATR: FIFO underflow!\n"));
} else if (dskdmaen > 0 && dskdmaen < 3 && dsklength <= 0 && disk_fifostatus() < 0) {
disk_dmafinished();
}
return v;
}
uae_u16 disk_dmal (void)
uae_u16 disk_dmal(void)
{
uae_u16 dmal = 0;
if (dskdmaen) {
@ -4880,21 +4881,22 @@ uaecptr disk_getpt(void)
dskpt += 2;
return pt & ~1;
}
void DSKPTH (uae_u16 v)
void DSKPTH(uae_u16 v)
{
dskpt = (dskpt & 0xffff) | ((uae_u32) v << 16);
dskpt = (dskpt & 0x0000ffff) | ((uae_u32) v << 16);
}
void DSKPTL (uae_u16 v)
void DSKPTL(uae_u16 v)
{
dskpt = (dskpt & ~0xffff) | (v);
dskpt = (dskpt & 0xffff0000) | (v & 0x0000fffe);
}
void DISK_free (void)
void DISK_free(void)
{
for (int dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) {
drive *drv = &floppy[dr];
drive_image_free (drv);
drive_image_free(drv);
}
}

46
fpp.cpp
View File

@ -378,7 +378,7 @@ static bool fp_exception_pending(bool pre)
if (support_exceptions && !jit_fpu()) {
if (regs.fp_exp_pend) {
if (warned > 0) {
write_log (_T("FPU ARITHMETIC EXCEPTION (%d) PC=%08x\n"), regs.fp_exp_pend, regs.instruction_pc);
write_log(_T("FPU ARITHMETIC EXCEPTION (%d) PC=%08x\n"), regs.fp_exp_pend, regs.instruction_pc);
}
regs.fpu_exp_pre = pre;
Exception(regs.fp_exp_pend);
@ -390,7 +390,7 @@ static bool fp_exception_pending(bool pre)
// no arithmetic exceptions pending, check for unimplemented datatype
if (regs.fp_unimp_pend) {
if (warned > 0) {
write_log (_T("FPU unimplemented datatype exception (%s) PC=%08x\n"), pre ? _T("pre") : _T("mid/post"), regs.instruction_pc);
write_log(_T("FPU unimplemented datatype exception (%s) PC=%08x\n"), pre ? _T("pre") : _T("mid/post"), regs.instruction_pc);
}
if (currprefs.cpu_model == 68060 && fpu_mmu_fixup) {
m68k_areg(regs, mmufixup[0].reg) = mmufixup[0].value;
@ -409,7 +409,7 @@ static void fp_unimp_instruction_exception_pending(void)
{
if (regs.fp_unimp_ins) {
if (warned > 0) {
write_log (_T("FPU UNIMPLEMENTED INSTRUCTION/FPU DISABLED EXCEPTION PC=%08x\n"), M68K_GETPC);
write_log(_T("FPU UNIMPLEMENTED INSTRUCTION/FPU DISABLED EXCEPTION PC=%08x\n"), M68K_GETPC);
}
if (currprefs.cpu_model == 68060 && fpu_mmu_fixup) {
m68k_areg(regs, mmufixup[0].reg) = mmufixup[0].value;
@ -664,7 +664,7 @@ static int fpsr_set_bsun(void)
regs.fpsr |= FPSR_AE_IOP;
if (regs.fpcr & FPSR_BSUN) {
write_log (_T("FPU exception: BSUN! (FPSR: %08x, FPCR: %08x)\n"), regs.fpsr, regs.fpcr);
write_log(_T("FPU exception: BSUN! (FPSR: %08x, FPCR: %08x)\n"), regs.fpsr, regs.fpcr);
if (support_exceptions && !jit_fpu()) {
regs.fp_exp_pend = fpsr_get_vector(FPSR_BSUN);
fp_exception_pending(true);
@ -984,7 +984,7 @@ static void fp_unimp_instruction(uae_u16 opcode, uae_u16 extra, uae_u32 ea, bool
}
}
if (warned > 0) {
write_log (_T("FPU unimplemented instruction: OP=%04X-%04X SRC=%08X-%08X-%08X EA=%08X PC=%08X\n"),
write_log(_T("FPU unimplemented instruction: OP=%04X-%04X SRC=%08X-%08X-%08X EA=%08X PC=%08X\n"),
opcode, extra, fsave_data.et[0],fsave_data.et[1],fsave_data.et[2], ea, oldpc);
#if EXCEPTION_FPP == 0
warned--;
@ -1061,7 +1061,7 @@ static void fp_unimp_datatype(uae_u16 opcode, uae_u16 extra, uae_u32 ea, bool ea
}
}
if (warned > 0) {
write_log (_T("FPU unimplemented datatype (%s): OP=%04X-%04X SRC=%08X-%08X-%08X EA=%08X PC=%08X\n"),
write_log(_T("FPU unimplemented datatype (%s): OP=%04X-%04X SRC=%08X-%08X-%08X EA=%08X PC=%08X\n"),
packed ? _T("packed") : _T("denormal"), opcode, extra,
packed ? fsave_data.fpt[2] : fsave_data.et[0], fsave_data.et[1], fsave_data.et[2], ea, oldpc);
#if EXCEPTION_FPP == 0
@ -1083,14 +1083,14 @@ static void fpu_op_illg(uae_u16 opcode, uae_u32 ea, bool easet, uaecptr oldpc)
return;
}
regs.fp_exception = true;
m68k_setpc (oldpc);
m68k_setpc(oldpc);
op_illg(opcode);
}
static void fpu_noinst(uae_u16 opcode, uaecptr pc)
{
#if EXCEPTION_FPP
write_log (_T("Unknown FPU instruction %04X %08X\n"), opcode, pc);
write_log(_T("Unknown FPU instruction %04X %08X\n"), opcode, pc);
#endif
regs.fp_exception = true;
m68k_setpc(pc);
@ -1102,11 +1102,11 @@ static bool if_no_fpu(void)
return (regs.pcr & 2) || currprefs.fpu_model <= 0;
}
static bool fault_if_no_fpu (uae_u16 opcode, uae_u16 extra, uaecptr ea, bool easet, uaecptr oldpc)
static bool fault_if_no_fpu(uae_u16 opcode, uae_u16 extra, uaecptr ea, bool easet, uaecptr oldpc)
{
if (if_no_fpu()) {
#if EXCEPTION_FPP
write_log (_T("no FPU: %04X-%04X PC=%08X\n"), opcode, extra, oldpc);
write_log(_T("no FPU: %04X-%04X PC=%08X\n"), opcode, extra, oldpc);
#endif
if (fpu_mmu_fixup) {
m68k_areg (regs, mmufixup[0].reg) = mmufixup[0].value;
@ -1408,7 +1408,7 @@ static bool fault_if_no_6888x (uae_u16 opcode, uae_u16 extra, uaecptr oldpc)
{
if (currprefs.cpu_model < 68040 && currprefs.fpu_model <= 0) {
#if EXCEPTION_FPP
write_log (_T("6888x no FPU: %04X-%04X PC=%08X\n"), opcode, extra, oldpc);
write_log(_T("6888x no FPU: %04X-%04X PC=%08X\n"), opcode, extra, oldpc);
#endif
m68k_setpc (oldpc);
regs.fp_exception = true;
@ -1752,7 +1752,7 @@ static int put_fp_value2(fpdata *value, uae_u32 opcode, uae_u16 extra, uaecptr o
#if DEBUG_FPP
if (!isinrom ())
write_log (_T("PUTFP: %04X %04X\n"), opcode, extra);
write_log(_T("PUTFP: %04X %04X\n"), opcode, extra);
#endif
#if 0
if (!(extra & 0x4000)) {
@ -2589,7 +2589,7 @@ void fpuop_restore (uae_u32 opcode)
#if FPU_LOG
if (!isinrom())
write_log (_T("FRESTORE %04x %08x\n"), opcode, M68K_GETPC);
write_log(_T("FRESTORE %04x %08x\n"), opcode, M68K_GETPC);
#endif
if (fault_if_no_6888x (opcode, 0, pc))
@ -2638,7 +2638,7 @@ retry:
regs.fp_exp_pend = 48 + v;
}
} else if (ff) {
write_log (_T("FRESTORE invalid frame format %02x %08x ADDR=%08x\n"), ff, d, ad_orig);
write_log(_T("FRESTORE invalid frame format %02x %08x ADDR=%08x\n"), ff, d, ad_orig);
Exception(14);
return;
} else {
@ -2693,7 +2693,7 @@ retry:
uae_u32 tmpsrc[3], tmpdst[3];
fpp_from_exten_fmovem(&src, &tmpsrc[0], &tmpsrc[1], &tmpsrc[2]);
fpp_from_exten_fmovem(&dst, &tmpdst[0], &tmpdst[1], &tmpdst[2]);
write_log (_T("FRESTORE src = %08X %08X %08X, dst = %08X %08X %08X, extra = %04X\n"),
write_log(_T("FRESTORE src = %08X %08X %08X, dst = %08X %08X %08X, extra = %04X\n"),
tmpsrc[0], tmpsrc[1], tmpsrc[2], tmpdst[0], tmpdst[1], tmpdst[2], cmdreg1b);
#endif
fpsr_clear_status();
@ -2705,7 +2705,7 @@ retry:
fpsr_check_arithmetic_exception(0, &src, regs.fp_opword, cmdreg1b, regs.fp_ea, regs.fp_ea_set, 0xffffffff);
} else {
write_log (_T("FRESTORE resume of opclass %d instruction not supported %08x\n"), opclass, ad_orig);
write_log(_T("FRESTORE resume of opclass %d instruction not supported %08x\n"), opclass, ad_orig);
}
}
@ -2718,7 +2718,7 @@ retry:
regs.fpu_state = 1;
regs.fpu_exp_state = 0;
} else {
write_log (_T("FRESTORE invalid frame size %02x %08x %08x\n"), frame_size, d, ad_orig);
write_log(_T("FRESTORE invalid frame size %02x %08x %08x\n"), frame_size, d, ad_orig);
Exception(14);
return;
@ -2732,7 +2732,7 @@ retry:
fpu_model = 68881;
goto retry;
}
write_log (_T("FRESTORE 68040 (%d) invalid frame version %02x %08x %08x\n"), fpu_model, frame_version, d, ad_orig);
write_log(_T("FRESTORE 68040 (%d) invalid frame version %02x %08x %08x\n"), fpu_model, frame_version, d, ad_orig);
Exception(14);
return;
}
@ -2771,10 +2771,10 @@ retry:
regs.fp_exp_pend = 0;
}
} else if (frame_size == 0xB4 || frame_size == 0xD4) {
write_log (_T("FRESTORE of busy frame not supported %08x\n"), ad_orig);
write_log(_T("FRESTORE of busy frame not supported %08x\n"), ad_orig);
ad += frame_size;
} else {
write_log (_T("FRESTORE invalid frame size %02x %08x %08x\n"), frame_size, d, ad_orig);
write_log(_T("FRESTORE invalid frame size %02x %08x %08x\n"), frame_size, d, ad_orig);
Exception(14);
return;
}
@ -2786,7 +2786,7 @@ retry:
fpu_model = 68040;
goto retry;
}
write_log (_T("FRESTORE 6888x (%d) invalid frame version %02x %08x %08x\n"), fpu_model, frame_version, d, ad_orig);
write_log(_T("FRESTORE 6888x (%d) invalid frame version %02x %08x %08x\n"), fpu_model, frame_version, d, ad_orig);
Exception(14);
return;
}
@ -3136,7 +3136,7 @@ static bool fp_arithmetic(fpdata *src, fpdata *dst, int extra)
return false;
}
default:
write_log (_T("Unknown FPU arithmetic function (%02x)\n"), extra & 0x7f);
write_log(_T("Unknown FPU arithmetic function (%02x)\n"), extra & 0x7f);
return false;
}
@ -3162,7 +3162,7 @@ static void fpuop_arithmetic2 (uae_u32 opcode, uae_u16 extra)
#if DEBUG_FPP
if (!isinrom ())
write_log (_T("FPP %04x %04x at %08x\n"), opcode & 0xffff, extra, pc);
write_log(_T("FPP %04x %04x at %08x\n"), opcode & 0xffff, extra, pc);
#endif
if (fault_if_no_6888x(opcode, extra, pc))
return;

5
gencpu.cpp
View File

@ -9445,7 +9445,7 @@ end:
if ((using_ce || using_prefetch) && did_prefetch >= 0) {
int ipladd = 0;
if (last_access_offset_ipl > 0) {
char iplfetch[100], iplfetchp[100];
char iplfetch[100];
int tc = get_current_cycles();
if (tc - ipl_fetch_cycles > 4 || ipl_fetched == 3) {
if (pre_ipl >= 2) {
@ -9456,12 +9456,9 @@ end:
} else {
strcpy(iplfetch, "ipl_fetch_next();\n");
}
//sprintf(iplfetchp, "ipl_fetch_prefetch(%d);\n", ipl_fetch_cycles + (pre_ipl >= 2 ? 2 : 0));
if (pre_ipl != 1) {
if (using_ce) {
ipladd = insertstring(iplfetch, last_access_offset_ipl);
} else {
//ipladd = insertstring(iplfetchp, last_access_offset_ipl);
}
}
} else if (ipl_fetched < 10) {

42
newcpu.cpp
View File

@ -3522,7 +3522,7 @@ static void m68k_reset2(bool hardreset)
regs.halted = 0;
gui_data.cpu_halted = 0;
gui_led (LED_CPU, 0, -1);
gui_led(LED_CPU, 0, -1);
regs.spcflags = 0;
m68k_reset_delay = 0;
@ -3537,9 +3537,9 @@ static void m68k_reset2(bool hardreset)
update_68k_cycles();
#ifdef SAVESTATE
if (isrestore ()) {
if (isrestore()) {
m68k_reset_sr();
m68k_setpc_normal (regs.pc);
m68k_setpc_normal(regs.pc);
return;
} else {
m68k_reset_delay = currprefs.reset_delay;
@ -3550,10 +3550,10 @@ static void m68k_reset2(bool hardreset)
if (currprefs.cpuboard_type) {
uaecptr stack;
v = cpuboard_get_reset_pc(&stack);
m68k_areg (regs, 7) = stack;
m68k_areg(regs, 7) = stack;
} else {
v = get_long (4);
m68k_areg (regs, 7) = get_long (0);
v = get_long(4);
m68k_areg(regs, 7) = get_long(0);
}
m68k_setpc_normal(v);
@ -3561,21 +3561,21 @@ static void m68k_reset2(bool hardreset)
regs.stopped = 0;
regs.t1 = 0;
regs.t0 = 0;
SET_ZFLG (0);
SET_XFLG (0);
SET_CFLG (0);
SET_VFLG (0);
SET_NFLG (0);
SET_ZFLG(0);
SET_XFLG(0);
SET_CFLG(0);
SET_VFLG(0);
SET_NFLG(0);
regs.intmask = 7;
regs.vbr = regs.sfc = regs.dfc = 0;
regs.irc = 0xffff;
#ifdef FPUEMU
fpu_reset ();
fpu_reset();
#endif
regs.caar = regs.cacr = 0;
regs.itt0 = regs.itt1 = regs.dtt0 = regs.dtt1 = 0;
regs.tcr = regs.mmusr = regs.urp = regs.srp = regs.buscr = 0;
mmu_tt_modified ();
mmu_tt_modified();
if (currprefs.cpu_model == 68020) {
regs.cacr |= 8;
set_cpu_caches (false);
@ -3589,11 +3589,11 @@ static void m68k_reset2(bool hardreset)
set_cpu_caches(false);
}
if (currprefs.mmu_model >= 68040) {
mmu_reset ();
mmu_set_tc (regs.tcr);
mmu_set_super (regs.s != 0);
mmu_reset();
mmu_set_tc(regs.tcr);
mmu_set_super(regs.s != 0);
} else if (currprefs.mmu_model == 68030) {
mmu030_reset (hardreset || regs.halted);
mmu030_reset(hardreset || regs.halted);
} else {
a3000_fakekick (0);
/* only (E)nable bit is zeroed when CPU is reset, A3000 SuperKickstart expects this */
@ -3619,7 +3619,7 @@ static void m68k_reset2(bool hardreset)
// regs.ce020memcycles = 0;
regs.ce020startcycle = regs.ce020endcycle = 0;
fill_prefetch ();
fill_prefetch();
}
void m68k_reset(void)
@ -5574,7 +5574,7 @@ void cpu_halt(int id)
// id < 0: m68k halted, PPC active.
// id > 0: emulation halted.
if (!regs.halted) {
write_log (_T("CPU halted: reason = %d PC=%08x\n"), id, M68K_GETPC);
write_log(_T("CPU halted: reason = %d PC=%08x\n"), id, M68K_GETPC);
if (currprefs.crash_auto_reset) {
write_log(_T("Forcing hard reset\n"));
uae_reset(true, false);
@ -5587,8 +5587,8 @@ void cpu_halt(int id)
gui_led(LED_CPU, 0, -1);
if (id >= 0) {
regs.intmask = 7;
MakeSR ();
audio_deactivate ();
MakeSR();
audio_deactivate();
if (debugging)
activate_debugger();
}

2
od-win32/direct3d11.cpp
View File

@ -1437,7 +1437,7 @@ static bool UpdateVertexArray(struct d3d11struct *d3d, ID3D11Buffer *vertexbuffe
float left, float top, float right, float bottom,
float slleft, float sltop, float slright, float slbottom)
{
VertexType* verticesPtr;
VertexType *verticesPtr;
D3D11_MAPPED_SUBRESOURCE mappedResource;
HRESULT result;
VertexType vertices[4];