mirror of
https://github.com/LIV2/WinUAE.git
synced 2025-12-06 00:12:52 +00:00
added missing #ifdef statements
Mostly those requiring DEBUGGER, but also a few more
This commit is contained in:
parent
0df9fc950e
commit
181b608fdb
@ -25,7 +25,9 @@
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#include "sounddep/sound.h"
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#include "events.h"
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#include "savestate.h"
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#ifdef DRIVESOUND
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#include "driveclick.h"
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#endif
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#include "zfile.h"
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#include "uae.h"
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#include "gui.h"
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34
blitter.cpp
34
blitter.cpp
@ -386,9 +386,11 @@ void blitter_debugdump(void)
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static void markidlecycle(int hpos)
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{
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_BLITSTARTFINISH, hpos, vpos);
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}
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#endif
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}
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static void check_channel_mods(int hpos, int ch, uaecptr *pt)
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@ -435,9 +437,11 @@ static void blitter_interrupt(void)
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}
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blt_info.blit_interrupt = 1;
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INTREQ_INT(6, 3);
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_BLITIRQ, current_hpos(), vpos);
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}
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#endif
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}
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static void blitter_end(void)
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@ -490,7 +494,9 @@ static void blit_chipmem_agnus_wput(uaecptr addr, uae_u32 w, uae_u32 typemask)
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if (blit_dof) {
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w = regs.chipset_latch_rw;
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}
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#ifdef DEBUGGER
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debug_putpeekdma_chipram(addr, w, typemask, 0x000, 0x054);
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#endif
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chipmem_wput_indirect(addr, w);
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regs.chipset_latch_rw = w;
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}
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@ -967,7 +973,9 @@ void blitter_handler(uae_u32 data)
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/* "free" blitter in immediate mode if it has been "stuck" ~3 frames
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* fixes some JIT game incompatibilities
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*/
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#ifdef DEBUGGER
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debugtest (DEBUGTEST_BLITTER, _T("force-unstuck!\n"));
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#endif
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}
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blitter_stuck = 0;
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if (blit_slowdown > 0 && !immediate_blits) {
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@ -1010,24 +1018,32 @@ static void blit_bltset(int con)
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if ((bltcon1 & BLTLINE) && !blitline_started) {
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write_log(_T("BLITTER: linedraw enabled when blitter is active! %08x\n"), M68K_GETPC);
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blit_warned--;
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#ifdef DEBUGGER
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if (log_blitter & 16)
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activate_debugger();
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#endif
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} else if (!(bltcon1 & BLTLINE) && blitline_started) {
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write_log(_T("BLITTER: linedraw disabled when blitter is active! %08x\n"), M68K_GETPC);
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blit_warned--;
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#ifdef DEBUGGER
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if (log_blitter & 16)
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activate_debugger();
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#endif
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}
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if ((bltcon1 & BLTFILL) && !(bltcon1_old & BLTFILL)) {
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write_log(_T("BLITTER: fill enabled when blitter is active! %08x\n"), M68K_GETPC);
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blit_warned--;
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#ifdef DEBUGGER
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if (log_blitter & 16)
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activate_debugger();
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#endif
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} else if (!(bltcon1 & BLTFILL) && (bltcon1_old & BLTFILL)) {
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write_log(_T("BLITTER: fill disabled when blitter is active! %08x\n"), M68K_GETPC);
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blit_warned--;
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#ifdef DEBUGGER
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if (log_blitter & 16)
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activate_debugger();
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#endif
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}
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}
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}
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@ -1062,14 +1078,18 @@ static void blit_bltset(int con)
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blitfc = !!(bltcon1 & BLTFC);
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blitife = !!(bltcon1 & BLTIFE);
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if ((bltcon1 & BLTFILL) == BLTFILL) {
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#ifdef DEBUGGER
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debugtest(DEBUGTEST_BLITTER, _T("weird fill mode\n"));
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#endif
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blitife = 0;
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}
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if (blitfill && !blitdesc) {
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#ifdef DEBUGGER
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debugtest(DEBUGTEST_BLITTER, _T("fill without desc\n"));
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if (log_blitter & 16) {
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activate_debugger();
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}
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#endif
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}
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shifter_skip_y = (bltcon0 & (BLTCHD | BLTCHC)) != 0x300;
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@ -1094,9 +1114,11 @@ static void blit_bltset(int con)
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blit_dof = 0;
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if ((bltcon1 & BLTDOFF) && ecs_agnus) {
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blit_dof = 1;
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#ifdef DEBUGGER
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debugtest(DEBUGTEST_BLITTER, _T("ECS BLTCON1 DOFF-bit set\n"));
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if (log_blitter & 16)
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activate_debugger();
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#endif
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}
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if (blit_changed && blit_warned > 0 && !savestate_state) {
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@ -1515,9 +1537,11 @@ static bool decide_blitter_maybe_write2(int until_hpos, uaecptr addr, uae_u32 va
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cycle_line_pipe[hpos] = 0;
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if (dat & CYCLE_PIPE_CPUSTEAL) {
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_CPUBLITTERSTOLEN, hpos, vpos);
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}
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#endif
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break;
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}
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@ -1527,9 +1551,11 @@ static bool decide_blitter_maybe_write2(int until_hpos, uaecptr addr, uae_u32 va
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// last D write?
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if (dat & BLITTER_PIPELINE_LASTD) {
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line = false;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_BLITFINALD, hpos, vpos);
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}
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#endif
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if (cycle_line_slot[hpos]) {
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write_log("Blitter cycle allocated by %d!?\n", cycle_line_slot[hpos]);
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}
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@ -1542,10 +1568,12 @@ static bool decide_blitter_maybe_write2(int until_hpos, uaecptr addr, uae_u32 va
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// finished?
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if (dat & BLITTER_PIPELINE_FINISHED) {
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if (line) {
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_BLITFINALD, hpos, vpos);
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//activate_debugger();
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}
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#endif
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}
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}
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@ -1955,9 +1983,11 @@ void do_blitter(int hpos, int copper, uaecptr pc)
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blit_firstline_cycles = blit_first_cycle + (blit_cyclecount * blt_info.hblitsize) * CYCLE_UNIT + cpu_cycles;
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}
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#ifdef DEBUGGER
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if (memwatch_enabled || BLITTER_DEBUG) {
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blitter_debugsave(copper, pc);
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}
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#endif
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if ((log_blitter & 1) || ((log_blitter & 32) && !blitline)) {
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if (1) {
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@ -2083,7 +2113,9 @@ void maybe_blit (int hpos, int hack)
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if (warned && dmaen (DMA_BLITTER) && blt_info.got_cycle) {
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warned--;
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#ifdef DEBUGGER
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debugtest (DEBUGTEST_BLITTER, _T("program does not wait for blitter tc=%d\n"), blit_cyclecounter);
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#endif
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if (log_blitter)
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warned = 0;
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if (log_blitter & 2) {
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@ -2193,8 +2225,10 @@ void restore_blitter_start(void)
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void restore_blitter_finish (void)
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{
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#ifdef DEBUGGER
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record_dma_reset(0);
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record_dma_reset(0);
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#endif
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blitter_cycle_exact = currprefs.blitter_cycle_exact;
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immediate_blits = currprefs.immediate_blits;
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if (blt_statefile_type == 0) {
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6
cdtv.cpp
6
cdtv.cpp
@ -17,6 +17,8 @@
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#include "sysconfig.h"
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#include "sysdeps.h"
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#ifdef CDTV
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#include "options.h"
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#include "memory.h"
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#include "custom.h"
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@ -1949,4 +1951,6 @@ void restore_cdtv_final(void)
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}
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}
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#endif
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#endif /* SAVESTATE */
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#endif /* CDTV */
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20
cia.cpp
20
cia.cpp
@ -19,7 +19,9 @@
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#include "custom.h"
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#include "newcpu.h"
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#include "cia.h"
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#ifdef SERIAL_PORT
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#include "serial.h"
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#endif
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#include "disk.h"
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#include "xwin.h"
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#include "keybuf.h"
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@ -290,9 +292,11 @@ static void RethinkICR(int num)
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#endif
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if (!(c->icr1 & 0x80)) {
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c->icr1 |= 0x80 | 0x40;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(num ? DMA_EVENT_CIAB_IRQ : DMA_EVENT_CIAA_IRQ, current_hpos(), vpos);
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}
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#endif
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ICR(num);
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}
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}
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@ -1921,9 +1925,11 @@ static void WriteCIAA(uae_u16 addr, uae_u8 val, uae_u32 *flags)
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arcadia_parport(1, c->prb, c->drb);
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}
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#endif
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#ifdef PARALLEL_PORT
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if (!isprinter() && parallel_port_scsi) {
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parallel_port_scsi_write(0, c->prb, c->drb);
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}
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#endif
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break;
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case 2:
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#if DONGLE_DEBUG > 0
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@ -2245,12 +2251,16 @@ static void cia_wait_pre(int cianummask)
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cia_now_evt = get_cycles();
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int syncdelay = 0;
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int delay = get_cia_sync_cycles(&syncdelay);
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#ifdef DEBUGGER
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if (debug_dma) {
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cia_cycles(syncdelay, 100, 0, 0);
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cia_cycles(delay, 0, 0, 0);
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} else {
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cia_cycles(syncdelay + delay, 0, 0, 0);
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}
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#else
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cia_cycles(syncdelay + delay, 0, 0, 0);
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#endif
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#endif
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}
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@ -2390,9 +2400,11 @@ static uae_u32 REGPARAM2 cia_bget(uaecptr addr)
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if (!isgaylenocia (addr))
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return dummy_get(addr, 1, false, 0);
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#ifdef DEBUGGER
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if (memwatch_access_validator) {
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validate_cia(addr, 0, 0);
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}
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#endif
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switch (cia_chipselect(addr))
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{
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@ -2452,9 +2464,11 @@ static uae_u32 REGPARAM2 cia_wget(uaecptr addr)
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if (!isgaylenocia (addr))
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return dummy_get_safe(addr, 2, false, 0);
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#ifdef DEBUGGER
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if (memwatch_access_validator) {
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write_log(_T("CIA word read %08x PC=%08x\n"), addr, M68K_GETPC);
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}
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#endif
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switch (cia_chipselect(addr))
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{
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@ -2525,12 +2539,14 @@ static uae_u32 REGPARAM2 cia_lgeti(uaecptr addr)
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static bool cia_debug(uaecptr addr, uae_u32 value, int size)
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{
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#ifdef DEBUGGER
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if (addr == DEBUG_SPRINTF_ADDRESS || addr == DEBUG_SPRINTF_ADDRESS + 4 || addr == DEBUG_SPRINTF_ADDRESS + 8 ||
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(addr == DEBUG_SPRINTF_ADDRESS + 2 && currprefs.cpu_model < 68020) ||
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(addr == DEBUG_SPRINTF_ADDRESS + 6 && currprefs.cpu_model < 68020) ||
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(addr == DEBUG_SPRINTF_ADDRESS + 10 && currprefs.cpu_model < 68020)) {
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return debug_sprintf(addr, value, size);
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}
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#endif
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return false;
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}
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@ -2549,9 +2565,11 @@ static void REGPARAM2 cia_bput(uaecptr addr, uae_u32 value)
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if (!isgaylenocia(addr))
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return;
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#ifdef DEBUGGER
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if (memwatch_access_validator) {
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validate_cia(addr, 1, value);
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}
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#endif
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int cs = cia_chipselect(addr);
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@ -2590,9 +2608,11 @@ static void REGPARAM2 cia_wput(uaecptr addr, uae_u32 v)
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if (!isgaylenocia(addr))
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return;
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#ifdef DEBUGGER
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if (memwatch_access_validator) {
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write_log(_T("CIA word write %08x = %04x PC=%08x\n"), addr, v & 0xffff, M68K_GETPC);
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}
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#endif
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if (addr & 1)
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v = (v << 8) | (v >> 8);
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120
custom.cpp
120
custom.cpp
@ -29,7 +29,9 @@
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#include "blitter.h"
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#include "xwin.h"
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#include "inputdevice.h"
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#ifdef SERIAL_PORT
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#include "serial.h"
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#endif
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#include "autoconf.h"
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#include "traps.h"
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#include "gui.h"
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@ -87,7 +89,9 @@
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#define LORES_TO_SHRES_SHIFT 2
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#ifdef SERIAL_PORT
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extern uae_u16 serper;
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#endif
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static void uae_abort (const TCHAR *format,...)
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{
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@ -1009,9 +1013,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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next_color_change++;
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cc[1].regno = -1;
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last_recorded_diw_hpos = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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thisline_changed = 1;
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}
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}
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@ -1025,9 +1031,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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next_color_change++;
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cc[1].regno = -1;
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last_recorded_diw_hpos = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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thisline_changed = 1;
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}
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}
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@ -1048,9 +1056,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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exthblank_state = true;
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last_recorded_diw_hpos = cc->linepos;
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last_hblank_start = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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}
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if (hbstop_v2 < chpos && hbstop_v2 >= last_recorded_diw_hpos) {
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// do_color_changes() HBLANK workaround
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@ -1069,9 +1079,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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cc[1].regno = -1;
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exthblank_state = false;
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last_recorded_diw_hpos = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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}
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} else if (hbstrt_v2 > hbstop_v2) { // equal: blank disable wins
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if (hbstop_v2 < chpos && hbstop_v2 >= last_recorded_diw_hpos) {
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@ -1090,9 +1102,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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cc[1].regno = -1;
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exthblank_state = false;
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last_recorded_diw_hpos = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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}
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if (hbstrt_v2 < chpos && hbstrt_v2 >= last_recorded_diw_hpos) {
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cc = &curr_color_changes[next_color_change];
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@ -1105,9 +1119,11 @@ static void record_color_change2(int hpos, int regno, uae_u32 value)
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exthblank_state = true;
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last_recorded_diw_hpos = cc->linepos;
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last_hblank_start = cc->linepos;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
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}
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#endif
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}
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}
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}
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@ -1274,9 +1290,11 @@ static void decide_hdiw_check_start(int start_diw_hpos, int end_diw_hpos, int ex
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// was closed previously in same line: blank closed part.
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hdiw_restart(last_diwlastword, first2);
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last_diwlastword = -1;
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#ifdef DEBUGGER
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if (debug_dma) {
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record_dma_event(DMA_EVENT_HDIWS, diw_to_hpos(first2), vpos);
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}
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#endif
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}
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if (thisline_decision.diwfirstword < 0) {
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thisline_decision.diwfirstword = adjust_hr2(first);
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@ -1284,9 +1302,11 @@ static void decide_hdiw_check_start(int start_diw_hpos, int end_diw_hpos, int ex
|
||||
if (!plane0_first_done) {
|
||||
plane0p_enabled = ecs_denise && (bplcon0 & 1) && (bplcon3 & 0x20);
|
||||
}
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_event(DMA_EVENT_HDIWS, diw_to_hpos(first), vpos);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
hdiwstate = diw_states::DIW_waiting_stop;
|
||||
}
|
||||
@ -1302,9 +1322,11 @@ static void decide_hdiw_check_stop(int start_diw_hpos, int end_diw_hpos, int ext
|
||||
// if HDIW opens again in same line
|
||||
int v = thisline_decision.diwlastword * 2;
|
||||
last_diwlastword = adjust_hr(v);
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_event(DMA_EVENT_HDIWE, diw_to_hpos(last), vpos);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
hdiwstate = diw_states::DIW_waiting_start;
|
||||
}
|
||||
@ -5766,10 +5788,12 @@ static void reset_decisions_hsync_start(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma && (new_beamcon0 & bemcon0_hsync_mask)) {
|
||||
record_dma_event(DMA_EVENT_HSS, hpos, vpos);
|
||||
record_dma_event(DMA_EVENT_HSE, hsstop, vpos);
|
||||
}
|
||||
#endif
|
||||
|
||||
toscr_hend = 0;
|
||||
last_bpl1dat_hpos = -1;
|
||||
@ -7738,7 +7762,9 @@ void rethink_uae_int(void)
|
||||
|
||||
static void rethink_intreq(void)
|
||||
{
|
||||
#ifdef SERIAL_PORT
|
||||
serial_rethink();
|
||||
#endif
|
||||
devices_rethink();
|
||||
}
|
||||
|
||||
@ -7874,9 +7900,11 @@ static void ADKCON(int hpos, uae_u16 v)
|
||||
DISK_update_adkcon(hpos, v);
|
||||
setclr(&adkcon, v);
|
||||
audio_update_adkmasks();
|
||||
#ifdef SERIAL_PORT
|
||||
if ((v >> 11) & 1) {
|
||||
serial_uartbreak((adkcon >> 11) & 1);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void check_harddis(void)
|
||||
@ -9325,7 +9353,9 @@ static int custom_wput_copper(int hpos, uaecptr pt, uaecptr addr, uae_u32 value,
|
||||
{
|
||||
int v;
|
||||
|
||||
#ifdef DEBUGGER
|
||||
value = debug_putpeekdma_chipset(0xdff000 + addr, value, MW_MASK_COPPER, 0x08c);
|
||||
#endif
|
||||
copper_access = 1;
|
||||
v = custom_wput_1(hpos, addr, value, noget);
|
||||
copper_access = 0;
|
||||
@ -9704,7 +9734,9 @@ static void do_copper_fetch(int hpos, uae_u16 id)
|
||||
{
|
||||
// COPJMP when previous instruction is mid-cycle
|
||||
cop_state.state = COP_read1;
|
||||
#ifdef DEBUGGER
|
||||
record_dma_event2(DMA_EVENT2_COPPERUSE, hpos, vpos);
|
||||
#endif
|
||||
alloc_cycle(hpos, CYCLE_COPPER);
|
||||
}
|
||||
break;
|
||||
@ -9816,7 +9848,9 @@ static void do_copper_fetch(int hpos, uae_u16 id)
|
||||
cop_state.vcmp = (cop_state.ir[0] & (cop_state.ir[1] | 0x8000)) >> 8;
|
||||
cop_state.hcmp = (cop_state.ir[0] & cop_state.ir[1] & 0xFE);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
record_copper(debugip - 4, debugip, cop_state.ir[0], cop_state.ir[1], hpos, vpos);
|
||||
#endif
|
||||
|
||||
} else {
|
||||
// MOVE
|
||||
@ -10062,9 +10096,11 @@ static void update_copper(int until_hpos)
|
||||
if (copper_bad_cycle - copper_bad_cycle_start != 3 * CYCLE_UNIT) {
|
||||
copper_bad_cycle = 0;
|
||||
} else {
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_event(DMA_EVENT_SPECIAL, hpos, vpos);
|
||||
}
|
||||
#endif
|
||||
// early COPJMP processing
|
||||
cop_state.state = COP_read1;
|
||||
copper_bad_cycle_pc_old = cop_state.ip;
|
||||
@ -10768,8 +10804,9 @@ static frame_time_t mavg(struct mavg_data *md, frame_time_t newval, int size)
|
||||
}
|
||||
|
||||
#define MAVG_VSYNC_SIZE 128
|
||||
|
||||
#ifdef DEBUGGER
|
||||
extern int log_vsync, debug_vsync_min_delay, debug_vsync_forced_delay;
|
||||
#endif
|
||||
static bool framewait(void)
|
||||
{
|
||||
struct amigadisplay *ad = &adisplays[0];
|
||||
@ -10818,12 +10855,14 @@ static bool framewait(void)
|
||||
}
|
||||
t = legacy_avg;
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_vsync_min_delay && t < debug_vsync_min_delay * vsynctimebase / 100) {
|
||||
t = debug_vsync_min_delay * vsynctimebase / 100;
|
||||
}
|
||||
if (debug_vsync_forced_delay > 0) {
|
||||
t = debug_vsync_forced_delay * vsynctimebase / 100;
|
||||
}
|
||||
#endif
|
||||
|
||||
vsync_time = read_processor_time();
|
||||
if (t > vsynctimebase * 2 / 3) {
|
||||
@ -10840,9 +10879,11 @@ static bool framewait(void)
|
||||
vsynctimeperline = 1;
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (0 || (log_vsync & 2)) {
|
||||
write_log (_T("%06d %06d/%06d %03d%%\n"), t, vsynctimeperline, vsynctimebase, t * 100 / vsynctimebase);
|
||||
}
|
||||
#endif
|
||||
|
||||
frame_shown = true;
|
||||
return 1;
|
||||
@ -11958,7 +11999,9 @@ static void hsync_handler_pre(bool onvsync)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
debug_hsync();
|
||||
#endif
|
||||
}
|
||||
|
||||
STATIC_INLINE bool is_last_line(void)
|
||||
@ -12900,6 +12943,7 @@ static void hsync_handler_post(bool onvsync)
|
||||
refresh_handled_slot = 0;
|
||||
refptr_preupdated = true;
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
if (vs_state_on) {
|
||||
record_dma_event(DMA_EVENT_VS, REFRESH_FIRST_HPOS, vpos);
|
||||
@ -12917,7 +12961,7 @@ static void hsync_handler_post(bool onvsync)
|
||||
record_dma_event(DMA_EVENT_LOL, REFRESH_FIRST_HPOS + 2, vpos);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
events_dmal_hsync();
|
||||
#if 0
|
||||
@ -13411,7 +13455,9 @@ void custom_reset(bool hardreset, bool keyboardreset)
|
||||
if (!isrestore()) {
|
||||
/* must be called after audio_reset */
|
||||
adkcon = 0;
|
||||
#ifdef SERIAL_PORT
|
||||
serial_uartbreak(0);
|
||||
#endif
|
||||
audio_update_adkmasks();
|
||||
}
|
||||
|
||||
@ -13462,9 +13508,11 @@ void custom_reset(bool hardreset, bool keyboardreset)
|
||||
CLXCON(-1, clxcon);
|
||||
CLXCON2(-1, clxcon2);
|
||||
calcdiw();
|
||||
#ifdef SERIAL_PORT
|
||||
v = serper;
|
||||
serper = 0;
|
||||
SERPER(v);
|
||||
#endif
|
||||
for (int i = 0; i < 8; i++) {
|
||||
SPRxCTLPOS(i);
|
||||
nr_armed += spr[i].armed != 0;
|
||||
@ -13650,8 +13698,10 @@ static uae_u32 REGPARAM2 custom_wget_1(int hpos, uaecptr addr, int noput, bool i
|
||||
#if CUSTOM_DEBUG > 2
|
||||
write_log (_T("%d:%d:wget: %04X=%04X pc=%p\n"), current_hpos(), vpos, addr, addr & 0x1fe, m68k_getpc ());
|
||||
#endif
|
||||
#ifdef DEBUGGER
|
||||
if (memwatch_access_validator)
|
||||
debug_check_reg(addr, 0, 0);
|
||||
#endif
|
||||
|
||||
addr &= 0xfff;
|
||||
|
||||
@ -13668,7 +13718,11 @@ static uae_u32 REGPARAM2 custom_wget_1(int hpos, uaecptr addr, int noput, bool i
|
||||
case 0x012: v = POT0DAT(); break;
|
||||
case 0x014: v = POT1DAT(); break;
|
||||
case 0x016: v = POTGOR(); break;
|
||||
#ifdef SERIAL_PORT
|
||||
case 0x018: v = SERDATR(); break;
|
||||
#else
|
||||
case 0x018: v = 0x3000 /* no data */; break;
|
||||
#endif
|
||||
case 0x01A: v = DSKBYTR(hpos); break;
|
||||
case 0x01C: v = INTENAR(); break;
|
||||
case 0x01E: v = INTREQR(); break;
|
||||
@ -13733,7 +13787,9 @@ writeonly:
|
||||
decide_line(hpos);
|
||||
decide_fetch_safe(hpos);
|
||||
decide_blitter(hpos);
|
||||
#ifdef DEBUGGER
|
||||
debug_wputpeek(0xdff000 + addr, l);
|
||||
#endif
|
||||
r = custom_wput_1(hpos, addr, l, 1);
|
||||
|
||||
// CPU gets back (OCS/ECS only):
|
||||
@ -13799,7 +13855,9 @@ static uae_u32 REGPARAM2 custom_wget(uaecptr addr)
|
||||
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
|
||||
return dummy_get(addr, 2, false, 0);
|
||||
if (addr & 1) {
|
||||
#ifdef DEBUGGER
|
||||
debug_invalid_reg(addr, 2, 0);
|
||||
#endif
|
||||
/* think about move.w $dff005,d0.. (68020+ only) */
|
||||
addr &= ~1;
|
||||
v = custom_wget2(addr, false) << 8;
|
||||
@ -13814,7 +13872,9 @@ static uae_u32 REGPARAM2 custom_bget(uaecptr addr)
|
||||
uae_u32 v;
|
||||
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
|
||||
return dummy_get(addr, 1, false, 0);
|
||||
#ifdef DEBUGGER
|
||||
debug_invalid_reg(addr, 1, 0);
|
||||
#endif
|
||||
v = custom_wget2(addr & ~1, true);
|
||||
v >>= (addr & 1) ? 0 : 8;
|
||||
return v;
|
||||
@ -13839,9 +13899,11 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n
|
||||
ar_custom[addr + 1]=(uae_u8)(value);
|
||||
#endif
|
||||
#endif
|
||||
#ifdef DEBUGGER
|
||||
if (memwatch_access_validator) {
|
||||
debug_check_reg(oaddr, 1, value);
|
||||
}
|
||||
#endif
|
||||
|
||||
switch (addr) {
|
||||
case 0x00E: CLXDAT(hpos); break;
|
||||
@ -13854,8 +13916,13 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n
|
||||
case 0x02A: VPOSW(value); break;
|
||||
case 0x02C: VHPOSW(value); break;
|
||||
case 0x02E: COPCON(value); break;
|
||||
#ifdef SERIAL_PORT
|
||||
case 0x030: SERDAT(value); break;
|
||||
case 0x032: SERPER(value); break;
|
||||
#else
|
||||
case 0x030: break;
|
||||
case 0x032: break;
|
||||
#endif
|
||||
case 0x034: POTGO(value); break;
|
||||
|
||||
case 0x040: BLTCON0(hpos, value); break;
|
||||
@ -14121,7 +14188,9 @@ static void REGPARAM2 custom_wput(uaecptr addr, uae_u32 value)
|
||||
#endif
|
||||
sync_copper(hpos);
|
||||
if (addr & 1) {
|
||||
#ifdef DEBUGGER
|
||||
debug_invalid_reg(addr, -2, value);
|
||||
#endif
|
||||
addr &= ~1;
|
||||
custom_wput_1(hpos, addr, (value >> 8) | (value & 0xff00), 0);
|
||||
custom_wput_1(hpos, addr + 2, (value << 8) | (value & 0x00ff), 0);
|
||||
@ -14138,7 +14207,9 @@ static void REGPARAM2 custom_bput (uaecptr addr, uae_u32 value)
|
||||
dummy_put(addr, 1, value);
|
||||
return;
|
||||
}
|
||||
#ifdef DEBUGGER
|
||||
debug_invalid_reg(addr, -1, value);
|
||||
#endif
|
||||
if (aga_mode) {
|
||||
if (addr & 1) {
|
||||
rval = value & 0xff;
|
||||
@ -14212,8 +14283,8 @@ uae_u8 *restore_custom(uae_u8 *src)
|
||||
RW; /* 004 VPOSR */
|
||||
RW; /* 006 VHPOSR */
|
||||
RW; /* 008 DSKDATR (dummy register) */
|
||||
JOYSET(0, RW); /* 00A JOY0DAT */
|
||||
JOYSET(1, RW); /* 00C JOY1DAT */
|
||||
JOYSET(0, RW); /* 00A JOY0DAT */
|
||||
JOYSET(1, RW); /* 00C JOY1DAT */
|
||||
clxdat = RW; /* 00E CLXDAT */
|
||||
RW; /* 010 ADKCONR */
|
||||
RW; /* 012 POT0DAT* */
|
||||
@ -14231,17 +14302,21 @@ uae_u8 *restore_custom(uae_u8 *src)
|
||||
RW; /* 02C VHPOSW */
|
||||
COPCON(RW); /* 02E COPCON */
|
||||
RW; /* 030 SERDAT* */
|
||||
#ifdef SERIAL_PORT
|
||||
serper = RW; /* 032 SERPER* */
|
||||
#else
|
||||
RW; /* 032 SERPER* */
|
||||
#endif
|
||||
potgo_value = 0; POTGO(RW); /* 034 POTGO */
|
||||
RW; /* 036 JOYTEST* */
|
||||
RW; /* 038 STREQU */
|
||||
RW; /* 03A STRVHBL */
|
||||
RW; /* 03C STRHOR */
|
||||
RW; /* 03E STRLONG */
|
||||
BLTCON0(0, RW); /* 040 BLTCON0 */
|
||||
BLTCON1(0, RW); /* 042 BLTCON1 */
|
||||
BLTAFWM(0, RW); /* 044 BLTAFWM */
|
||||
BLTALWM(0, RW); /* 046 BLTALWM */
|
||||
BLTCON0(0, RW); /* 040 BLTCON0 */
|
||||
BLTCON1(0, RW); /* 042 BLTCON1 */
|
||||
BLTAFWM(0, RW); /* 044 BLTAFWM */
|
||||
BLTALWM(0, RW); /* 046 BLTALWM */
|
||||
BLTCPTH(0, RW);BLTCPTL(0, RW); /* 048-04B BLTCPT */
|
||||
BLTBPTH(0, RW);BLTBPTL(0, RW); /* 04C-04F BLTBPT */
|
||||
BLTAPTH(0, RW);BLTAPTL(0, RW); /* 050-053 BLTAPT */
|
||||
@ -14250,17 +14325,17 @@ uae_u8 *restore_custom(uae_u8 *src)
|
||||
RW; /* 05A BLTCON0L */
|
||||
blt_info.vblitsize = RW;/* 05C BLTSIZV */
|
||||
blt_info.hblitsize = RW;/* 05E BLTSIZH */
|
||||
BLTCMOD(0, RW); /* 060 BLTCMOD */
|
||||
BLTBMOD(0, RW); /* 062 BLTBMOD */
|
||||
BLTAMOD(0, RW); /* 064 BLTAMOD */
|
||||
BLTDMOD(0, RW); /* 066 BLTDMOD */
|
||||
BLTCMOD(0, RW); /* 060 BLTCMOD */
|
||||
BLTBMOD(0, RW); /* 062 BLTBMOD */
|
||||
BLTAMOD(0, RW); /* 064 BLTAMOD */
|
||||
BLTDMOD(0, RW); /* 066 BLTDMOD */
|
||||
RW; /* 068 ? */
|
||||
RW; /* 06A ? */
|
||||
RW; /* 06C ? */
|
||||
RW; /* 06E ? */
|
||||
BLTCDAT(0, RW); /* 070 BLTCDAT */
|
||||
BLTBDAT(0, RW); /* 072 BLTBDAT */
|
||||
BLTADAT(0, RW); /* 074 BLTADAT */
|
||||
BLTCDAT(0, RW); /* 070 BLTCDAT */
|
||||
BLTBDAT(0, RW); /* 072 BLTBDAT */
|
||||
BLTADAT(0, RW); /* 074 BLTADAT */
|
||||
RW; /* 076 ? */
|
||||
RW; /* 078 ? */
|
||||
RW; /* 07A ? */
|
||||
@ -14276,7 +14351,7 @@ uae_u8 *restore_custom(uae_u8 *src)
|
||||
ddfstrt = RW; /* 092 DDFSTRT */
|
||||
ddfstop = RW; /* 094 DDFSTOP */
|
||||
dmacon = RW & ~(0x2000|0x4000); /* 096 DMACON */
|
||||
CLXCON(-1, RW); /* 098 CLXCON */
|
||||
CLXCON(-1, RW); /* 098 CLXCON */
|
||||
intena = RW; /* 09A INTENA */
|
||||
intreq = RW; /* 09C INTREQ */
|
||||
adkcon = RW; /* 09E ADKCON */
|
||||
@ -14307,10 +14382,10 @@ uae_u8 *restore_custom(uae_u8 *src)
|
||||
vsstop = RW; /* 1CA VSSTOP */
|
||||
vbstrt = RW; /* 1CC VBSTRT */
|
||||
vbstop = RW; /* 1CE VBSTOP */
|
||||
SPRHSTRT(-1, RW); /* 1D0 SPRHSTART */
|
||||
SPRHSTOP(-1, RW); /* 1D2 SPRHSTOP */
|
||||
BPLHSTRT(-1, RW); /* 1D4 BPLHSTRT */
|
||||
BPLHSTOP(-1, RW); /* 1D6 BPLHSTOP */
|
||||
SPRHSTRT(-1, RW); /* 1D0 SPRHSTART */
|
||||
SPRHSTOP(-1, RW); /* 1D2 SPRHSTOP */
|
||||
BPLHSTRT(-1, RW); /* 1D4 BPLHSTRT */
|
||||
BPLHSTOP(-1, RW); /* 1D6 BPLHSTOP */
|
||||
hhpos = RW; /* 1D8 HHPOSW */
|
||||
RW; /* 1DA HHPOSR */
|
||||
new_beamcon0 = RW; /* 1DC BEAMCON0 */
|
||||
@ -14420,8 +14495,13 @@ uae_u8 *save_custom(size_t *len, uae_u8 *dstptr, int full)
|
||||
SW((lof_store ? 0x8001 : 0) | (lol ? 0x0080 : 0));/* 02A VPOSW */
|
||||
SW(0); /* 02C VHPOSW */
|
||||
SW(copcon); /* 02E COPCON */
|
||||
#ifdef SERIAL_PORT
|
||||
SW(serdat); /* 030 SERDAT * */
|
||||
SW(serper); /* 032 SERPER * */
|
||||
#else
|
||||
SW(0); /* 030 SERDAT * */
|
||||
SW(0); /* 032 SERPER * */
|
||||
#endif
|
||||
SW(potgo_value); /* 034 POTGO */
|
||||
SW(0); /* 036 JOYTEST * */
|
||||
SW(0); /* 038 STREQU */
|
||||
|
||||
14
devices.cpp
14
devices.cpp
@ -16,8 +16,10 @@
|
||||
#include "sndboard.h"
|
||||
#include "statusline.h"
|
||||
#include "uae/ppc.h"
|
||||
#ifdef CD32
|
||||
#include "cd32_fmv.h"
|
||||
#include "akiko.h"
|
||||
#endif
|
||||
#include "disk.h"
|
||||
#include "cia.h"
|
||||
#include "inputdevice.h"
|
||||
@ -29,7 +31,9 @@
|
||||
#include "blitter.h"
|
||||
#include "xwin.h"
|
||||
#include "custom.h"
|
||||
#ifdef SERIAL_PORT
|
||||
#include "serial.h"
|
||||
#endif
|
||||
#include "bsdsocket.h"
|
||||
#include "uaeserial.h"
|
||||
#include "uaeresource.h"
|
||||
@ -39,10 +43,14 @@
|
||||
#include "gui.h"
|
||||
#include "savestate.h"
|
||||
#include "uaeexe.h"
|
||||
#ifdef WITH_UAENATIVE
|
||||
#include "uaenative.h"
|
||||
#endif
|
||||
#include "tabletlibrary.h"
|
||||
#include "luascript.h"
|
||||
#ifdef DRIVESOUND
|
||||
#include "driveclick.h"
|
||||
#endif
|
||||
#include "x86.h"
|
||||
#include "ethernet.h"
|
||||
#include "drawing.h"
|
||||
@ -250,7 +258,9 @@ void devices_hsync(void)
|
||||
CIA_hsync_prehandler();
|
||||
|
||||
decide_blitter(-1);
|
||||
#ifdef SERIAL_PORT
|
||||
serial_hsynchandler();
|
||||
#endif
|
||||
|
||||
execute_device_items(device_hsyncs, device_hsync_cnt);
|
||||
}
|
||||
@ -281,7 +291,9 @@ void devices_update_sound(float clk, float syncadjust)
|
||||
|
||||
void devices_update_sync(float svpos, float syncadjust)
|
||||
{
|
||||
#ifdef CD32
|
||||
cd32_fmv_set_sync(svpos, syncadjust);
|
||||
#endif
|
||||
}
|
||||
|
||||
void virtualdevice_free(void)
|
||||
@ -316,7 +328,9 @@ void virtualdevice_free(void)
|
||||
memory_cleanup();
|
||||
free_shm();
|
||||
cfgfile_addcfgparam(0);
|
||||
#ifdef DRIVESOUND
|
||||
driveclick_free();
|
||||
#endif
|
||||
ethernet_enumerate_free();
|
||||
rtarea_free();
|
||||
|
||||
|
||||
213
disk.cpp
213
disk.cpp
@ -41,7 +41,9 @@ int disk_debug_track = -1;
|
||||
#include "fdi2raw.h"
|
||||
#endif
|
||||
#include "catweasel.h"
|
||||
#ifdef DRIVESOUND
|
||||
#include "driveclick.h"
|
||||
#endif
|
||||
#ifdef CAPS
|
||||
#include "caps/caps_win32.h"
|
||||
#endif
|
||||
@ -640,7 +642,7 @@ static int get_floppy_speed (void)
|
||||
static int get_floppy_speed_from_image(drive *drv)
|
||||
{
|
||||
int l, m;
|
||||
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (drv->bridge) {
|
||||
drv->fourms = drv->bridge->getBitSpeed() == 4;
|
||||
@ -908,7 +910,11 @@ static void update_drive_gui(int num, bool force)
|
||||
gui_data.drive_side = side;
|
||||
gid->drive_writing = writ;
|
||||
gid->floppy_protected = drive_writeprotected(drv);
|
||||
#ifdef FLOPPYBRIDGE
|
||||
gid->floppy_inserted = gid->df[0] || (drv->bridge && !drv->bridge->hasDiskChanged());
|
||||
#else
|
||||
gid->floppy_inserted = gid->df[0];
|
||||
#endif
|
||||
gui_led (num + LED_DF0, (gid->drive_motor ? 1 : 0) | (gid->drive_writing ? 2 : 0), -1);
|
||||
}
|
||||
|
||||
@ -1311,7 +1317,11 @@ static int drive_insert (drive *drv, struct uae_prefs *p, int dnum, const TCHAR
|
||||
int dfxtype = p->floppyslots[dnum].dfxtype;
|
||||
|
||||
drive_image_free (drv);
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (!fake && !drv->bridge) {
|
||||
#else
|
||||
if (!fake) {
|
||||
#endif
|
||||
DISK_examine_image(p, dnum, &disk_info_data, false, NULL);
|
||||
}
|
||||
DISK_validate_filename (p, fname_in, dnum, outname, 1, &drv->wrprot, &drv->crc32, &drv->diskfile);
|
||||
@ -1335,7 +1345,11 @@ static int drive_insert (drive *drv, struct uae_prefs *p, int dnum, const TCHAR
|
||||
drv->dskready_down_time = 0;
|
||||
}
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (drv->diskfile == NULL && !drv->catweasel && !drv->bridge) {
|
||||
#else
|
||||
if (drv->diskfile == NULL && !drv->catweasel) {
|
||||
#endif
|
||||
track_reset (drv);
|
||||
return 0;
|
||||
}
|
||||
@ -1537,88 +1551,88 @@ static int drive_insert (drive *drv, struct uae_prefs *p, int dnum, const TCHAR
|
||||
size == 9 * 80 * 1 * 512 || size == 18 * 80 * 1 * 512 || size == 10 * 80 * 1 * 512 || size == 20 * 80 * 1 * 512 ||
|
||||
size == 9 * 81 * 1 * 512 || size == 18 * 81 * 1 * 512 || size == 10 * 81 * 1 * 512 || size == 20 * 81 * 1 * 512 ||
|
||||
size == 9 * 82 * 1 * 512 || size == 18 * 82 * 1 * 512 || size == 10 * 82 * 1 * 512 || size == 20 * 82 * 1 * 512)) {
|
||||
/* PC formatted image */
|
||||
int side, sd;
|
||||
/* PC formatted image */
|
||||
int side, sd;
|
||||
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
sd = 0;
|
||||
|
||||
bool can40 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
|
||||
bool can80 = dfxtype == DRV_35_HD || dfxtype == DRV_PC_35_ONLY_80 || dfxtype == DRV_PC_525_40_80;
|
||||
bool drv525 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
|
||||
|
||||
for (side = 2; side > 0; side--) {
|
||||
if (drv->hard_num_cyls >= 80 && can80) {
|
||||
if (size == 9 * 80 * side * 512 || size == 9 * 81 * side * 512 || size == 9 * 82 * side * 512) {
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
} else if (!drv525 && (size == 18 * 80 * side * 512 || size == 18 * 81 * side * 512 || size == 18 * 82 * side * 512)) {
|
||||
drv->num_secs = 18;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (!drv525 && (size == 10 * 80 * side * 512 || size == 10 * 81 * side * 512 || size == 10 * 82 * side * 512)) {
|
||||
drv->num_secs = 10;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
} else if (!drv525 && (size == 20 * 80 * side * 512 || size == 20 * 81 * side * 512 || size == 20 * 82 * side * 512)) {
|
||||
drv->num_secs = 20;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (!drv525 && (size == 21 * 80 * side * 512 || size == 21 * 81 * side * 512 || size == 21 * 82 * side * 512)) {
|
||||
drv->num_secs = 21;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (size == 15 * 80 * side * 512) {
|
||||
drv->num_secs = 15;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (drv->hard_num_cyls == 40 || can40) {
|
||||
if (size == 9 * 40 * side * 512) {
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
sd = 1;
|
||||
break;
|
||||
} else if (size == 8 * 40 * side * 512) {
|
||||
drv->num_secs = 8;
|
||||
drv->ddhd = 1;
|
||||
sd = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
drv->num_tracks = size / (drv->num_secs * 512);
|
||||
|
||||
// SD disk in 5.25 drive = duplicate each track
|
||||
if (sd && dfxtype == DRV_525_DD) {
|
||||
drv->num_tracks *= 2;
|
||||
} else {
|
||||
sd = 0;
|
||||
}
|
||||
|
||||
bool can40 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
|
||||
bool can80 = dfxtype == DRV_35_HD || dfxtype == DRV_PC_35_ONLY_80 || dfxtype == DRV_PC_525_40_80;
|
||||
bool drv525 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
|
||||
|
||||
for (side = 2; side > 0; side--) {
|
||||
if (drv->hard_num_cyls >= 80 && can80) {
|
||||
if ( size == 9 * 80 * side * 512 || size == 9 * 81 * side * 512 || size == 9 * 82 * side * 512) {
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
} else if (!drv525 && (size == 18 * 80 * side * 512 || size == 18 * 81 * side * 512 || size == 18 * 82 * side * 512)) {
|
||||
drv->num_secs = 18;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (!drv525 && (size == 10 * 80 * side * 512 || size == 10 * 81 * side * 512 || size == 10 * 82 * side * 512)) {
|
||||
drv->num_secs = 10;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
} else if (!drv525 && (size == 20 * 80 * side * 512 || size == 20 * 81 * side * 512 || size == 20 * 82 * side * 512)) {
|
||||
drv->num_secs = 20;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (!drv525 && (size == 21 * 80 * side * 512 || size == 21 * 81 * side * 512 || size == 21 * 82 * side * 512)) {
|
||||
drv->num_secs = 21;
|
||||
drv->ddhd = 2;
|
||||
break;
|
||||
} else if (size == 15 * 80 * side * 512) {
|
||||
drv->num_secs = 15;
|
||||
drv->ddhd = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (drv->hard_num_cyls == 40 || can40) {
|
||||
if (size == 9 * 40 * side * 512) {
|
||||
drv->num_secs = 9;
|
||||
drv->ddhd = 1;
|
||||
sd = 1;
|
||||
break;
|
||||
} else if (size == 8 * 40 * side * 512) {
|
||||
drv->num_secs = 8;
|
||||
drv->ddhd = 1;
|
||||
sd = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
drv->num_tracks = size / (drv->num_secs * 512);
|
||||
|
||||
// SD disk in 5.25 drive = duplicate each track
|
||||
if (sd && dfxtype == DRV_525_DD) {
|
||||
drv->num_tracks *= 2;
|
||||
} else {
|
||||
sd = 0;
|
||||
}
|
||||
|
||||
drv->filetype = ADF_PCDOS;
|
||||
tid = &drv->trackdata[0];
|
||||
for (int i = 0; i < drv->num_tracks; i++) {
|
||||
tid->type = TRACK_PCDOS;
|
||||
tid->len = 512 * drv->num_secs;
|
||||
tid->bitlen = 0;
|
||||
tid->offs = (sd ? i / 2 : i) * 512 * drv->num_secs;
|
||||
if (side == 1) {
|
||||
tid++;
|
||||
tid->type = TRACK_NONE;
|
||||
tid->len = 512 * drv->num_secs;
|
||||
}
|
||||
tid->revolutions = 1;
|
||||
drv->filetype = ADF_PCDOS;
|
||||
tid = &drv->trackdata[0];
|
||||
for (int i = 0; i < drv->num_tracks; i++) {
|
||||
tid->type = TRACK_PCDOS;
|
||||
tid->len = 512 * drv->num_secs;
|
||||
tid->bitlen = 0;
|
||||
tid->offs = (sd ? i / 2 : i) * 512 * drv->num_secs;
|
||||
if (side == 1) {
|
||||
tid++;
|
||||
|
||||
tid->type = TRACK_NONE;
|
||||
tid->len = 512 * drv->num_secs;
|
||||
}
|
||||
drv->num_heads = side;
|
||||
if (side == 1)
|
||||
drv->num_tracks *= 2;
|
||||
tid->revolutions = 1;
|
||||
tid++;
|
||||
|
||||
}
|
||||
drv->num_heads = side;
|
||||
if (side == 1)
|
||||
drv->num_tracks *= 2;
|
||||
|
||||
} else if ((size == 262144 || size == 524288) && buffer[0] == 0x11 && (buffer[1] == 0x11 || buffer[1] == 0x14)) {
|
||||
|
||||
@ -2313,7 +2327,11 @@ static void drive_fill_bigbuf (drive * drv, int force)
|
||||
bool retrytrack;
|
||||
int rev = -1;
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if ((!drv->diskfile && !drv->catweasel && !drv->bridge) || tr >= drv->num_tracks) {
|
||||
#else
|
||||
if ((!drv->diskfile && !drv->catweasel) || tr >= drv->num_tracks) {
|
||||
#endif
|
||||
track_reset (drv);
|
||||
return;
|
||||
}
|
||||
@ -2504,9 +2522,13 @@ static int decode_buffer(drive *drv, uae_u16 *mbuf, int cyl, int drvsec, int ddh
|
||||
|
||||
memset (sectable, 0, MAX_SECTORS * sizeof (int));
|
||||
mstart = mbuf;
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (!drv->bridge) {
|
||||
memcpy(mbuf + fwlen, mbuf, fwlen * sizeof(uae_u16));
|
||||
}
|
||||
#else
|
||||
memcpy(mbuf + fwlen, mbuf, fwlen * sizeof(uae_u16));
|
||||
#endif
|
||||
mend -= (4 + 16 + 8 + 512);
|
||||
while (secwritten < drvsec) {
|
||||
int trackoffs;
|
||||
@ -2921,7 +2943,7 @@ static void drive_eject (drive * drv)
|
||||
#endif
|
||||
if (drv->diskfile || drv->filetype >= 0)
|
||||
statusline_add_message(STATUSTYPE_FLOPPY, _T("DF%d: -"), drv - floppy);
|
||||
drive_image_free (drv);
|
||||
drive_image_free(drv);
|
||||
drv->dskeject = false;
|
||||
drv->dskchange = true;
|
||||
drv->ddhd = 1;
|
||||
@ -3930,11 +3952,13 @@ static void disk_doupdate_write(int floppybits, int trackspeed)
|
||||
}
|
||||
dsklength--;
|
||||
if (dsklength <= 0) {
|
||||
// delay write DMA finished state until bridge has all pending data written
|
||||
#ifdef FLOPPYBRIDGE
|
||||
// delay write DMA finished state until bridge has all pending data written
|
||||
if (!wasBridge) {
|
||||
disk_dmafinished();
|
||||
}
|
||||
#else
|
||||
disk_dmafinished();
|
||||
#endif
|
||||
for (int dr = 0; dr < MAX_FLOPPY_DRIVES ; dr++) {
|
||||
drive *drv = &floppy[dr];
|
||||
@ -4342,7 +4366,9 @@ uae_u16 DSKBYTR(int hpos)
|
||||
if (disk_debug_track < 0 || disk_debug_track == 2 * drv->cyl + side) {
|
||||
disk_dma_debugmsg();
|
||||
write_log(_T("DSKBYTR=%04X\n"), v);
|
||||
#ifdef DEBUGGER
|
||||
activate_debugger();
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -4673,7 +4699,9 @@ void DSKLEN (uae_u16 v, int hpos)
|
||||
if (!(selected & (1 << dr))) {
|
||||
if (disk_debug_track < 0 || disk_debug_track == 2 * drv->cyl + side) {
|
||||
disk_dma_debugmsg ();
|
||||
#ifdef DEBUGGER
|
||||
activate_debugger ();
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -4734,12 +4762,20 @@ void DSKLEN (uae_u16 v, int hpos)
|
||||
int done = 0;
|
||||
for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) {
|
||||
drive *drv = &floppy[dr];
|
||||
#ifdef FLOPPYBRIDGE
|
||||
bool floppysupported = (drv->ddhd < 2) || (drv->ddhd > 1 && currprefs.floppyslots[dr].dfxtype == DRV_35_HD) || (drv->bridge);
|
||||
#else
|
||||
bool floppysupported = (drv->ddhd < 2) || (drv->ddhd > 1 && currprefs.floppyslots[dr].dfxtype == DRV_35_HD);
|
||||
#endif
|
||||
int pos, i;
|
||||
|
||||
if (drv->motoroff)
|
||||
continue;
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (!drv->useturbo && currprefs.floppy_speed > 0 && !drv->bridge)
|
||||
#else
|
||||
if (!drv->useturbo && currprefs.floppy_speed > 0)
|
||||
#endif
|
||||
continue;
|
||||
if (selected & (1 << dr))
|
||||
continue;
|
||||
@ -4971,6 +5007,7 @@ void DISK_free(void)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
static void floppybridge_read_track(drive *drv)
|
||||
{
|
||||
int timeout;
|
||||
@ -5204,6 +5241,8 @@ void floppybridge_modified(int num)
|
||||
}
|
||||
}
|
||||
|
||||
#endif //FLOPPYBRIDGE
|
||||
|
||||
void DISK_init (void)
|
||||
{
|
||||
for (int dr = MAX_FLOPPY_DRIVES - 1; dr >= 0; dr--) {
|
||||
@ -5214,7 +5253,9 @@ void DISK_init (void)
|
||||
if (!drive_insert (drv, &currprefs, dr, currprefs.floppyslots[dr].df, false, currprefs.floppyslots[dr].forcedwriteprotect))
|
||||
disk_eject (dr);
|
||||
}
|
||||
#ifdef FLOPPYBRIDGE
|
||||
floppybridge_init2(&currprefs);
|
||||
#endif
|
||||
if (disk_empty (0))
|
||||
write_log (_T("No disk in drive 0.\n"));
|
||||
amax_init ();
|
||||
@ -5389,6 +5430,7 @@ static void abrcheck(struct diskinfo *di)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
static void get_floppybridgeinfo(struct uae_prefs *prefs, TCHAR *infotext, int num)
|
||||
{
|
||||
if (!infotext) {
|
||||
@ -5423,6 +5465,7 @@ static void get_floppybridgeinfo(struct uae_prefs *prefs, TCHAR *infotext, int n
|
||||
p += _tcslen(p);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
int DISK_examine_image(struct uae_prefs *p, int num, struct diskinfo *di, bool deepcheck, TCHAR *infotext)
|
||||
{
|
||||
@ -5434,7 +5477,11 @@ int DISK_examine_image(struct uae_prefs *p, int num, struct diskinfo *di, bool d
|
||||
int sectable[MAX_SECTORS];
|
||||
int oldcyl, oldside;
|
||||
uae_u32 v = 0;
|
||||
#ifdef FLOPPYBRIDGE
|
||||
bool fb = DISK_isfloppybridge(p, num);
|
||||
#else
|
||||
bool fb = false;
|
||||
#endif
|
||||
|
||||
if (infotext) {
|
||||
infotext[0] = 0;
|
||||
@ -5442,16 +5489,22 @@ int DISK_examine_image(struct uae_prefs *p, int num, struct diskinfo *di, bool d
|
||||
ret = 0;
|
||||
memset (di, 0, sizeof (struct diskinfo));
|
||||
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (fb) {
|
||||
get_floppybridgeinfo(p, infotext, num);
|
||||
}
|
||||
#endif
|
||||
|
||||
di->unreadable = true;
|
||||
oldcyl = drv->cyl;
|
||||
oldside = side;
|
||||
drv->cyl = 0;
|
||||
side = 0;
|
||||
#ifdef FLOPPYBRIDGE
|
||||
if (!drive_insert (drv, p, num, p->floppyslots[num].df, true, true) || (!drv->diskfile && !drv->bridge)) {
|
||||
#else
|
||||
if (!drive_insert(drv, p, num, p->floppyslots[num].df, true, true)) {
|
||||
#endif
|
||||
drv->cyl = oldcyl;
|
||||
side = oldside;
|
||||
return 1;
|
||||
|
||||
@ -52,7 +52,9 @@ happening, all ports should restrict window widths to be multiples of 16 pixels.
|
||||
#include "statusline.h"
|
||||
#include "inputdevice.h"
|
||||
#include "debug.h"
|
||||
#ifdef CD32
|
||||
#include "cd32_fmv.h"
|
||||
#endif
|
||||
#include "specialmonitors.h"
|
||||
#include "devices.h"
|
||||
#include "gfxboard.h"
|
||||
@ -4794,6 +4796,7 @@ static void finish_drawing_frame(bool drawlines)
|
||||
vidinfo->drawbuffer.tempbufferinuse = true;
|
||||
}
|
||||
|
||||
#ifdef CD32
|
||||
// cd32 fmv
|
||||
if (!currprefs.monitoremu && vidinfo->tempbuffer.bufmem_allocated && currprefs.cs_cd32fmv) {
|
||||
if (cd32_fmv_active) {
|
||||
@ -4805,6 +4808,7 @@ static void finish_drawing_frame(bool drawlines)
|
||||
vidinfo->drawbuffer.tempbufferinuse = false;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
// grayscale
|
||||
if (!currprefs.monitoremu && vidinfo->tempbuffer.bufmem_allocated &&
|
||||
|
||||
@ -28,7 +28,9 @@
|
||||
#include "a2091.h"
|
||||
#include "a2065.h"
|
||||
#include "gfxboard.h"
|
||||
#ifdef CD32
|
||||
#include "cd32_fmv.h"
|
||||
#endif
|
||||
#include "ncr_scsi.h"
|
||||
#include "ncr9x_scsi.h"
|
||||
#include "scsi.h"
|
||||
|
||||
23
filesys.cpp
23
filesys.cpp
@ -58,7 +58,9 @@
|
||||
#include "blkdev.h"
|
||||
#include "isofs_api.h"
|
||||
#include "scsi.h"
|
||||
#ifdef WITH_UAENATIVE
|
||||
#include "uaenative.h"
|
||||
#endif
|
||||
#include "tabletlibrary.h"
|
||||
#include "cia.h"
|
||||
#include "picasso96.h"
|
||||
@ -9160,6 +9162,7 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *ctx)
|
||||
uaecptr ret = consolehook_beginio(ctx, trap_get_areg(ctx, 1));
|
||||
trap_put_long(ctx, trap_get_areg(ctx, 7) + 4 * 4, ret);
|
||||
} else if (mode == 200) {
|
||||
#ifdef DEBUGGER
|
||||
uae_u32 v;
|
||||
// a0 = data, d0 = length, a1 = task, d3 = stack size (in), stack ptr (out)
|
||||
// a2 = debugdata, d2 = debuglength
|
||||
@ -9174,19 +9177,27 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *ctx)
|
||||
trap_get_areg(ctx, 1), &stack);
|
||||
trap_set_dreg(ctx, 2, stack);
|
||||
return v;
|
||||
#endif
|
||||
} else if (mode == 201) {
|
||||
#ifdef DEBUGGER
|
||||
debugmem_break(8);
|
||||
#endif
|
||||
return 1;
|
||||
} else if (mode == 202) {
|
||||
// a0 = seglist, a1 = name, d2 = lock
|
||||
#ifdef DEBUGGER
|
||||
debugmem_addsegs(ctx, trap_get_areg(ctx, 0), trap_get_areg(ctx, 1), trap_get_dreg(ctx, 2), true);
|
||||
#endif
|
||||
return 1;
|
||||
} else if (mode == 203) {
|
||||
// a0 = seglist
|
||||
#ifdef DEBUGGER
|
||||
debugmem_remsegs(trap_get_areg(ctx, 0));
|
||||
#endif
|
||||
return 1;
|
||||
} else if (mode == 204 || mode == 206) {
|
||||
// d0 = size, a1 = flags
|
||||
#ifdef DEBUGGER
|
||||
uae_u32 v = debugmem_allocmem(mode == 206, trap_get_dreg(ctx, 0), trap_get_areg(ctx, 1), trap_get_areg(ctx, 0));
|
||||
if (v) {
|
||||
trap_set_areg(ctx, 0, v);
|
||||
@ -9196,8 +9207,11 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *ctx)
|
||||
trap_set_dreg(ctx, 1, trap_get_areg(ctx, 1));
|
||||
return trap_get_dreg(ctx, 0);
|
||||
}
|
||||
#endif
|
||||
} else if (mode == 205 || mode == 207) {
|
||||
#ifdef DEBUGGER
|
||||
return debugmem_freemem(mode == 207, trap_get_areg(ctx, 1), trap_get_dreg(ctx, 0), trap_get_areg(ctx, 0));
|
||||
#endif
|
||||
} else if (mode == 208) {
|
||||
// segtrack: bit 0
|
||||
// fsdebug: bit 1
|
||||
@ -9208,18 +9222,25 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *ctx)
|
||||
return 0;
|
||||
} else if (mode == 210) {
|
||||
// debug trapcode
|
||||
#ifdef DEBUGGER
|
||||
debugmem_trap(trap_get_areg(ctx, 0));
|
||||
#endif
|
||||
} else if (mode == 212) {
|
||||
// a0 = seglist, a1 = name, d2 = lock
|
||||
#ifdef DEBUGGER
|
||||
debugmem_addsegs(ctx, trap_get_areg(ctx, 0), trap_get_areg(ctx, 1), trap_get_dreg(ctx, 2), false);
|
||||
#endif
|
||||
return 1;
|
||||
} else if (mode == 213) {
|
||||
// a0 = seglist
|
||||
#ifdef DEBUGGER
|
||||
debugmem_remsegs(trap_get_areg(ctx, 0));
|
||||
#endif
|
||||
return 1;
|
||||
} else if (mode == 299) {
|
||||
#ifdef DEBUGGER
|
||||
return debugmem_exit();
|
||||
|
||||
#endif
|
||||
} else {
|
||||
write_log (_T("Unknown mousehack hook %d\n"), mode);
|
||||
}
|
||||
|
||||
6
fpp.cpp
6
fpp.cpp
@ -41,7 +41,9 @@
|
||||
extern void cputester_fault(void);
|
||||
#endif
|
||||
|
||||
#ifdef WITH_SOFTFLOAT
|
||||
#include "softfloat/softfloat.h"
|
||||
#endif
|
||||
|
||||
// global variable for JIT FPU
|
||||
#ifdef USE_LONG_DOUBLE
|
||||
@ -3638,7 +3640,9 @@ void fpu_modechange(void)
|
||||
fpp_from_exten_fmovem(®s.fp[i], &temp_ext[i][0], &temp_ext[i][1], &temp_ext[i][2]);
|
||||
}
|
||||
if (currprefs.fpu_mode > 0) {
|
||||
#ifdef WITH_SOFTFLOAT
|
||||
fp_init_softfloat(currprefs.fpu_model);
|
||||
#endif
|
||||
#ifdef MSVC_LONG_DOUBLE
|
||||
use_long_double = false;
|
||||
} else if (currprefs.fpu_mode < 0) {
|
||||
@ -3680,7 +3684,9 @@ void fpu_reset (void)
|
||||
#ifndef CPU_TESTER
|
||||
currprefs.fpu_mode = changed_prefs.fpu_mode;
|
||||
if (currprefs.fpu_mode > 0) {
|
||||
#ifdef WITH_SOFTFLOAT
|
||||
fp_init_softfloat(currprefs.fpu_model);
|
||||
#endif
|
||||
#ifdef MSVC_LONG_DOUBLE
|
||||
use_long_double = false;
|
||||
} else if (currprefs.fpu_mode < 0) {
|
||||
|
||||
@ -66,7 +66,9 @@ static const double twoto32 = 4294967296.0;
|
||||
#define FPCR_PRECISION_DOUBLE 0x00000080
|
||||
#define FPCR_PRECISION_EXTENDED 0x00000000
|
||||
|
||||
#ifdef SOFTFLOAT_CONVERSIONS
|
||||
static struct float_status fs;
|
||||
#endif
|
||||
static uae_u32 fpu_mode_control = 0;
|
||||
static int fpu_prec;
|
||||
static int temp_prec;
|
||||
@ -1277,9 +1279,10 @@ static void fp_to_pack (fpdata *fpd, uae_u32 *wrd, int dummy)
|
||||
|
||||
void fp_init_native(void)
|
||||
{
|
||||
#ifdef SOFTFLOAT_CONVERSIONS
|
||||
set_floatx80_rounding_precision(80, &fs);
|
||||
set_float_rounding_mode(float_round_to_zero, &fs);
|
||||
|
||||
#endif
|
||||
fpp_print = fp_print;
|
||||
fpp_unset_snan = fp_unset_snan;
|
||||
|
||||
@ -1370,6 +1373,7 @@ void fp_init_native(void)
|
||||
|
||||
double softfloat_tan(double v)
|
||||
{
|
||||
#if SOFTFLOAT_CONVERSIONS
|
||||
struct float_status f = { 0 };
|
||||
uae_u32 w1, w2;
|
||||
fpdata fpd = { 0 };
|
||||
@ -1383,4 +1387,7 @@ double softfloat_tan(double v)
|
||||
float64 f64 = floatx80_to_float64(fv, &fs);
|
||||
fp_to_double(&fpd, f64 >> 32, (uae_u32)f64);
|
||||
return fpd.fp;
|
||||
#else
|
||||
return tanl(v);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -629,6 +629,7 @@ static bool isdataflyerscsiplus(uaecptr addr, uae_u32 *v, int size)
|
||||
|
||||
static bool isa4000t (uaecptr *paddr)
|
||||
{
|
||||
#ifdef NCR
|
||||
if (!is_a4000t_scsi())
|
||||
return false;
|
||||
uaecptr addr = *paddr;
|
||||
@ -637,6 +638,9 @@ static bool isa4000t (uaecptr *paddr)
|
||||
addr &= 0xff;
|
||||
*paddr = addr;
|
||||
return true;
|
||||
#else
|
||||
return false;
|
||||
#endif
|
||||
}
|
||||
|
||||
static uae_u32 REGPARAM2 gayle_lget (uaecptr addr)
|
||||
@ -734,6 +738,7 @@ static void REGPARAM2 gayle_lput (uaecptr addr, uae_u32 value)
|
||||
return;
|
||||
}
|
||||
if (isa4000t(&addr)) {
|
||||
#ifdef NCR
|
||||
if (addr >= NCR_ALT_OFFSET) {
|
||||
addr &= NCR_MASK;
|
||||
ncr710_io_bput_a4000t(addr + 3, value >> 0);
|
||||
@ -747,6 +752,7 @@ static void REGPARAM2 gayle_lput (uaecptr addr, uae_u32 value)
|
||||
ncr710_io_bput_a4000t(addr + 1, value >> 16);
|
||||
ncr710_io_bput_a4000t(addr + 0, value >> 24);
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
ide_reg = get_gayle_ide_reg (addr, &ide);
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
*
|
||||
* Copyright 2001-2016 Toni Wilen
|
||||
*
|
||||
* new fetures:
|
||||
* new features:
|
||||
* - very configurable (and very complex to configure :)
|
||||
* - supports multiple native input devices (joysticks and mice)
|
||||
* - supports mapping joystick/mouse buttons to keys and vice versa
|
||||
@ -4126,7 +4126,9 @@ static bool inputdevice_handle_inputcode_immediate(int code, int state)
|
||||
switch(code)
|
||||
{
|
||||
case AKS_ENTERDEBUGGER:
|
||||
#ifdef DEBUGGER
|
||||
activate_debugger ();
|
||||
#endif
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
@ -4589,7 +4591,9 @@ static bool inputdevice_handle_inputcode2(int monid, int code, int state, const
|
||||
set_config_changed ();
|
||||
break;
|
||||
case AKS_ENTERDEBUGGER:
|
||||
#ifdef DEBUGGER
|
||||
activate_debugger ();
|
||||
#endif
|
||||
break;
|
||||
case AKS_STATESAVEDIALOG:
|
||||
if (s) {
|
||||
|
||||
18
main.cpp
18
main.cpp
@ -18,7 +18,9 @@
|
||||
#include "events.h"
|
||||
#include "memory.h"
|
||||
#include "custom.h"
|
||||
#ifdef SERIAL_PORT
|
||||
#include "serial.h"
|
||||
#endif
|
||||
#include "newcpu.h"
|
||||
#include "disk.h"
|
||||
#include "debug.h"
|
||||
@ -41,7 +43,9 @@
|
||||
#include "cpuboard.h"
|
||||
#include "uae/ppc.h"
|
||||
#include "devices.h"
|
||||
#ifdef JIT
|
||||
#include "jit/compemu.h"
|
||||
#endif
|
||||
#ifdef RETROPLATFORM
|
||||
#include "rp.h"
|
||||
#endif
|
||||
@ -332,11 +336,14 @@ void fixup_cpu (struct uae_prefs *p)
|
||||
error_log(_T("Bad value for comptrustnaddr parameter: value must be within 0..2."));
|
||||
p->comptrustnaddr = 1;
|
||||
}
|
||||
#ifdef JIT
|
||||
if (p->cachesize < 0 || p->cachesize > MAX_JIT_CACHE || (p->cachesize > 0 && p->cachesize < MIN_JIT_CACHE)) {
|
||||
error_log(_T("JIT Bad value for cachesize parameter: value must zero or within %d..%d."), MIN_JIT_CACHE, MAX_JIT_CACHE);
|
||||
p->cachesize = 0;
|
||||
}
|
||||
|
||||
#else
|
||||
p->cachesize = 0;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
if (p->cpu_cycle_exact && p->m68k_speed < 0 && currprefs.cpu_model <= 68020)
|
||||
@ -776,10 +783,12 @@ static int default_config;
|
||||
|
||||
void uae_reset (int hardreset, int keyboardreset)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_reset(0);
|
||||
record_dma_reset(0);
|
||||
}
|
||||
#endif
|
||||
currprefs.quitstatefile[0] = changed_prefs.quitstatefile[0] = 0;
|
||||
|
||||
if (quit_program == 0) {
|
||||
@ -794,7 +803,9 @@ void uae_reset (int hardreset, int keyboardreset)
|
||||
|
||||
void uae_quit (void)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
deactivate_debugger ();
|
||||
#endif
|
||||
if (quit_program != -UAE_QUIT)
|
||||
quit_program = -UAE_QUIT;
|
||||
target_quit ();
|
||||
@ -1151,7 +1162,9 @@ static int real_main2 (int argc, TCHAR **argv)
|
||||
logging_init (); /* Yes, we call this twice - the first case handles when the user has loaded
|
||||
a config using the cmd-line. This case handles loads through the GUI. */
|
||||
|
||||
#ifdef JIT
|
||||
compiler_init();
|
||||
#endif
|
||||
#ifdef NATMEM_OFFSET
|
||||
if (!init_shm ()) {
|
||||
if (currprefs.start_gui)
|
||||
@ -1203,10 +1216,11 @@ static int real_main2 (int argc, TCHAR **argv)
|
||||
gui_update ();
|
||||
|
||||
if (graphics_init (true)) {
|
||||
#ifdef DEBUGGER
|
||||
setup_brkhandler ();
|
||||
if (currprefs.start_debugger && debuggable ())
|
||||
activate_debugger ();
|
||||
|
||||
#endif
|
||||
if (!init_audio ()) {
|
||||
if (sound_available && currprefs.produce_sound > 1) {
|
||||
write_log (_T("Sound driver unavailable: Sound output disabled\n"));
|
||||
|
||||
50
memory.cpp
50
memory.cpp
@ -139,11 +139,17 @@ __inline__ void byteput (uaecptr addr, uae_u32 b)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DEBUGGER
|
||||
extern bool debugmem_initialized;
|
||||
#endif
|
||||
|
||||
bool real_address_allowed(void)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
return debugmem_initialized == false;
|
||||
#else
|
||||
return true;
|
||||
#endif
|
||||
}
|
||||
|
||||
int addr_valid (const TCHAR *txt, uaecptr addr, uae_u32 len)
|
||||
@ -241,10 +247,12 @@ static void dummylog(int rw, uaecptr addr, int size, uae_u32 val, int ins)
|
||||
return;
|
||||
if (addr >= 0x07f7fff0 && addr <= 0x07ffffff)
|
||||
return;
|
||||
#ifdef DEBUGGER
|
||||
if (debugmem_extinvalidmem(addr, val, rw ? (1 << size) : -(1 << size)))
|
||||
return;
|
||||
if ((illegal_count >= MAX_ILG && MAX_ILG > 0) && !memwatch_access_validator)
|
||||
return;
|
||||
#endif
|
||||
if (MAX_ILG >= 0)
|
||||
illegal_count++;
|
||||
if (ins) {
|
||||
@ -561,7 +569,9 @@ static uae_u8 *REGPARAM3 chipmem_xlate (uaecptr addr) REGPARAM;
|
||||
|
||||
static void ce2_timeout (void)
|
||||
{
|
||||
#ifdef CPUEMU_13
|
||||
wait_cpu_cycle_read (0, -1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr)
|
||||
@ -819,38 +829,50 @@ STATIC_INLINE uae_u8* REGPARAM2 chipmem_xlate_bigmem (uaecptr addr)
|
||||
|
||||
STATIC_INLINE void REGPARAM2 chipmem_lput_debugmem(uaecptr addr, uae_u32 v)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
debugmem_chiphit(addr, v, 4);
|
||||
#endif
|
||||
put_long(addr, v);
|
||||
}
|
||||
STATIC_INLINE void REGPARAM2 chipmem_wput_debugmem(uaecptr addr, uae_u32 v)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
debugmem_chiphit(addr, v, 2);
|
||||
#endif
|
||||
put_word(addr, v);
|
||||
}
|
||||
STATIC_INLINE void REGPARAM2 chipmem_bput_debugmem(uaecptr addr, uae_u32 v)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
debugmem_chiphit(addr, v, 1);
|
||||
#endif
|
||||
put_byte(addr, v);
|
||||
}
|
||||
STATIC_INLINE uae_u32 REGPARAM2 chipmem_lget_debugmem(uaecptr addr)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
return debugmem_chiphit(addr, 0, -4);
|
||||
#endif
|
||||
return get_long(addr);
|
||||
}
|
||||
STATIC_INLINE uae_u32 REGPARAM2 chipmem_wget_debugmem(uaecptr addr)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
return debugmem_chiphit(addr, 0, -2);
|
||||
#endif
|
||||
return get_word(addr);
|
||||
}
|
||||
STATIC_INLINE uae_u32 REGPARAM2 chipmem_bget_debugmem(uaecptr addr)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (addr < debugmem_chiplimit)
|
||||
return debugmem_chiphit(addr, 0, -1);
|
||||
#endif
|
||||
return get_byte(addr);
|
||||
}
|
||||
STATIC_INLINE int REGPARAM2 chipmem_check_debugmem(uaecptr addr, uae_u32 size)
|
||||
@ -873,7 +895,11 @@ uae_u8 *(REGPARAM2 *chipmem_xlate_indirect)(uaecptr);
|
||||
|
||||
void chipmem_setindirect(void)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (debugmem_bank.baseaddr && debugmem_chiplimit) {
|
||||
#else
|
||||
if (debugmem_bank.baseaddr && 0) {
|
||||
#endif
|
||||
chipmem_lget_indirect = chipmem_lget_debugmem;
|
||||
chipmem_wget_indirect = chipmem_wget_debugmem;
|
||||
chipmem_bget_indirect = chipmem_bget_debugmem;
|
||||
@ -1174,10 +1200,12 @@ uae_u8 *REGPARAM2 default_xlate (uaecptr addr)
|
||||
uaecptr a2 = addr - 32;
|
||||
uaecptr a3 = m68k_getpc () - 32;
|
||||
write_log (_T("Your Amiga program just did something terribly stupid %08X PC=%08X\n"), addr, M68K_GETPC);
|
||||
#ifdef DEBUGGER
|
||||
if (debugging || DEBUG_STUPID) {
|
||||
activate_debugger ();
|
||||
m68k_dumpstate(NULL, 0xffffffff);
|
||||
}
|
||||
#endif
|
||||
for (i = 0; i < 10; i++) {
|
||||
write_log (_T("%08X "), i >= 5 ? a3 : a2);
|
||||
for (j = 0; j < 16; j += 2) {
|
||||
@ -1187,7 +1215,9 @@ uae_u8 *REGPARAM2 default_xlate (uaecptr addr)
|
||||
write_log (_T("\n"));
|
||||
}
|
||||
memory_map_dump();
|
||||
#ifdef DEBUGGER
|
||||
m68k_dumpstate(NULL, 0xffffffff);
|
||||
#endif
|
||||
}
|
||||
if (0 || (gary_toenb && (gary_nonrange(addr) || (size > 1 && gary_nonrange(addr + size - 1))))) {
|
||||
hardware_exception2(addr, 0, true, true, size);
|
||||
@ -2544,12 +2574,12 @@ void map_overlay (int chip)
|
||||
if (bogomem_aliasing)
|
||||
size = 8;
|
||||
cb = &chipmem_bank;
|
||||
#ifdef AGA
|
||||
#if 0
|
||||
#ifdef AGA
|
||||
#if 0
|
||||
if (currprefs.cpu_cycle_exact && currprefs.cpu_model >= 68020)
|
||||
cb = &chipmem_bank_ce2;
|
||||
#endif
|
||||
#endif
|
||||
cb = &chipmem_bank_ce2;
|
||||
#endif
|
||||
#endif
|
||||
if (chip) {
|
||||
map_banks(&dummy_bank, 0, size, 0);
|
||||
if (!isdirectjit()) {
|
||||
@ -2794,7 +2824,9 @@ void memory_reset (void)
|
||||
alg_flag = 0;
|
||||
need_hardreset = false;
|
||||
rom_write_enabled = true;
|
||||
#ifdef JIT
|
||||
jit_n_addr_unsafe = 0;
|
||||
#endif
|
||||
/* Use changed_prefs, as m68k_reset is called later. */
|
||||
if (last_address_space_24 != changed_prefs.address_space_24)
|
||||
need_hardreset = true;
|
||||
@ -3264,8 +3296,10 @@ static void map_banks2 (addrbank *bank, int start, int size, int realsize, int q
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (quick <= 0)
|
||||
old = debug_bankchange (-1);
|
||||
#endif
|
||||
flush_icache(3); /* Sure don't want to keep any old mappings around! */
|
||||
#ifdef NATMEM_OFFSET
|
||||
if (!quick)
|
||||
@ -3303,8 +3337,10 @@ static void map_banks2 (addrbank *bank, int start, int size, int realsize, int q
|
||||
#endif
|
||||
real_left--;
|
||||
}
|
||||
#ifdef DEBUGGER
|
||||
if (quick <= 0)
|
||||
debug_bankchange (old);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
@ -3336,8 +3372,10 @@ static void map_banks2 (addrbank *bank, int start, int size, int realsize, int q
|
||||
real_left--;
|
||||
}
|
||||
}
|
||||
#ifdef DEBUGGER
|
||||
if (quick <= 0)
|
||||
debug_bankchange (old);
|
||||
#endif
|
||||
fill_ce_banks ();
|
||||
}
|
||||
|
||||
@ -3387,9 +3425,11 @@ void map_banks (addrbank *bank, int start, int size, int realsize)
|
||||
if (start == 0xffffffff)
|
||||
return;
|
||||
|
||||
#ifdef JIT
|
||||
if ((bank->jit_read_flag | bank->jit_write_flag) & S_N_ADDR) {
|
||||
jit_n_addr_unsafe = 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (start >= 0x100) {
|
||||
int real_left = 0;
|
||||
|
||||
@ -40,7 +40,7 @@ void native2amiga_reset (void)
|
||||
p->rdp = p->wrp = 0;
|
||||
p->reader_waiting = 0;
|
||||
p->writer_waiting = 0;
|
||||
};
|
||||
}
|
||||
|
||||
/*
|
||||
* to be called when the Amiga boots, i.e. by filesys_diagentry()
|
||||
|
||||
85
newcpu.cpp
85
newcpu.cpp
@ -1511,11 +1511,13 @@ static void invalidate_cpu_data_caches(void)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
static void flush_cpu_cache_debug(uaecptr addr, int size)
|
||||
{
|
||||
debugmem_flushcache(0, -1);
|
||||
debug_smc_clear(0, -1);
|
||||
}
|
||||
#endif
|
||||
|
||||
void flush_cpu_caches(bool force)
|
||||
{
|
||||
@ -1526,12 +1528,16 @@ void flush_cpu_caches(bool force)
|
||||
for (int i = 0; i < CACHELINES020; i++)
|
||||
caches020[i].valid = 0;
|
||||
regs.cacr &= ~0x08;
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(0, -1);
|
||||
#endif
|
||||
}
|
||||
if (regs.cacr & 0x04) { // clear entry in instr cache
|
||||
caches020[(regs.caar >> 2) & (CACHELINES020 - 1)].valid = 0;
|
||||
regs.cacr &= ~0x04;
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(regs.caar, CACHELINES020);
|
||||
#endif
|
||||
}
|
||||
} else if (currprefs.cpu_model == 68030) {
|
||||
if ((regs.cacr & 0x08) || force) { // clear instr cache
|
||||
@ -1544,12 +1550,16 @@ void flush_cpu_caches(bool force)
|
||||
}
|
||||
}
|
||||
regs.cacr &= ~0x08;
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(0, -1);
|
||||
#endif
|
||||
}
|
||||
if (regs.cacr & 0x04) { // clear entry in instr cache
|
||||
icaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
|
||||
regs.cacr &= ~0x04;
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(regs.caar, CACHELINES030);
|
||||
#endif
|
||||
}
|
||||
if ((regs.cacr & 0x800) || force) { // clear data cache
|
||||
if (doflush) {
|
||||
@ -1576,7 +1586,9 @@ void flush_cpu_caches(bool force)
|
||||
icaches040[i].valid[j] = false;
|
||||
}
|
||||
}
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(0, -1);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1686,7 +1698,9 @@ static void flush_cpu_caches_040_2(int cache, int scope, uaecptr addr, bool push
|
||||
tagmask = cacheitag04060mask;
|
||||
index = (addr >> 4) & cacheisets04060mask;
|
||||
c = &icaches040[index];
|
||||
#ifdef DEBUGGER
|
||||
flush_cpu_cache_debug(addr, 16);
|
||||
#endif
|
||||
} else {
|
||||
tagmask = cachedtag04060mask;
|
||||
index = (addr >> 4) & cachedsets04060mask;
|
||||
@ -2846,7 +2860,9 @@ kludge_me_do:
|
||||
return;
|
||||
}
|
||||
m68k_setpc(newpc);
|
||||
#ifdef DEBUGGER
|
||||
branch_stack_push(currpc, currpc);
|
||||
#endif
|
||||
regs.ir = x_get_word(m68k_getpc()); // prefetch 1
|
||||
if (hardware_bus_error) {
|
||||
if (nr == 2 || nr == 3) {
|
||||
@ -3343,7 +3359,9 @@ kludge_me_do:
|
||||
set_special(SPCFLAG_END_COMPILE);
|
||||
}
|
||||
#endif
|
||||
#ifdef DEBUGGER
|
||||
branch_stack_push(currpc, nextpc);
|
||||
#endif
|
||||
regs.ipl_pin = intlev();
|
||||
ipl_fetch_now();
|
||||
fill_prefetch ();
|
||||
@ -3357,9 +3375,11 @@ static void ExceptionX (int nr, uaecptr address, uaecptr oldpc)
|
||||
regs.exception = nr;
|
||||
regs.loop_mode = 0;
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, 0x20000);
|
||||
}
|
||||
#endif
|
||||
if (cpu_tracer) {
|
||||
cputrace.state = nr;
|
||||
}
|
||||
@ -3443,9 +3463,10 @@ static int get_ipl(void)
|
||||
|
||||
static void do_interrupt (int nr)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma)
|
||||
record_dma_event(DMA_EVENT_CPUIRQ, current_hpos (), vpos);
|
||||
|
||||
#endif
|
||||
if (inputrecord_debug & 2) {
|
||||
if (input_record > 0)
|
||||
inprec_recorddebug_cpu (2);
|
||||
@ -3736,10 +3757,12 @@ uae_u32 REGPARAM2 op_illg (uae_u32 opcode)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debugmem_illg(opcode)) {
|
||||
m68k_incpc_normal(2);
|
||||
return 4;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
|
||||
m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
|
||||
@ -4196,9 +4219,13 @@ static void check_uae_int_request(void)
|
||||
irq6 = true;
|
||||
}
|
||||
if (uae_int_requested & 0xff0000) {
|
||||
#ifdef WITH_PPC
|
||||
if (!cpuboard_is_ppcboard_irq()) {
|
||||
#endif
|
||||
atomic_and(&uae_int_requested, ~0x010000);
|
||||
#ifdef WITH_PPC
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
if (irq2 || irq6) {
|
||||
@ -4545,10 +4572,12 @@ static void check_debugger(void)
|
||||
|
||||
static void debug_cpu_stop(void)
|
||||
{
|
||||
#ifdef DEBUGGER
|
||||
record_dma_event(DMA_EVENT_CPUSTOP, current_hpos(), vpos);
|
||||
if (time_for_interrupt()) {
|
||||
record_dma_event(DMA_EVENT_CPUSTOPIPL, current_hpos(), vpos);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static int do_specialties (int cycles)
|
||||
@ -4835,9 +4864,11 @@ static void m68k_run_1 (void)
|
||||
//write_log (_T("%08X-%04X "), pc, r->opcode);
|
||||
}
|
||||
#endif
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
r->instruction_pc = m68k_getpc ();
|
||||
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) & 0xffff;
|
||||
if (!regs.loop_mode)
|
||||
@ -4951,14 +4982,18 @@ static void m68k_run_1_ce (void)
|
||||
inprec_playdebug_cpu (1);
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
r->instruction_pc = m68k_getpc ();
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, r->opcode);
|
||||
}
|
||||
#endif
|
||||
|
||||
(*cpufunctbl_noret[r->opcode])(r->opcode);
|
||||
if (!regs.loop_mode)
|
||||
@ -4972,7 +5007,9 @@ cont:
|
||||
if (cputrace.needendcycles) {
|
||||
cputrace.needendcycles = 0;
|
||||
write_log(_T("STARTCYCLES=%016llx ENDCYCLES=%016llx\n"), cputrace.startcycles, get_cycles());
|
||||
#ifdef DEBUGGER
|
||||
log_dma_record ();
|
||||
#endif
|
||||
}
|
||||
|
||||
if (r->spcflags || regs.ipl[0] > 0) {
|
||||
@ -5536,6 +5573,7 @@ static void opcodedebug (uae_u32 pc, uae_u16 opcode, bool full)
|
||||
fault = 1;
|
||||
} ENDTRY
|
||||
if (!fault) {
|
||||
#ifdef DEBUGGER
|
||||
TCHAR buf[100];
|
||||
if (full)
|
||||
write_log (_T("mmufixup=%d %04x %04x\n"), mmufixup[0].reg, regs.wb3_status, regs.mmu_ssw);
|
||||
@ -5543,6 +5581,7 @@ static void opcodedebug (uae_u32 pc, uae_u16 opcode, bool full)
|
||||
write_log (_T("%s\n"), buf);
|
||||
if (full)
|
||||
m68k_dumpstate(NULL, 0xffffffff);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
@ -5580,8 +5619,10 @@ void cpu_halt(int id)
|
||||
regs.intmask = 7;
|
||||
MakeSR();
|
||||
audio_deactivate();
|
||||
#ifdef DEBUGGER
|
||||
if (debugging)
|
||||
activate_debugger();
|
||||
#endif
|
||||
}
|
||||
}
|
||||
set_special(SPCFLAG_CHECK);
|
||||
@ -5854,11 +5895,11 @@ static void m68k_run_3ce (void)
|
||||
// "prefetch"
|
||||
if (regs.cacr & 0x8000)
|
||||
fill_icache040(r->instruction_pc + 16);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
|
||||
#endif
|
||||
(*cpufunctbl_noret[r->opcode])(r->opcode);
|
||||
|
||||
if (r->spcflags) {
|
||||
@ -5901,10 +5942,11 @@ static void m68k_run_3p(void)
|
||||
// "prefetch"
|
||||
if (regs.cacr & 0x8000)
|
||||
fill_icache040(r->instruction_pc + 16);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
(*cpufunctbl_noret[r->opcode])(r->opcode);
|
||||
|
||||
@ -6040,10 +6082,11 @@ static void m68k_run_2ce (void)
|
||||
else if (input_play > 0)
|
||||
inprec_playdebug_cpu (1);
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
(*cpufunctbl_noret[r->opcode])(r->opcode);
|
||||
|
||||
@ -6167,10 +6210,11 @@ static void m68k_run_2p (void)
|
||||
else if (input_play > 0)
|
||||
inprec_playdebug_cpu (1);
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
if (currprefs.cpu_memory_cycle_exact) {
|
||||
|
||||
@ -6266,10 +6310,11 @@ static void m68k_run_2_000(void)
|
||||
|
||||
r->opcode = x_get_iword(0);
|
||||
count_instr (r->opcode);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) & 0xffff;
|
||||
cpu_cycles = adjust_cycles (cpu_cycles);
|
||||
@ -6311,9 +6356,11 @@ static void m68k_run_2_020(void)
|
||||
r->opcode = x_get_iword(0);
|
||||
count_instr(r->opcode);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_opcode_watch) {
|
||||
debug_trainer_match();
|
||||
}
|
||||
#endif
|
||||
|
||||
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) >> 16;
|
||||
cpu_cycles = adjust_cycles(cpu_cycles);
|
||||
@ -6455,10 +6502,12 @@ void m68k_go (int may_quit)
|
||||
#ifdef SAVESTATE
|
||||
/* We may have been restoring state, but we're done now. */
|
||||
if (isrestore ()) {
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_reset(0);
|
||||
record_dma_reset(0);
|
||||
}
|
||||
#endif
|
||||
restored = savestate_restore_finish ();
|
||||
memory_map_dump ();
|
||||
if (currprefs.mmu_model == 68030) {
|
||||
@ -6491,10 +6540,10 @@ void m68k_go (int may_quit)
|
||||
|
||||
if (changed_prefs.inprecfile[0] && input_record)
|
||||
inprec_prepare_record (savestate_fname[0] ? savestate_fname : NULL);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (changed_prefs.trainerfile[0])
|
||||
debug_init_trainer(changed_prefs.trainerfile);
|
||||
|
||||
#endif
|
||||
set_cpu_tracer (false);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
@ -6601,7 +6650,9 @@ void m68k_disasm_ea (uaecptr addr, uaecptr *nextpc, int cnt, uae_u32 *seaddr, ua
|
||||
buf = xcalloc (TCHAR, (MAX_LINEWIDTH + 1) * pcnt);
|
||||
if (!buf)
|
||||
return;
|
||||
#ifdef DEBUGGER
|
||||
m68k_disasm_2(buf, MAX_LINEWIDTH * pcnt, addr, NULL, 0, nextpc, cnt, seaddr, deaddr, lastpc, 1);
|
||||
#endif
|
||||
xfree (buf);
|
||||
}
|
||||
void m68k_disasm (uaecptr addr, uaecptr *nextpc, uaecptr lastpc, int cnt)
|
||||
@ -6614,7 +6665,9 @@ void m68k_disasm (uaecptr addr, uaecptr *nextpc, uaecptr lastpc, int cnt)
|
||||
buf = xcalloc (TCHAR, (MAX_LINEWIDTH + 1) * pcnt);
|
||||
if (!buf)
|
||||
return;
|
||||
#ifdef DEBUGGER
|
||||
m68k_disasm_2(buf, MAX_LINEWIDTH * pcnt, addr, NULL, 0, nextpc, cnt, NULL, NULL, lastpc, 0);
|
||||
#endif
|
||||
console_out_f (_T("%s"), buf);
|
||||
xfree (buf);
|
||||
}
|
||||
@ -6640,6 +6693,7 @@ void m68k_dumpstate(uaecptr *nextpc, uaecptr prevpc)
|
||||
regs.isp = m68k_areg (regs, 7);
|
||||
j = 2;
|
||||
console_out_f (_T("USP %08X ISP %08X "), regs.usp, regs.isp);
|
||||
#ifdef DEBUGGER
|
||||
for (i = 0; m2cregs[i].regno>= 0; i++) {
|
||||
if (!movec_illg (m2cregs[i].regno)) {
|
||||
if (!_tcscmp (m2cregs[i].regname, _T("USP")) || !_tcscmp (m2cregs[i].regname, _T("ISP")))
|
||||
@ -6650,6 +6704,7 @@ void m68k_dumpstate(uaecptr *nextpc, uaecptr prevpc)
|
||||
j++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
if (j > 0)
|
||||
console_out_f (_T("\n"));
|
||||
console_out_f (_T("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d STP=%d\n"),
|
||||
@ -6689,8 +6744,10 @@ void m68k_dumpstate(uaecptr *nextpc, uaecptr prevpc)
|
||||
}
|
||||
for (int i = 0; i < 3; i++) {
|
||||
uae_u16 w;
|
||||
#ifdef DEBUGGER
|
||||
if (!debug_get_prefetch(i, &w))
|
||||
break;
|
||||
#endif
|
||||
struct instr *dp;
|
||||
struct mnemolookup *lookup;
|
||||
dp = table68k + w;
|
||||
@ -7746,6 +7803,7 @@ void do_cycles_stop(int c)
|
||||
if (!currprefs.cpu_compatible) {
|
||||
do_cycles(c);
|
||||
} else {
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
while (c > 0) {
|
||||
debug_cpu_stop();
|
||||
@ -7753,8 +7811,11 @@ void do_cycles_stop(int c)
|
||||
c -= CYCLE_UNIT;
|
||||
}
|
||||
} else {
|
||||
#endif
|
||||
x_do_cycles(c);
|
||||
#ifdef DEBUGGER
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
@ -8715,6 +8776,7 @@ static void dcache030_maybe_burst(uaecptr addr, struct cache030 *c, int lws)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
static uae_u32 read_dcache030_debug(uaecptr addr, uae_u32 size, uae_u32 fc, bool *cached)
|
||||
{
|
||||
static const uae_u32 mask[3] = { 0x000000ff, 0x0000ffff, 0xffffffff };
|
||||
@ -8768,6 +8830,7 @@ static uae_u32 read_dcache030_debug(uaecptr addr, uae_u32 size, uae_u32 fc, bool
|
||||
out &= mask[size];
|
||||
return out;
|
||||
}
|
||||
#endif
|
||||
|
||||
static bool read_dcache030_2(uaecptr addr, uae_u32 size, uae_u32 *valp)
|
||||
{
|
||||
@ -9454,6 +9517,7 @@ static int dcache040_fill_line(int index, uae_u32 tag, uaecptr addr)
|
||||
return line;
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
static uae_u32 read_dcache040_debug(uae_u32 addr, int size, bool *cached)
|
||||
{
|
||||
int index;
|
||||
@ -9486,6 +9550,7 @@ nocache:
|
||||
return get_word_debug(addr);
|
||||
return get_long_debug(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
static uae_u32 read_dcache040(uae_u32 addr, int size, uae_u32 (*fetch)(uaecptr))
|
||||
{
|
||||
@ -9688,6 +9753,7 @@ uae_u32 next_ilong_cache040(void)
|
||||
return r;
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
uae_u32 get_byte_cache_debug(uaecptr addr, bool *cached)
|
||||
{
|
||||
*cached = false;
|
||||
@ -9719,6 +9785,7 @@ uae_u32 get_long_cache_debug(uaecptr addr, bool *cached)
|
||||
}
|
||||
return get_long_debug(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
void check_t0_trace(void)
|
||||
{
|
||||
|
||||
@ -799,8 +799,10 @@ void restore_state (const TCHAR *filename)
|
||||
#endif
|
||||
else if (!_tcsncmp (name, _T("EXPB"), 4))
|
||||
end = restore_expansion_boards(chunk);
|
||||
#ifdef DEBUGGER
|
||||
else if (!_tcsncmp (name, _T("DMWP"), 4))
|
||||
end = restore_debug_memwatch (chunk);
|
||||
#endif
|
||||
else if (!_tcsncmp(name, _T("PIC0"), 4))
|
||||
end = chunk + len;
|
||||
|
||||
@ -867,7 +869,9 @@ bool savestate_restore_finish(void)
|
||||
#ifdef ACTION_REPLAY
|
||||
restore_ar_finish();
|
||||
#endif
|
||||
#ifdef DEBUGGER
|
||||
restore_debug_memwatch_finish();
|
||||
#endif
|
||||
savestate_state = 0;
|
||||
init_hz_normal();
|
||||
audio_activate();
|
||||
@ -1179,11 +1183,13 @@ static int save_state_internal (struct zfile *f, const TCHAR *description, int c
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
dst = save_debug_memwatch (&len, NULL);
|
||||
if (dst) {
|
||||
save_chunk (f, dst, len, _T("DMWP"), 0);
|
||||
xfree(dst);
|
||||
}
|
||||
#endif
|
||||
|
||||
dst = save_screenshot(0, &len);
|
||||
if (dst) {
|
||||
|
||||
4
scsi.cpp
4
scsi.cpp
@ -5682,6 +5682,8 @@ void overdrive_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romco
|
||||
generic_soft_scsi_add(ch, ci, rc, NCR5380_OVERDRIVE, 65536, 32768, ROMTYPE_OVERDRIVE);
|
||||
}
|
||||
|
||||
#ifdef WITH_X86
|
||||
|
||||
// x86 bridge scsi rancho rt1000
|
||||
void x86_rt1000_bput(int portnum, uae_u8 v)
|
||||
{
|
||||
@ -5735,3 +5737,5 @@ void x86_rt1000_add_unit(int ch, struct uaedev_config_info *ci, struct romconfig
|
||||
{
|
||||
generic_soft_scsi_add(ch, ci, rc, NCR5380_X86_RT1000, 0, 0, ROMTYPE_X86_RT1000);
|
||||
}
|
||||
|
||||
#endif // WITH_X86
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user