From 1551249b90f4efa7c559c3879c1ef2bfa3d95aeb Mon Sep 17 00:00:00 2001
From: Matthew Harlum <matt@harlum.net>
Date: Thu, 18 Apr 2024 16:25:16 +1200
Subject: [PATCH] RTL: Fix bug in ROM Bank select

At reset the rom bank select was set to follow addr[16:15] until IDE was activated by a write to any IDE reg.

After that it reflects the value of the rom_bankSel register

On a new board with no driver yet in flash this switch would not be triggered, causing the driver to be written to the wrong bank of flash.

Now the switch will flip on any write to the boards range, the flash identification step will trigger this.
---
 Binary/RIPPLE.jed | 1392 ++++++++++++++++++++++-----------------------
 RTL/IDE.v         |    4 +-
 RTL/RIPPLE.rpt    |  463 ++++++++-------
 RTL/RIPPLE.tim    |  128 ++---
 4 files changed, 1018 insertions(+), 969 deletions(-)

diff --git a/Binary/RIPPLE.jed b/Binary/RIPPLE.jed
index 30ca491..21c5729 100644
--- a/Binary/RIPPLE.jed
+++ b/Binary/RIPPLE.jed
@@ -1,5 +1,5 @@
 Programmer Jedec Bit Map
-Date Extracted: Sat Mar  2 02:58:54 2024
+Date Extracted: Thu Apr 18 04:18:37 2024
 
 QF46656*
 QP64*
@@ -63,35 +63,35 @@ N PPMAP 11 8*
 N PPMAP 12 9*
 L0000000 00000000 00000000 00000000 00000000*
 L0000032 00000000 00000000 00000000 00000000*
-L0000064 00000000 00100000 00000000 00000000*
-L0000096 00000000 10000000 00100000 00000000*
+L0000064 00000000 00100000 10000000 00000000*
+L0000096 00000000 00000000 00000100 00000000*
 L0000128 00000000 00000000 00000000 00000000*
 L0000160 00000000 00000000 00000000 00000000*
 L0000192 00000000 00000000 00000000 00000000*
-L0000224 00000000 11110000 00000000 00000000*
-L0000256 00000000 00000000 00000000 00000000*
+L0000224 00000000 01110000 00000000 00000000*
+L0000256 00000000 10000000 00000100 00000000*
 L0000288 000000 000000 000000 000000*
-L0000312 000000 000000 000000 000000*
+L0000312 000000 000000 000000 100000*
 L0000336 000000 000000 000000 000000*
 L0000360 000000 111000 000000 000000*
 L0000384 000000 000000 000000 000000*
 L0000408 000000 000000 000000 000000*
 L0000432 00000000 00000000 00000000 00000000*
-L0000464 00000000 00000000 00100000 00000000*
+L0000464 00000000 00000000 00000000 00000000*
 L0000496 00000000 00000000 00000000 00000000*
 L0000528 00000000 00000000 00000000 00000000*
 L0000560 00000000 00000000 00000000 00000000*
-L0000592 00000000 00000000 00000000 00100000*
+L0000592 00000000 00000000 00000000 00000000*
 L0000624 00000000 00000000 00000000 00000000*
 L0000656 00000000 00000000 00000000 00000000*
 L0000688 00000000 00000000 00000000 00000000*
 L0000720 000000 000000 000000 000000*
 L0000744 000000 000000 000000 000000*
-L0000768 000000 000000 000000 000000*
+L0000768 000000 000000 000000 100000*
 L0000792 000000 000000 000000 000000*
 L0000816 000000 000000 000000 000000*
 L0000840 000000 000000 000000 000000*
-L0000864 00000000 00000000 00000000 00000000*
+L0000864 00000000 00010000 00000000 00000000*
 L0000896 00000000 00000000 00000000 00000000*
 L0000928 00000000 00000000 00000000 00000000*
 L0000960 00000000 00000000 00000000 00000000*
@@ -99,7 +99,7 @@ L0000992 00000000 00000000 00000000 00000000*
 L0001024 00000000 00000000 00000000 00000000*
 L0001056 00000000 00000000 00000000 00000000*
 L0001088 00000000 00000000 00000000 00000000*
-L0001120 00000000 10000000 00000000 00000000*
+L0001120 00000000 00010000 00000000 00000000*
 L0001152 000000 000000 000000 000000*
 L0001176 000000 000000 000000 000000*
 L0001200 000000 000000 000000 000000*
@@ -111,45 +111,45 @@ L0001328 00000000 00000000 00000000 00000000*
 L0001360 00000000 00000000 00000000 00000000*
 L0001392 00000000 00000000 00000000 00000000*
 L0001424 00000000 00000000 00000000 00000000*
-L0001456 00000000 00000000 00000000 00000000*
-L0001488 00000000 00000000 00000000 00000000*
+L0001456 00000000 00000000 00000000 00100000*
+L0001488 00000000 00010000 00000000 00000000*
 L0001520 00000000 00000000 00000000 00000000*
 L0001552 00000000 00000000 00000000 00000000*
-L0001584 000000 000000 000000 000000*
-L0001608 000000 000000 100000 000000*
+L0001584 000000 000100 000000 000000*
+L0001608 000000 000000 000000 000000*
 L0001632 000000 000000 000000 000000*
 L0001656 000000 000000 000000 000000*
 L0001680 000000 000000 000000 000000*
 L0001704 000000 000000 000000 000000*
 L0001728 00000000 00000000 00000000 00000000*
-L0001760 00000000 00000000 00100000 00000000*
+L0001760 00000000 00000000 00000000 00000000*
 L0001792 00000000 00000000 00000000 00000000*
-L0001824 00000000 00000000 00100000 00000000*
+L0001824 00000000 00000000 00000000 00000000*
 L0001856 00000000 00000000 00000000 00000000*
 L0001888 00000000 00000000 00000000 00000000*
-L0001920 00000000 01000000 01000000 00000000*
-L0001952 00000000 00000000 00000000 00000000*
-L0001984 00000000 01000000 00000000 00000000*
+L0001920 00000000 00000000 00001000 00000000*
+L0001952 00000000 00000000 00001000 00000000*
+L0001984 00000000 00000000 00000000 00000000*
 L0002016 000000 000000 000000 000000*
 L0002040 000000 000000 000000 000000*
 L0002064 000000 000000 000000 000000*
 L0002088 000000 000000 000000 000000*
 L0002112 000000 000000 000000 000000*
 L0002136 000000 000000 000000 000000*
-L0002160 00000000 00000000 00000000 00000000*
+L0002160 00000000 00000000 00010000 00000000*
 L0002192 00000000 00000000 00000000 00000000*
 L0002224 00000000 00000000 00000000 00000000*
-L0002256 00000000 00000000 00000000 00111100*
-L0002288 00000000 00000000 00000000 00000100*
+L0002256 00000000 01100000 00000000 10011100*
+L0002288 00000000 00000000 00000000 10000000*
 L0002320 00000000 00000000 00000000 00000000*
-L0002352 00000000 00000000 00000000 10000100*
-L0002384 00000000 00000000 00000000 00000000*
-L0002416 00000000 00000000 00000000 00000100*
+L0002352 00000000 00000000 00000000 00000100*
+L0002384 00000000 00000000 00000000 10000000*
+L0002416 00000000 01100000 00000000 00000100*
 L0002448 000000 000000 000000 000000*
 L0002472 000000 000000 000000 000000*
-L0002496 000000 000000 000000 000110*
+L0002496 000000 100000 000000 000110*
 L0002520 000000 000000 000000 000000*
-L0002544 000000 000000 000000 000110*
+L0002544 000000 110000 000000 001111*
 L0002568 000000 000000 000000 000000*
 L0002592 00000010 00000000 00000000 00000000*
 L0002624 00000010 00000000 00000000 00000000*
@@ -167,14 +167,14 @@ L0002952 000000 000000 000000 000000*
 L0002976 000000 000000 000000 000000*
 L0003000 000000 000000 000000 000000*
 L0003024 00000010 00000000 00000000 00000000*
-L0003056 00000010 00000000 00100000 00011000*
+L0003056 00000010 00000000 00000000 00010100*
 L0003088 00000000 00000000 00000000 00000000*
-L0003120 00000000 00000000 00100000 00000000*
+L0003120 00000000 00000000 00000000 00000000*
 L0003152 00000010 00000000 00000000 00000000*
 L0003184 00000010 00000000 00000000 00000000*
-L0003216 00000000 01000000 01000000 00000000*
+L0003216 00000000 00000000 00000000 00000000*
 L0003248 00000000 00000000 00000000 00000000*
-L0003280 00000000 01000000 00000000 00000000*
+L0003280 00000000 00000000 00000000 00000000*
 L0003312 000000 000000 000000 000000*
 L0003336 000000 000000 000000 000000*
 L0003360 000000 000000 000000 000000*
@@ -185,54 +185,54 @@ L0003456 00000000 00000000 00000000 00000000*
 L0003488 00000000 00000000 00000000 00000000*
 L0003520 00000000 00000000 00000000 00000000*
 L0003552 00000000 00000000 00000000 00000000*
-L0003584 00000000 00000000 00010000 00000000*
-L0003616 00000000 00000000 00000000 00000000*
-L0003648 00000000 01000000 00000000 00000000*
+L0003584 00000000 00000000 00100000 00000000*
+L0003616 00000000 00000000 00000000 10000000*
+L0003648 00000000 00000000 00000000 10000000*
 L0003680 00000000 00000000 00000000 00000000*
-L0003712 00000000 00000000 10000000 00000000*
-L0003744 000000 000000 000000 000000*
-L0003768 000000 000000 000000 100000*
+L0003712 00000000 01000000 00000000 00000000*
+L0003744 000000 000000 100000 000000*
+L0003768 000000 000000 000000 000000*
 L0003792 000000 000000 000000 000000*
 L0003816 000000 000000 000000 000000*
 L0003840 000000 000000 000000 000000*
 L0003864 000000 000000 000100 000000*
 L0003888 00000000 00000000 00000000 00000000*
 L0003920 00000000 00000000 00000000 00000000*
-L0003952 00000000 00000000 00000100 00000000*
-L0003984 00000000 00000000 00010000 00000000*
+L0003952 00000000 00000000 00000000 00000000*
+L0003984 00000000 00000000 00100000 00000000*
 L0004016 00000000 00000000 00000000 00000000*
 L0004048 00000000 00000000 00000000 00000000*
 L0004080 00000000 00000000 00000000 00000000*
 L0004112 00000000 00000000 00000000 00000000*
-L0004144 00000000 01000000 00000000 00000000*
+L0004144 00000000 00000000 10000000 00000000*
 L0004176 000000 000000 000000 000000*
 L0004200 000000 000000 000000 000000*
-L0004224 000000 000000 000000 100000*
+L0004224 000000 000000 000000 000000*
 L0004248 000000 000000 000000 000000*
 L0004272 000000 000000 000100 000000*
 L0004296 000000 000000 000000 000000*
 L0004320 00000000 00000000 00000000 00000000*
 L0004352 00000000 00000000 00000000 00000000*
 L0004384 00000000 00000000 00000000 00000000*
-L0004416 00000000 00000000 00000000 00000000*
-L0004448 00000000 00000000 00000000 00000000*
-L0004480 00000000 00000000 00001000 00000000*
+L0004416 00000000 00000000 01000000 00000000*
+L0004448 00000000 00000000 00001000 00000000*
+L0004480 00000000 00000000 00000000 00000000*
 L0004512 00000000 00000000 00000000 00000000*
 L0004544 00000000 00000000 00000000 00000000*
 L0004576 00000000 00000000 00100000 00000000*
-L0004608 000000 000000 000001 000000*
+L0004608 000000 000000 000000 000000*
 L0004632 000000 000000 000000 000000*
 L0004656 000000 000000 000000 000000*
 L0004680 000000 000000 000000 000000*
-L0004704 000000 000000 000000 000000*
+L0004704 000000 000000 100000 000000*
 L0004728 000000 000000 000000 000000*
 L0004752 00000000 00000000 00000000 00000000*
 L0004784 00000000 00000000 00000000 00000000*
 L0004816 00000000 00000000 00000000 00000000*
 L0004848 00000000 00000000 00000000 00000000*
-L0004880 00000000 00000000 10000000 00000000*
-L0004912 00000000 00000000 00000000 00000000*
-L0004944 00000000 00000000 00001000 00000000*
+L0004880 00000000 00000000 01000000 00000000*
+L0004912 00000000 00000000 00001000 00000000*
+L0004944 00000000 00000000 00000000 00000000*
 L0004976 00000000 00000000 00000000 00000000*
 L0005008 00000000 00000000 00000000 00000000*
 L0005040 000000 000000 001000 000000*
@@ -240,226 +240,226 @@ L0005064 000000 000000 000000 000000*
 L0005088 000000 000000 000000 000000*
 L0005112 000000 000000 000000 000000*
 L0005136 000000 000000 000000 000000*
-L0005160 000000 000000 000000 000000*
-L0005184 00000000 00000010 00000000 00000011*
-L0005216 00000000 00000011 00000011 00000111*
-L0005248 00000000 00000010 10000010 00000011*
-L0005280 00000000 00100010 00001010 00111111*
-L0005312 00000000 00000010 00000010 00000111*
+L0005160 000000 000000 100000 000000*
+L0005184 00000000 00000010 00000011 00000011*
+L0005216 00000000 00000011 00100001 10100011*
+L0005248 00000000 00000010 00000000 00000011*
+L0005280 00000000 00000010 00000000 10011111*
+L0005312 00000000 00000010 00010010 10000011*
 L0005344 00000000 00000010 00000001 11100011*
-L0005376 00000000 00000010 00100011 10000011*
-L0005408 00000000 00000010 00000000 00000011*
-L0005440 00000001 00110010 00000011 00000110*
+L0005376 00000001 00000010 10000001 10000011*
+L0005408 00000001 00000010 00000001 10000011*
+L0005440 00000001 00000010 00000000 00000111*
 L0005472 000000 000000 000000 000000*
 L0005496 000000 000000 000000 000000*
-L0005520 000000 000000 000000 001000*
-L0005544 000000 000000 000000 000000*
-L0005568 000000 011000 000000 000110*
+L0005520 000000 000000 000000 000000*
+L0005544 000000 000000 010000 000000*
+L0005568 000000 000000 000000 001111*
 L0005592 000000 000000 000000 000000*
-L0005616 00000000 00000010 00000011 00000011*
-L0005648 00000000 00000011 00000000 00000000*
-L0005680 00000000 00000010 00000011 00000001*
-L0005712 00000000 00000000 10000011 00000001*
-L0005744 00000000 00000010 00001011 00000000*
-L0005776 00000000 00000010 00000000 00000001*
+L0005616 00000000 00000011 00000010 00000011*
+L0005648 00000000 01000011 00000010 00000000*
+L0005680 00000000 01000010 00100011 00000001*
+L0005712 00000000 01000000 00000011 00000001*
+L0005744 00000000 00000010 00000001 00000000*
+L0005776 00000000 00000010 00000010 00000001*
 L0005808 00000000 00000010 00000011 00000011*
-L0005840 00000000 00000010 00100011 00000001*
-L0005872 00000000 00000010 00000000 00000011*
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+L0005872 00000001 00000010 00000011 00000011*
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-L0006000 000000 000000 000000 000000*
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+L0006000 000000 000000 010000 000000*
 L0006024 000000 000000 000000 000000*
-L0006048 00000000 00000010 00000000 00000011*
-L0006080 00000000 00000001 00000001 00000010*
-L0006112 00000000 01000010 00000010 00000011*
-L0006144 00000000 00100010 00000010 00111001*
-L0006176 00000000 00000010 00000010 00000000*
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 L0006208 00000000 00000010 00000000 00000001*
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-L0006272 00000000 00000010 00000100 00011001*
-L0006304 00000000 10110010 00000011 00010010*
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+L0006304 00000001 01100010 00010000 00010010*
 L0006336 000000 000000 000000 000001*
-L0006360 000000 000000 000000 000001*
-L0006384 000000 100000 000100 000001*
-L0006408 000000 000000 000000 000001*
-L0006432 000000 111000 001000 000000*
-L0006456 000000 000000 000000 000110*
-L0006480 00000000 00000000 00000011 00000000*
-L0006512 00000000 00000010 00000010 00000001*
-L0006544 00000000 00000010 00000001 00000001*
-L0006576 00000000 00000000 00000001 00000000*
+L0006360 000000 000000 010000 000000*
+L0006384 000000 100000 000000 000001*
+L0006408 000000 000000 000000 000000*
+L0006432 000000 110000 000001 001001*
+L0006456 000000 000000 000000 000111*
+L0006480 00000000 00000000 00100000 00000000*
+L0006512 00000000 00000000 00000010 00000001*
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+L0006576 00000000 00000000 00000011 00000000*
 L0006608 00000000 00000000 00000001 00000001*
-L0006640 00000000 00000000 00000000 00000001*
-L0006672 00000000 00000000 00000000 00000000*
-L0006704 00000000 00000000 00000011 00000001*
-L0006736 00000000 00000000 00000100 00000001*
-L0006768 000000 000000 000000 000000*
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 L0006792 000000 000000 000000 000000*
-L0006816 000000 000000 000000 000000*
-L0006840 000000 000000 000100 000000*
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 L0006864 000000 000000 000000 000000*
-L0006888 000000 000000 001000 000000*
-L0006912 00000000 00000000 00000000 00000001*
-L0006944 00000000 00000011 00000001 00000000*
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 L0006976 00000000 00000010 00000000 00000001*
-L0007008 00000000 01100010 00000000 00000001*
-L0007040 00000000 01000010 00000010 00000000*
-L0007072 00000000 00000010 00000100 10000001*
-L0007104 00000000 10000010 00000010 00000011*
-L0007136 00000000 00000010 00000000 00000001*
-L0007168 00000000 10110010 00010011 00000000*
-L0007200 000000 000000 000000 000000*
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 L0007224 000000 000000 000000 000000*
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-L0007296 000000 011000 000000 000000*
-L0007320 000000 100000 000000 000000*
-L0007344 00000000 00000000 00000011 00000001*
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-L0007408 00000000 00000010 00000001 00000001*
-L0007440 00000000 00000000 00000001 00000001*
-L0007472 00000000 00000010 00000011 00000001*
-L0007504 00000000 00000010 00100000 00000001*
-L0007536 00000000 00000010 00000111 00000011*
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 L0007680 000000 000000 000000 000000*
 L0007704 000000 000000 000000 000000*
 L0007728 000000 000000 000000 000000*
 L0007752 000000 000000 000000 000000*
-L0007776 00000000 00000010 00000000 00000001*
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-L0007840 00000000 00000010 00000110 00000001*
-L0007872 00000000 01100000 00010010 00000001*
-L0007904 00000000 00000010 00000000 00000000*
-L0007936 00000000 00000010 00000000 00000001*
-L0007968 00000000 10000010 00000011 00000011*
-L0008000 00000000 00000010 00000000 00000001*
-L0008032 00000000 10110010 00000011 00000010*
-L0008064 000000 000000 000000 000000*
-L0008088 000000 000000 000000 000000*
+L0007840 00000000 01000010 00000000 00000001*
+L0007872 00000000 00000010 00100000 00000001*
+L0007904 00000000 00000010 00000010 00000000*
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-L0008496 000000 000000 000000 000000*
-L0008520 000001 000000 000000 000000*
-L0008544 000000 000000 000000 000000*
+L0008464 00000001 00010000 00000011 00000011*
+L0008496 000000 000000 100000 000000*
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-L0008592 000000 000000 000000 000000*
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 L0008616 000000 000000 000100 000000*
-L0008640 00000000 00000000 00000000 00000000*
-L0008672 00000000 00000000 00001011 00000000*
-L0008704 00000000 00000010 00010000 00000001*
-L0008736 00000000 00100000 00000000 00000000*
-L0008768 00000000 00000000 00000000 00000000*
-L0008800 00000000 00000000 00000000 00011001*
-L0008832 00000000 10000000 10000000 00000001*
-L0008864 00000000 00000000 00000000 00000001*
-L0008896 00000001 00110000 00000011 00000000*
-L0008928 000000 000000 000000 000000*
+L0008640 00000000 00000000 00000010 00000010*
+L0008672 00000000 00000001 00000001 00000000*
+L0008704 00000000 00000010 00000000 00000001*
+L0008736 00000000 00000000 00000000 00000000*
+L0008768 00000000 00000000 00000010 00000000*
+L0008800 00000000 00000000 00000000 00000001*
+L0008832 00000001 00010000 00000000 00000000*
+L0008864 00000001 00000000 00000000 00000001*
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 L0009000 000000 000000 000000 000000*
-L0009024 000000 011000 000000 000000*
-L0009048 000000 100000 000000 000000*
-L0009072 00000000 00000000 00000011 01000000*
-L0009104 00000000 00000000 00000010 00000000*
-L0009136 00000000 00000000 00001001 00000000*
-L0009168 00000000 01000010 00000001 00000000*
-L0009200 00000000 01000000 00100000 00000000*
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 L0009232 00000000 00000000 00000000 00000000*
-L0009264 00000000 00000000 00000010 00000000*
-L0009296 00000000 00000000 10000011 00000000*
-L0009328 00000001 10000000 00000000 00000000*
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-L0009384 000000 000000 000000 010000*
-L0009408 000000 000000 000000 000000*
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+L0009408 000000 000000 000000 100000*
 L0009432 000000 000000 000000 000000*
 L0009456 000000 000000 000000 000000*
 L0009480 000000 000000 000000 000000*
-L0009504 00000000 00000010 00000000 00000000*
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 L0009536 00000000 00000010 00000000 00000011*
 L0009568 00000000 00000010 00000000 00000001*
 L0009600 00000000 00000010 00000000 00000010*
-L0009632 00000000 00000000 00000000 00000011*
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 L0009664 00000000 00000000 00000000 00000011*
-L0009696 00000000 00000000 00000000 00000010*
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 L0009728 00000000 00000000 00000000 00010011*
-L0009760 00000001 00000000 00000000 00010010*
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 L0009888 000000 000000 000000 000000*
-L0009912 000000 000000 000000 000010*
-L0009936 00000000 00000000 00000000 00000000*
-L0009968 00000000 00000000 00000000 00000000*
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+L0009968 00000000 00100001 00000001 00000000*
 L0010000 00000000 00000010 00000000 00000001*
-L0010032 00000000 00000000 00000000 00111000*
-L0010064 00000000 00000000 00000000 00000000*
+L0010032 00000000 00000000 00000000 00011100*
+L0010064 00000000 00000000 00000010 00000100*
 L0010096 00000000 00000000 00000000 00000001*
-L0010128 00000000 00100000 00000000 00011000*
-L0010160 00000000 00000000 00000000 00000000*
-L0010192 00000000 00000000 00000011 00000000*
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-L0010320 000000 000000 000000 000000*
+L0010320 000000 000000 000000 001001*
 L0010344 000000 000000 000000 000000*
-L0010368 00000000 01000000 00000000 00000000*
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 L0010400 00000000 00000000 00000001 00000000*
 L0010432 00000000 00000010 00000000 00000000*
-L0010464 00000000 00100000 00000000 00111000*
-L0010496 00000000 00000000 00000000 00000000*
+L0010464 00000000 00100000 00000000 00011100*
+L0010496 00000000 00000000 00000010 00000000*
 L0010528 00000000 00000000 00000000 00100000*
-L0010560 00000000 01000000 00000000 00000000*
-L0010592 00000000 00000000 00001000 00000001*
-L0010624 00000000 11110000 00000011 00000000*
-L0010656 000000 000000 000000 000000*
+L0010560 00000000 00010000 00000000 00000000*
+L0010592 00000000 00000000 01000000 00000001*
+L0010624 00000000 01110000 00000000 00000000*
+L0010656 000000 001100 000001 000000*
 L0010680 000000 000000 000000 000000*
-L0010704 000000 000000 000000 000000*
+L0010704 000000 001000 001000 000000*
 L0010728 000000 000000 000000 000000*
-L0010752 000000 011000 000000 000000*
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 L0011760 00000000 00000000 00000000 00000000*
 L0011792 00000000 00000000 00000000 00000000*
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 L0012128 00000000 00000000 00000000 00000000*
 L0012160 00000000 00000000 00000000 00000000*
 L0012192 00000000 00000000 00000000 00000000*
@@ -489,32 +489,32 @@ L0012224 00000000 00000000 00000000 00000000*
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 L0013120 00000000 00000000 00000001 00000010*
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@@ -526,140 +526,140 @@ L0013296 000000 000000 000000 000000*
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-L0013856 00000000 00000000 00000011 00000011*
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-L0013920 00000000 00100010 00000000 00111110*
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 L0015712 00000000 00000000 00000000 00000000*
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 L0016144 00000000 00000010 00000000 00000001*
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 L0016448 00000000 00000000 00000000 00000000*
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 L0016544 00000000 00000000 00000000 00000000*
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-L0016944 00000000 00100000 00000000 00000000*
-L0016976 00000000 00000010 00000010 00000000*
-L0017008 00000000 00000000 00000100 00000000*
-L0017040 00000000 00000000 00000010 00000000*
-L0017072 00000000 00000000 00000000 00000000*
-L0017104 00000000 10110000 00010000 00000000*
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 L0017312 00000000 00000000 00000000 00000000*
@@ -705,7 +705,7 @@ L0018456 000000 000000 000000 000000*
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 L0018576 00000000 00000000 00000000 00000000*
 L0018608 00000000 00000000 00000000 00000000*
 L0018640 00000000 00000000 00000000 00000000*
@@ -721,32 +721,32 @@ L0018912 000000 000000 000000 000000*
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 L0018984 000000 000000 000000 000000*
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-L0019136 00000000 00000000 00000000 00000000*
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 L0019168 00000000 00000000 00000000 00000000*
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-L0019440 00000000 00000010 00000011 00000011*
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 L0019504 00000000 00000010 00000011 00000011*
 L0019536 00000000 00000010 00000011 00000011*
 L0019568 00000000 00000010 00000011 00000011*
-L0019600 00000000 00000010 00000001 00000011*
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 L0019800 000000 000000 000000 000000*
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@@ -755,68 +755,68 @@ L0019872 00000000 00000010 00000011 00000011*
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 L0019936 00000000 00000010 00000011 00000011*
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-L0020400 00000000 00000010 00000001 00000001*
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 L0020432 00000000 00000010 00000011 00000001*
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 L0020832 00000000 00000010 00000011 00000001*
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 L0021792 00000000 00000000 00000000 00000000*
 L0021824 00000000 00000000 00000000 00000000*
 L0021856 00000000 00000000 00000000 00000000*
@@ -826,50 +826,50 @@ L0021936 000000 000000 000000 000000*
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 L0022008 000000 000000 000000 000000*
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 L0022128 00000000 00000000 00000000 00000000*
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 L0022528 00000000 00000000 00000000 00000000*
 L0022560 00000000 00000000 00000000 00000000*
-L0022592 00000000 01000010 00000010 00000000*
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 L0022960 00000000 00000000 00000000 00000000*
-L0022992 00000000 01100000 00000000 00111000*
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 L0023056 00000000 00000000 00000000 00000000*
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@@ -886,8 +886,8 @@ L0023664 000000 000000 000000 000000*
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 L0023824 00000000 00000001 00000000 00000001*
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 L0023888 00000000 00000000 00000010 00000000*
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 L0024256 00000000 00000000 00000000 00000000*
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 L0024384 00000000 00000000 00000000 00000000*
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 L0024720 00000000 00000000 00000000 00000000*
 L0024752 00000000 00000000 00000010 00000000*
 L0024784 00000000 00000000 00000000 00000000*
@@ -931,27 +931,27 @@ L0024960 000000 000000 000000 000000*
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 L0025680 00000000 00000000 00000000 00000000*
 L0025712 00000000 00000000 00000000 00000000*
 L0025744 00000000 00000000 00000000 00000000*
@@ -961,41 +961,41 @@ L0025824 000000 000000 000000 000000*
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-L0026048 00000000 00000000 00000010 00000001*
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 L0026080 00000000 00000000 00000000 00000000*
 L0026112 00000000 00000000 00000000 00000000*
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 L0026384 00000000 00000000 00000000 00000000*
 L0026416 00000000 00000000 00000000 00000010*
 L0026448 00000000 00000000 00000000 00000000*
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 L0026512 00000000 00000000 00000000 00000000*
 L0026544 00000000 00000000 00000000 00000000*
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 L0026608 00000000 00000000 00000000 00000000*
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 L0026784 00000000 00000010 00000010 00000010*
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 L0026848 00000000 00000000 00000000 00000001*
 L0026880 00000000 00000000 00000000 00000000*
-L0026912 00000000 00000000 00000000 00000000*
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 L0026944 00000000 00000000 00000000 00000000*
 L0026976 00000000 00000000 00000000 00000000*
 L0027008 00000000 00000000 00000000 00000000*
@@ -1006,11 +1006,11 @@ L0027120 000000 000000 000000 000000*
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 L0027192 000000 000000 000000 000000*
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 L0027280 00000000 00000000 00000000 00000000*
 L0027312 00000000 00000000 00000000 00000000*
-L0027344 00000000 00000000 00000001 00000001*
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 L0027376 00000000 00000000 00000000 00000000*
 L0027408 00000000 00000000 00000000 00000000*
 L0027440 00000000 00000000 00000000 00000000*
@@ -1021,86 +1021,86 @@ L0027552 000000 000000 000000 000000*
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 L0027624 000000 000000 000000 000000*
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 L0027712 00000000 00000000 00000000 00000000*
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 L0027776 00000000 00000000 00000000 00000000*
 L0027808 00000000 00000000 00000000 00000000*
 L0027840 00000000 00000000 00000000 00000000*
 L0027872 00000000 00000000 00000000 00001000*
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 L0028208 00000000 01000010 00000010 00000010*
-L0028240 00000000 00000000 10000000 00000000*
-L0028272 00000000 10000000 00000000 00000000*
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 L0028672 00000000 00000000 00000000 00000000*
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 L0028736 00000000 00000000 00000000 00000000*
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-L0028976 00000000 00000001 00000001 00000000*
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 L0029008 00000000 00000000 00000000 00000000*
-L0029040 00000000 00000000 00000000 00000000*
-L0029072 00000000 00000010 00000010 00000010*
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-L0029168 00000000 00000000 00000000 00000000*
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-L0029256 000000 000000 000000 100000*
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-L0029376 00000000 00000001 00000000 00000001*
-L0029408 00000000 00000010 00000010 00000010*
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 L0029440 00000000 00000000 00000000 00000000*
-L0029472 00000000 00000000 00000000 00111000*
-L0029504 00000000 00000000 00000000 00000001*
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 L0029536 00000000 00000000 00000000 00000000*
 L0029568 00000000 00000000 00000000 00011000*
-L0029600 00000000 00000000 00000000 00011000*
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-L0029688 000000 000000 000000 000001*
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-L0029808 00000000 00000000 00000000 00000000*
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 L0029872 00000000 00000001 00000000 00000001*
 L0029904 00000000 00000000 00000000 00000000*
-L0029936 00000000 00000000 00000000 00000000*
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 L0029968 00000000 00000000 00000000 00000000*
 L0030000 00000000 00000000 00000000 00000000*
 L0030032 00000000 00000000 00000000 00000000*
@@ -1108,44 +1108,44 @@ L0030064 00000000 00000000 00000000 00010000*
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 L0030144 000000 000000 000000 000000*
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 L0030240 00000000 00000001 00000001 00000001*
-L0030272 00000000 00000000 00000000 00000000*
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 L0030304 00000000 00000000 00000000 00000000*
-L0030336 00000000 00100000 00000000 00111100*
-L0030368 00000000 00000000 00000000 00000100*
-L0030400 00000000 00000000 00000000 00000000*
-L0030432 00000000 00000000 00000000 10000100*
-L0030464 00000000 00000000 00000000 00000000*
-L0030496 00000000 10110000 00000000 00000100*
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-L0030624 000000 011000 000000 000110*
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-L0030672 00000000 00000000 00000000 00000010*
-L0030704 00000000 00000001 00000000 00000001*
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 L0030736 00000000 00000000 00000000 00000000*
 L0030768 00000000 00000000 00000000 00000000*
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 L0030832 00000000 00000000 00000000 00000000*
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 L0030928 00000000 00000000 00000000 00000000*
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 L0031056 000000 000000 000000 000000*
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 L0031200 00000000 00000000 00000000 00000000*
-L0031232 00000000 00000000 00000001 00000001*
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 L0031264 00000000 00000000 00000000 00000000*
 L0031296 00000000 00000000 00000000 00000000*
 L0031328 00000000 00000000 00000000 00000000*
@@ -1157,59 +1157,59 @@ L0031464 000000 000000 000000 000000*
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 L0031512 000000 000000 000000 000000*
 L0031536 00000000 00000001 00000000 00000001*
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 L0031600 00000000 00000000 00000000 00000000*
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-L0031664 00000000 00000000 00000000 00000100*
-L0031696 00000000 00000000 00000000 00000000*
-L0031728 00000000 00000000 00000000 10000100*
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 L0031760 00000000 00000000 00000000 00000000*
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 L0031848 000000 000000 000000 000000*
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 L0031896 000000 000000 000000 000000*
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 L0031944 000000 000000 000000 000000*
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 L0032000 00000000 00000000 00000001 00000000*
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-L0032064 00000000 00100000 00000000 00000000*
-L0032096 00000000 01000000 00000011 00000000*
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 L0032128 00000000 00000000 00000000 00000000*
-L0032160 00000000 10000000 00000000 00000000*
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-L0032224 00000000 10110000 00000000 00000000*
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 L0032304 000000 000000 000000 000000*
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-L0032496 00000000 01000000 00000000 00000000*
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 L0032560 00000000 00000000 00000000 00000000*
 L0032592 00000000 00000000 00000000 00000000*
 L0032624 00000000 00000000 00000000 00000000*
 L0032656 00000000 00000000 00000000 00000000*
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 L0032896 00000000 00000010 00000000 00000010*
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 L0032992 00000000 00000000 00000000 00000000*
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 L0033056 00000000 00000000 00000000 00000000*
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 L0033120 000000 000000 000000 000000*
 L0033144 000000 000000 000000 000000*
 L0033168 000000 000000 000000 000000*
@@ -1234,18 +1234,18 @@ L0033672 000000 000000 000000 000000*
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 L0033728 00000000 00000010 00000010 00000010*
 L0033760 00000000 00000000 00000000 00000000*
-L0033792 00000000 00000000 00000000 00111000*
-L0033824 00000000 00000000 00000000 00000000*
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 L0033856 00000000 00000000 00000000 00000000*
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 L0033920 00000000 00000000 00000000 00001000*
 L0033952 00000000 00000000 00000000 00010000*
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 L0034056 000000 000000 000000 000000*
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 L0034128 00000000 00000000 00000000 00000000*
 L0034160 00000000 00000000 00000000 00000000*
 L0034192 00000000 00000000 00000000 00000000*
@@ -1255,30 +1255,30 @@ L0034288 00000000 00000000 00000000 00000000*
 L0034320 00000000 00000000 00000000 00000000*
 L0034352 00000000 00000000 00000000 00000000*
 L0034384 00000000 00000000 00000000 00000000*
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 L0034560 00000000 00000000 00000000 00000000*
-L0034592 00000000 00000000 00000000 00000000*
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-L0034656 00000000 00000000 01000100 00000000*
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 L0034688 00000000 00000000 00000000 00000000*
 L0034720 00000000 00000000 00000000 00000000*
 L0034752 00000000 00000000 00000000 00000000*
-L0034784 00000000 00000000 01000000 00000000*
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 L0034968 000000 000000 000000 000000*
 L0034992 00000000 00000000 00000000 00000000*
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-L0035056 00000000 01000000 00000000 00000000*
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 L0035088 00000000 00000000 00000000 00000000*
 L0035120 00000000 00000000 00000000 00000000*
 L0035152 00000000 00000000 00000000 00000000*
@@ -1287,7 +1287,7 @@ L0035216 00000000 00000000 00000000 00000000*
 L0035248 00000000 00000000 00000000 00000000*
 L0035280 000000 000000 000000 000000*
 L0035304 000000 000000 000000 000000*
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 L0035352 000000 000000 000000 000000*
 L0035376 000000 000000 000000 000000*
 L0035400 000000 000000 000000 000000*
@@ -1324,40 +1324,40 @@ L0036264 000000 000000 000000 000000*
 L0036288 00000000 00000000 00000000 00000000*
 L0036320 00000000 00000000 00000000 00000000*
 L0036352 00000000 00000000 00000000 00000000*
-L0036384 00000000 00000000 10000000 00000000*
-L0036416 00000000 00000000 00001000 00000000*
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 L0036448 00000000 00000000 00000000 00000000*
 L0036480 00000000 00000000 00000000 00000000*
-L0036512 00000000 00000000 00100000 00000000*
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 L0036544 00000000 00000000 00000000 00000000*
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 L0036672 000000 000000 000000 000000*
-L0036696 000000 000000 000000 000000*
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 L0036720 00000000 00000000 00000000 00000000*
 L0036752 00000000 00000000 00000000 00000000*
-L0036784 00000000 01000000 10000000 00000000*
-L0036816 00000000 00100000 00001000 00111100*
-L0036848 00000000 00000000 00000000 00000100*
+L0036784 00000000 00000000 00001000 00000000*
+L0036816 00000000 01100000 00000000 10011100*
+L0036848 00000000 00000000 00000000 10000000*
 L0036880 00000000 00000000 00000000 00000000*
-L0036912 00000000 00000000 00100000 10000100*
-L0036944 00000000 00000000 00000000 00000000*
-L0036976 00000000 10110000 00000000 00000100*
+L0036912 00000000 00000000 00000000 00000100*
+L0036944 00000000 00000000 00000000 10000000*
+L0036976 00000000 01100000 01000000 00000100*
 L0037008 000000 000000 000000 000000*
 L0037032 000000 000000 000000 000000*
-L0037056 000000 100000 000000 000110*
+L0037056 000000 100000 100000 000110*
 L0037080 000000 000000 000000 000000*
-L0037104 000000 111000 000000 000110*
+L0037104 000000 110000 001000 001111*
 L0037128 000000 000000 000000 000000*
 L0037152 00000000 00000000 00000000 00000000*
-L0037184 00000000 00000000 00100000 00000000*
+L0037184 00000000 00000000 00000000 00000000*
 L0037216 00000000 00000000 00000000 00000000*
-L0037248 00000000 00000000 00100000 00000000*
+L0037248 00000000 00000000 00000000 00000000*
 L0037280 00000000 00000000 00000000 00000000*
 L0037312 00000000 00000000 00000000 00000000*
-L0037344 00000000 00000000 01000000 00000000*
+L0037344 00000000 00000000 00000000 00000000*
 L0037376 00000000 00000000 00000000 00000000*
 L0037408 00000000 00000000 00000000 00000000*
 L0037440 000000 000000 000000 000000*
@@ -1365,29 +1365,29 @@ L0037464 000000 000000 000000 000000*
 L0037488 000000 000000 000000 000000*
 L0037512 000000 000000 000000 000000*
 L0037536 000000 000000 000000 000000*
-L0037560 000000 000000 000000 000000*
-L0037584 00000000 00000000 00000000 10111100*
-L0037616 00000000 00000000 00000000 00000000*
+L0037560 000000 000000 000000 000100*
+L0037584 00000000 00000000 00000000 00000000*
+L0037616 00000000 00000000 10000000 00000000*
 L0037648 00000000 00000000 00000000 00000000*
 L0037680 00000000 00000000 00000000 00000000*
-L0037712 00000000 00000000 00000000 00000000*
-L0037744 00000000 00000000 00000000 00000100*
+L0037712 00000100 00000000 00000000 00000000*
+L0037744 00000000 00000000 00000000 00000000*
 L0037776 00000000 00000000 00000000 00000000*
 L0037808 00000000 00000000 00000000 00000000*
 L0037840 00000000 00000000 00000000 00000000*
-L0037872 000000 000000 000000 000000*
-L0037896 000000 000000 000000 001110*
+L0037872 000001 000000 000000 000000*
+L0037896 000000 000000 000000 000000*
 L0037920 000000 000000 000000 000000*
 L0037944 000000 000000 000000 000000*
 L0037968 000000 000000 000000 000000*
 L0037992 000000 000000 000000 000000*
 L0038016 00000000 00000000 00000000 00000000*
-L0038048 00000000 00000000 00000000 00000000*
+L0038048 00000000 00000000 00000000 00100000*
 L0038080 00000000 00000000 00000000 00000000*
 L0038112 00000000 00000000 00000000 00000000*
 L0038144 00000000 00000000 00000000 00000000*
-L0038176 00000000 00000000 00000000 00000000*
-L0038208 00000000 00000000 01000000 00000000*
+L0038176 00000000 00000000 00000000 01100000*
+L0038208 00000000 00000000 00000000 00000000*
 L0038240 00000000 00000000 00000000 00000000*
 L0038272 00000000 00000000 00000000 00000000*
 L0038304 000000 000000 000000 000000*
@@ -1396,66 +1396,66 @@ L0038352 000000 000000 000000 000000*
 L0038376 000000 000000 000000 000000*
 L0038400 000000 000000 000000 000000*
 L0038424 000000 000000 000000 000000*
-L0038448 00000000 00000000 00000000 00000000*
-L0038480 00000000 00000000 00100000 00000000*
+L0038448 00000000 00010000 00000000 00000000*
+L0038480 00000000 00000000 00000000 00000000*
 L0038512 00000000 00000000 00000000 00000000*
-L0038544 00000000 00000000 00100000 00000000*
+L0038544 00000000 00000000 00000000 00000000*
 L0038576 00000000 00000000 00000000 00000000*
 L0038608 00000000 00000000 00000000 00000000*
-L0038640 00000000 01000000 00000000 00000000*
+L0038640 00000000 00010000 00000000 00000000*
 L0038672 00000000 00000000 00000000 00000000*
-L0038704 00000000 01000000 00000000 00000000*
-L0038736 000000 000000 000000 000000*
+L0038704 00000000 00010000 00000000 00000000*
+L0038736 000000 001100 000000 000000*
 L0038760 000000 000000 000000 000000*
-L0038784 000000 000000 000000 000000*
-L0038808 000000 000000 000000 000000*
-L0038832 000000 000000 000001 000000*
-L0038856 000000 000000 000000 000000*
+L0038784 000000 001000 000000 000000*
+L0038808 000000 000000 000001 000000*
+L0038832 000000 001000 000000 000000*
+L0038856 000000 001000 000000 000000*
 L0038880 00000000 00000000 00000000 00000000*
 L0038912 00000000 00000000 00000000 00000000*
 L0038944 00000000 00000000 00000000 00000000*
-L0038976 00000000 00000000 00000000 00000000*
+L0038976 00000000 01100000 00000000 00000000*
 L0039008 00000000 00000000 00000000 00000000*
-L0039040 00000000 00000000 00000000 01100000*
+L0039040 00000000 00000000 00000000 00000000*
 L0039072 00000000 00000000 00000000 00000000*
 L0039104 00000000 00000000 00000000 00000000*
-L0039136 00000000 01000000 00000000 00000000*
+L0039136 00000000 01100000 00000000 00000000*
 L0039168 000000 000000 000000 000000*
 L0039192 000000 000000 000000 000000*
-L0039216 000000 000000 000000 001000*
+L0039216 000000 100000 000000 000000*
 L0039240 000000 000000 000000 000000*
-L0039264 000000 000000 000000 000000*
+L0039264 000000 110000 000000 000000*
 L0039288 000000 000000 000000 000000*
 L0039312 00000000 00000000 00000000 00000000*
-L0039344 00000000 00100000 00000000 00000000*
+L0039344 00000000 00000000 00000000 00001000*
 L0039376 00000000 00000000 00000000 00000000*
 L0039408 00000000 00000000 00000000 00000000*
 L0039440 00000000 00000000 00000000 00000000*
 L0039472 00000000 00000000 00000000 00000000*
-L0039504 00000000 01010000 00000000 00000000*
+L0039504 00000000 00000000 00000000 00000000*
 L0039536 00000000 00000000 00000000 00000000*
 L0039568 00000000 00000000 00000000 00000000*
 L0039600 000000 000000 000000 000000*
 L0039624 000000 000000 000000 000000*
-L0039648 000000 000000 000000 000000*
+L0039648 000000 000000 000000 001000*
 L0039672 000000 000000 000000 000000*
 L0039696 000000 000000 000000 000000*
 L0039720 000000 000000 000000 000000*
 L0039744 00000000 00000000 00000000 00000000*
 L0039776 00000000 00000000 00000000 00000000*
 L0039808 00000000 00000000 00000000 00000000*
-L0039840 00000000 01100000 00000000 00111000*
-L0039872 00000000 01000000 00000000 00000000*
+L0039840 00000000 00100000 00000000 00011100*
+L0039872 00000000 01000000 00000000 00000100*
 L0039904 00000000 00000000 00000000 00000000*
-L0039936 00000000 10000000 00000000 00011000*
-L0039968 00000000 00000000 00000000 00011000*
-L0040000 00000000 10110000 00000000 00010000*
-L0040032 000000 000000 000000 000001*
-L0040056 000000 000000 000000 000001*
+L0039936 00000000 00000000 00000000 00011000*
+L0039968 00000000 10000000 00000000 00011000*
+L0040000 00000000 01100000 00000000 00010000*
+L0040032 000000 100000 000000 000001*
+L0040056 000000 000000 000000 000000*
 L0040080 000000 000000 000000 000001*
-L0040104 000000 000000 000000 000001*
-L0040128 000000 011000 000000 000000*
-L0040152 000000 100000 000000 000110*
+L0040104 000000 000000 000000 000000*
+L0040128 000000 010000 000000 001001*
+L0040152 000000 100000 000000 000111*
 L0040176 00000000 00000000 00000000 00000000*
 L0040208 00000000 00000000 00000000 00000000*
 L0040240 00000000 00000000 00000000 00000000*
@@ -1471,21 +1471,21 @@ L0040512 000000 000000 000000 000000*
 L0040536 000000 000000 000000 000000*
 L0040560 000000 000000 000000 000000*
 L0040584 000000 000000 000000 000000*
-L0040608 00000000 00000000 00000000 00000000*
-L0040640 00000000 00000000 00100000 00000000*
+L0040608 00000000 00010000 00000000 00000000*
+L0040640 00000000 00000000 00000000 00000000*
 L0040672 00000000 00000000 00000000 00000000*
-L0040704 00000000 00100000 00100000 00111000*
-L0040736 00000000 00000000 00000000 00000100*
+L0040704 00000000 00100000 00000000 00011100*
+L0040736 00000000 00000000 00000000 10000000*
 L0040768 00000000 00000000 00000000 00000000*
-L0040800 00000000 01000000 01000000 00000000*
+L0040800 00000000 00010000 00000000 00000000*
 L0040832 00000000 00000000 00000000 00000000*
-L0040864 00000000 11110000 00000000 00000000*
-L0040896 000000 000000 000000 000000*
+L0040864 00000000 01110000 00000000 00000000*
+L0040896 000000 001100 000000 000000*
 L0040920 000000 000000 000000 000000*
-L0040944 000000 000000 000000 000000*
+L0040944 000000 001000 000000 000000*
 L0040968 000000 000000 000000 000000*
-L0040992 000000 011000 000000 000000*
-L0041016 000000 000000 000000 000000*
+L0040992 000000 011000 000000 001001*
+L0041016 000000 001000 000000 000000*
 L0041040 00000000 00000000 00000000 00000000*
 L0041072 00000000 00000000 00000000 00000000*
 L0041104 00000000 00000000 00000000 00000000*
@@ -1497,110 +1497,110 @@ L0041264 00000000 00000000 00000000 00000000*
 L0041296 00000000 00000000 00000000 00000000*
 L0041328 000000 000000 000000 000000*
 L0041352 000000 000000 000000 000000*
-L0041376 000000 000000 000000 000000*
+L0041376 000000 000000 000001 000000*
 L0041400 000000 000000 000000 000000*
 L0041424 000000 000000 000000 000000*
 L0041448 000000 000000 000000 000000*
-L0041472 00000000 00000000 00000000 00000000*
+L0041472 00000000 00010000 00000000 01000000*
 L0041504 00000000 00000000 00000000 00000000*
-L0041536 00000000 00000000 00000000 00000000*
+L0041536 00000000 01000000 00000000 00000000*
 L0041568 00000000 00000000 00000000 00000000*
 L0041600 00000000 00000000 00000000 00000000*
-L0041632 00000000 00000000 00000000 00000000*
+L0041632 00000000 00000000 00000000 00010000*
 L0041664 00000000 00000000 00000000 00000000*
-L0041696 00000000 00000000 00000000 00000000*
+L0041696 00000000 00000000 00001000 00000000*
 L0041728 00000000 00000000 00000000 00000000*
-L0041760 000000 000000 000000 000000*
+L0041760 000000 001100 000000 000000*
 L0041784 000000 000000 000000 000000*
 L0041808 000000 000000 000000 000000*
 L0041832 000000 000000 000000 000000*
 L0041856 000000 000000 000000 000000*
-L0041880 000000 000000 000000 000000*
+L0041880 000000 001000 000000 000000*
 L0041904 00000000 00000000 00000000 00000000*
-L0041936 00000000 00000000 00000000 00000000*
-L0041968 00000000 01000000 00000000 00000000*
-L0042000 00000000 00100000 00000000 00111100*
-L0042032 00000000 00000000 00000000 00000100*
-L0042064 00000000 00000000 00000000 00000000*
-L0042096 00000000 00000000 00000000 10000100*
+L0041936 00000000 01000000 00000000 00000000*
+L0041968 00000000 00000000 00000000 00000000*
+L0042000 00000000 01100000 00000000 00000000*
+L0042032 00000000 00000000 00000000 00000000*
+L0042064 00000000 00000000 00000000 00001000*
+L0042096 00000000 00010000 00001000 00000000*
 L0042128 00000000 00000000 00000000 00000000*
-L0042160 00000000 10110000 00000000 00000100*
+L0042160 00000000 01110000 00000000 00000000*
 L0042192 000000 000000 000000 000000*
-L0042216 000000 000000 000000 000000*
-L0042240 000000 100000 000000 000110*
+L0042216 000000 000000 000000 010000*
+L0042240 000000 101000 000000 000000*
 L0042264 000000 000000 000000 000000*
-L0042288 000000 111000 000000 000110*
+L0042288 000000 111000 000000 000000*
 L0042312 000000 000000 000000 000000*
 L0042336 00000000 00000000 00000000 00000000*
-L0042368 00000000 00000000 00000100 00000000*
-L0042400 00000000 00000000 00000000 00000000*
-L0042432 00000000 00000000 00000000 00111000*
+L0042368 00000000 01000000 00000000 00000000*
+L0042400 00000000 01000000 00000000 00000000*
+L0042432 00000000 01000000 00000000 00000000*
 L0042464 00000000 00000000 00000000 00000000*
 L0042496 00000000 00000000 00000000 00000000*
-L0042528 00000000 00000000 00000000 00000000*
-L0042560 00000000 00000000 00010000 00000000*
+L0042528 00000000 10000000 00000000 00000000*
+L0042560 00000000 00000000 00000000 00000000*
 L0042592 00000000 00000000 00000000 00000000*
 L0042624 000000 000000 000000 000000*
 L0042648 000000 000000 000000 000000*
-L0042672 000000 000000 001000 000000*
-L0042696 000000 000000 000001 000000*
+L0042672 000000 000000 000000 000000*
+L0042696 000000 000000 000000 000000*
 L0042720 000000 000000 000000 000000*
 L0042744 000000 000000 000000 000000*
 L0042768 00000000 00000000 00000000 00000000*
 L0042800 00000000 00000000 00000000 00000000*
-L0042832 00000000 01000000 00000000 00000000*
-L0042864 00000000 00100000 00000000 00000000*
+L0042832 00000000 00000000 00000000 00000000*
+L0042864 00000000 00000000 00000000 00000000*
 L0042896 00000000 00000000 00000000 00000000*
 L0042928 00000000 00000000 00000000 00000000*
 L0042960 00000000 00000000 00000000 00000000*
 L0042992 00000000 00000000 00000000 00000000*
-L0043024 00000000 10110000 00000000 00000000*
+L0043024 00000000 00000000 00000000 00000000*
 L0043056 000000 000000 000000 000000*
 L0043080 000000 000000 000000 000000*
-L0043104 000000 100000 000000 000000*
+L0043104 000000 000000 000000 000000*
 L0043128 000000 000000 000000 000000*
-L0043152 000000 111000 000000 000000*
+L0043152 000000 000000 000000 000000*
 L0043176 000000 000000 000000 000000*
-L0043200 00000000 00000000 00000000 01000000*
+L0043200 00000000 00000000 00000000 00000000*
 L0043232 00000000 00000000 00000000 00000000*
 L0043264 00000000 00000000 00000000 00000000*
 L0043296 00000000 00000000 00000000 00000000*
-L0043328 00000000 00000000 10000000 00000000*
-L0043360 00000000 00000000 00000000 00010000*
-L0043392 00000000 00000000 00001000 00000000*
+L0043328 00000000 00000000 01000000 00000000*
+L0043360 00000000 00000000 00001000 00000000*
+L0043392 00000000 00000000 00000000 10000000*
 L0043424 00000000 00000000 00000000 00000000*
 L0043456 00000000 00000000 00000000 00000000*
-L0043488 000000 000000 001000 000000*
+L0043488 000000 001000 001000 000000*
 L0043512 000000 000000 000000 000000*
 L0043536 000000 000000 000000 000000*
 L0043560 000000 000000 000000 000000*
-L0043584 000000 000000 000000 000000*
-L0043608 000000 000000 000000 000000*
+L0043584 000000 001000 000000 000000*
+L0043608 000000 000000 100000 000000*
 L0043632 00000000 00000000 00000000 00000000*
 L0043664 00000000 00000000 00000000 00000000*
 L0043696 00000000 00000000 00000000 00000000*
-L0043728 00000000 00000000 00000000 00000000*
-L0043760 00000000 00000000 00000000 00000000*
-L0043792 00000000 00000000 00001000 00001000*
-L0043824 00000000 00000000 00000000 00000000*
+L0043728 00000000 00000000 01000000 00000000*
+L0043760 00000000 00000000 00001000 00000000*
+L0043792 00000000 00000000 00000000 10000000*
+L0043824 00000000 00100000 00000000 00000000*
 L0043856 00000000 00000000 00000000 00000000*
 L0043888 00000000 00000000 00100000 00000000*
-L0043920 000000 000000 000001 000000*
-L0043944 000000 000000 000000 010000*
+L0043920 000000 000000 000000 000000*
+L0043944 000000 000000 000000 000000*
 L0043968 000000 011000 000000 000000*
 L0043992 000000 000000 000000 000000*
-L0044016 000000 000000 000000 000000*
-L0044040 000000 000000 000000 000000*
+L0044016 000000 000000 100000 000000*
+L0044040 000000 001000 000000 000000*
 L0044064 00000000 00000000 00000000 00000000*
-L0044096 00000000 00000000 00000100 00000000*
+L0044096 00000000 00000000 00000000 00000000*
 L0044128 00000000 00000000 00000000 00000000*
-L0044160 00000000 01000000 00000000 00000000*
+L0044160 00000000 00000000 00000000 00000000*
 L0044192 00000000 01000000 00000000 00000000*
 L0044224 00000000 00000000 00000000 00000000*
-L0044256 00000000 00000000 00000000 00000000*
+L0044256 00000000 00000000 00001000 00000000*
 L0044288 00000000 00000000 00000000 00000000*
 L0044320 00000000 00000000 00000000 00000000*
-L0044352 000000 000000 000000 000000*
+L0044352 000000 100000 000000 000000*
 L0044376 000000 000000 000000 000000*
 L0044400 000000 000000 000000 000000*
 L0044424 000000 000000 000000 000000*
@@ -1613,73 +1613,73 @@ L0044592 00000000 00100000 00000000 00000000*
 L0044624 00000000 00000000 00000000 00000000*
 L0044656 00000000 00000000 00000000 00000000*
 L0044688 00000000 00000000 00000000 00000000*
-L0044720 00000000 00000000 00000000 00000000*
-L0044752 00000000 10110000 00000000 00000000*
+L0044720 00000000 00000000 00001000 00000000*
+L0044752 00000000 01100000 00000000 00000000*
 L0044784 000000 000000 000000 000000*
 L0044808 000000 000000 000000 000000*
 L0044832 000000 000000 000000 000000*
 L0044856 000000 000000 000000 000000*
-L0044880 000000 011000 000000 000000*
+L0044880 000000 010000 000000 000000*
 L0044904 000000 100000 000000 000000*
 L0044928 00000000 00000000 00000000 00000000*
 L0044960 00000000 00000000 00000000 00000000*
 L0044992 00000000 00000000 00000000 00000000*
-L0045024 00000000 00000000 00000000 00000000*
+L0045024 00000000 00100000 00000000 00000000*
 L0045056 00000000 00000000 00000000 00000000*
 L0045088 00000000 00000000 00000000 00000000*
 L0045120 00000000 00000000 00000000 00000000*
-L0045152 00000000 00000000 00000000 00000000*
-L0045184 00000000 00000000 00000000 00000000*
+L0045152 00000000 10000000 00000000 00000000*
+L0045184 00000000 00100000 00000000 00000000*
 L0045216 000000 000000 000000 000000*
 L0045240 000000 000000 000000 000000*
 L0045264 000000 000000 000000 000000*
 L0045288 000000 000000 000000 000000*
-L0045312 000000 000000 000000 000000*
-L0045336 000000 000000 000000 000000*
-L0045360 00000000 00000000 00000000 00000000*
-L0045392 00000000 00000000 00000000 10000000*
+L0045312 000000 010000 000000 000000*
+L0045336 000000 100000 000000 000000*
+L0045360 00000000 00000000 00000000 10111100*
+L0045392 00000000 00000000 00000000 00000000*
 L0045424 00000000 00000000 00000000 00000000*
 L0045456 00000000 00000000 00000000 00000000*
-L0045488 00000000 00000000 00000000 00000000*
-L0045520 00000000 00000000 00000000 00000000*
-L0045552 00000000 00000000 00000000 00000100*
+L0045488 00000000 01000000 00000000 00000000*
+L0045520 00000000 00000000 00000000 00000100*
+L0045552 00000000 00000000 00000000 00000000*
 L0045584 00000000 00000000 00000000 00000000*
-L0045616 00000000 00000000 00000000 00000000*
-L0045648 000000 000000 000000 000000*
-L0045672 000000 000000 000000 000000*
-L0045696 000000 000000 000000 000110*
+L0045616 00000000 01000000 00000000 00000000*
+L0045648 000000 100000 000000 000000*
+L0045672 000001 000000 000000 001111*
+L0045696 000000 000000 000000 000000*
 L0045720 000000 000000 000000 000000*
 L0045744 000000 000000 000000 000000*
 L0045768 000000 000000 000000 000000*
 L0045792 00000000 00000000 00000000 00000000*
-L0045824 00000000 00000000 00100000 00000000*
-L0045856 00000000 00000000 00000000 00000000*
-L0045888 00000000 00000000 00000000 00000000*
-L0045920 00000000 00000000 00000000 00000000*
+L0045824 00000000 00000000 00000100 00000000*
+L0045856 00000000 00000000 00010000 00000000*
+L0045888 00000000 00100000 00000000 00000000*
+L0045920 00000000 00000000 10000000 00000000*
 L0045952 00000000 00000000 00000000 00001000*
-L0045984 00000000 00000000 00000000 00000000*
-L0046016 00000000 00000000 00000000 00000000*
-L0046048 00000000 00000000 00000000 00000000*
+L0045984 00000000 00000000 01000000 00000000*
+L0046016 00000000 00000000 00010000 00000000*
+L0046048 00000000 00100000 00000000 00000000*
 L0046080 000000 000000 000000 000000*
 L0046104 000000 000000 000000 010000*
 L0046128 000000 000000 000000 000000*
 L0046152 000000 000000 000000 000000*
-L0046176 000000 000000 000000 000000*
+L0046176 000000 010000 000000 000000*
 L0046200 000000 000000 000000 000000*
 L0046224 00000000 00000000 00000000 01000000*
 L0046256 00000000 00000000 00000000 00000000*
 L0046288 00000000 00000000 00000000 00000000*
-L0046320 00000000 00000000 00100000 00000000*
+L0046320 00000000 00000000 00000000 00000000*
 L0046352 00000000 00000000 00000000 00000000*
 L0046384 00000000 00000000 00000000 00010000*
 L0046416 00000000 00000000 00000000 00000000*
 L0046448 00000000 00000000 00000000 00000000*
 L0046480 00000000 00000000 00000000 00000000*
 L0046512 000000 000000 000000 000000*
-L0046536 000000 000000 000010 000000*
+L0046536 000000 000000 000000 000000*
 L0046560 000000 000000 000000 000000*
 L0046584 000000 000000 000000 000000*
 L0046608 000000 000000 000000 000000*
 L0046632 000000 000000 000000 000000*
-C649A*
-02A2
+C8BB6*
+0350
diff --git a/RTL/IDE.v b/RTL/IDE.v
index 41da44c..9bfea64 100644
--- a/RTL/IDE.v
+++ b/RTL/IDE.v
@@ -56,8 +56,8 @@ always @(posedge CLK or negedge RESET_n) begin
     ide_enabled <= 0;
     rom_bankSel <= 0;
   end else begin
-    // IDE enabled on first write to an IDE address
-    if (ide_enable && ide_access && ADDR[16:15] == 2'b00 && !RW && !UDS_n && !S3_n) ide_enabled <= 1;
+    // IDE enabled on first write seen
+    if (ide_enable && ide_access && !RW && !UDS_n && !S3_n) ide_enabled <= 1;
     if (ide_enable && ide_access && ADDR[16:15] == 2'b01 && !RW && !UDS_n && !S3_n) rom_bankSel <= DIN;
   end
 end
diff --git a/RTL/RIPPLE.rpt b/RTL/RIPPLE.rpt
index 23fee4a..a1e0168 100644
--- a/RTL/RIPPLE.rpt
+++ b/RTL/RIPPLE.rpt
@@ -1,7 +1,7 @@
  
 cpldfit:  version P.20131013                        Xilinx Inc.
                                   Fitter Report
-Design Name: RIPPLE                              Date:  3- 2-2024,  2:41AM
+Design Name: RIPPLE                              Date:  4-18-2024,  4:18AM
 Device Used: XC9572XL-10-VQ64
 Fitting Status: Successful
 
@@ -9,18 +9,18 @@ Fitting Status: Successful
 
 Macrocells     Product Terms    Function Block   Registers      Pins           
 Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-41 /72  ( 57%) 170 /360  ( 47%) 112/216 ( 52%)   23 /72  ( 32%) 48 /52  ( 92%)
+41 /72  ( 57%) 193 /360  ( 54%) 114/216 ( 53%)   23 /72  ( 32%) 48 /52  ( 92%)
 
 ** Function Block Resources **
 
 Function    Mcells      FB Inps     Pterms      IO          
 Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1           1/18        2/54        2/90      10/13
-FB2          11/18       37/54       41/90      12/13
-FB3          12/18       36/54       73/90      14/14*
-FB4          17/18       37/54       54/90      12/12*
+FB1           3/18        5/54        7/90      10/13
+FB2          11/18       39/54       44/90      12/13
+FB3           9/18       31/54       81/90      14/14*
+FB4          18/18*      39/54       61/90      12/12*
              -----       -----       -----      -----    
-             41/72      112/216     170/360     48/52 
+             41/72      114/216     193/360     48/52 
 
 * - Resource is exhausted
 
@@ -88,14 +88,14 @@ WARNING:Cpld:1239 - The global clock designation (BUFG) on signal 'ADDR_12_IBUF'
 Signal                      Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
 Name                        Pts   Inps          No.  Type    Use     Mode Rate State
 DBUS<15>                    8     23    FB2_3   58   I/O     I/O     STD  SLOW RESET
-IDEBUF_OE                   3     16    FB2_4   59   I/O     O       STD  SLOW 
+IDEBUF_OE                   4     17    FB2_4   59   I/O     O       STD  SLOW 
 DTACK_n                     0     0     FB2_10  1    I/O     O       STD  SLOW 
 OVR_n_1                     0     0     FB3_6   34   I/O     O       STD  SLOW 
 IDE_ROMEN                   19    21    FB3_11  33   I/O     O       STD  SLOW 
 OVR_n_2                     0     0     FB3_14  35   I/O     O       STD  SLOW 
 ROM_BANK<1>                 1     2     FB3_15  36   I/O     O       STD  SLOW 
 CFGOUT_n                    3     4     FB3_16  42   I/O     O       STD  SLOW SET
-SLAVE_n                     2     12    FB4_2   43   I/O     O       STD  SLOW 
+SLAVE_n                     3     13    FB4_2   43   I/O     O       STD  SLOW 
 ROM_BANK<0>                 2     3     FB4_3   46   I/O     O       STD  SLOW 
 IDE2_CS_n<1>                1     4     FB4_4   47   I/O     O       STD  SLOW 
 IOR_n                       1     3     FB4_5   44   I/O     O       STD  SLOW 
@@ -111,28 +111,28 @@ DBUS<14>                    8     23    FB4_17  57   I/O     I/O     STD  SLOW R
 
 Signal                      Total Total Loc     Pwr  Reg Init
 Name                        Pts   Inps          Mode State
-ide_enable/ide_enable_CLKF  2     2     FB1_18  STD  
-IDE/as_delay<1>             3     4     FB2_1   STD  RESET
-AUTOCONFIG/shutup           3     25    FB2_2   STD  RESET
-IDE/rom_bankSel<0>          4     11    FB2_5   STD  RESET
+ide_enable/ide_enable_CLKF  2     2     FB1_16  STD  
+IDE/S3_n/IDE/S3_n_CLKF      2     2     FB1_17  STD  
+ide_enable                  3     3     FB1_18  STD  RESET
+RESET                       2     2     FB2_1   STD  RESET
+IDE/as_delay<1>             3     4     FB2_2   STD  RESET
+AUTOCONFIG/shutup           3     25    FB2_5   STD  RESET
 AUTOCONFIG/ide_base<7>      4     26    FB2_6   STD  RESET
-AUTOCONFIG/ide_base<6>      4     26    FB2_7   STD  RESET
-AUTOCONFIG/ide_base<4>      4     26    FB2_8   STD  RESET
-AUTOCONFIG/ide_base<3>      4     26    FB2_9   STD  RESET
-AUTOCONFIG/ide_base<2>      4     26    FB2_11  STD  RESET
-IDE/S3_n/IDE/S3_n_CLKF      2     2     FB3_2   STD  
-IDE/S3_n                    3     3     FB3_3   STD  RESET
-ide_enable                  3     3     FB3_4   STD  RESET
-IDE/ide_enabled             3     10    FB3_5   STD  RESET
-IDE/rom_bankSel<1>          4     11    FB3_7   STD  RESET
-$OpTx$INV$89                16    16    FB3_9   STD  
-$OpTx$FX_DC$102             19    19    FB3_18  STD  
-RESET                       2     2     FB4_1   STD  RESET
-AUTOCONFIG/ide_configured   3     25    FB4_7   STD  RESET
-AS_n_S4                     3     4     FB4_9   STD  RESET
+AUTOCONFIG/ide_base<4>      4     26    FB2_7   STD  RESET
+AUTOCONFIG/ide_base<3>      4     26    FB2_8   STD  RESET
+IDE/rom_bankSel<1>          6     13    FB2_9   STD  RESET
+IDE/rom_bankSel<0>          6     13    FB2_11  STD  RESET
+IDE/ide_enabled             22    23    FB3_1   STD  RESET
+$OpTx$INV$24                14    14    FB3_5   STD  
+$OpTx$FX_DC$38              19    19    FB3_10  STD  
+IDE/S3_n                    3     3     FB3_17  STD  RESET
+AUTOCONFIG/dtack            5     16    FB4_1   STD  RESET
+AS_n_S4                     3     4     FB4_7   STD  RESET
+AUTOCONFIG/ide_base<6>      4     26    FB4_9   STD  RESET
 AUTOCONFIG/ide_base<5>      4     26    FB4_10  STD  RESET
-AUTOCONFIG/ide_base<1>      4     26    FB4_13  STD  RESET
-AUTOCONFIG/dtack            5     16    FB4_16  STD  RESET
+AUTOCONFIG/ide_base<2>      4     26    FB4_13  STD  RESET
+AUTOCONFIG/ide_base<1>      4     26    FB4_16  STD  RESET
+AUTOCONFIG/ide_configured   3     25    FB4_18  STD  RESET
 
 ** 29 Inputs **
 
@@ -184,8 +184,8 @@ Pin Type/Use - I  - Input             GCK - Global Clock
 X            - Signal used as input to the macrocell logic.
 Pin No.      - ~  - User Assigned
 *********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               2/52
-Number of signals used by logic mapping into function block:  2
+Number of function block inputs used/remaining:               5/49
+Number of signals used by logic mapping into function block:  5
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB1_1         (b)     
@@ -203,41 +203,44 @@ Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB1_13        (b)     
 (unused)              0       0     0   5     FB1_14  17    GCK/I/O 
 (unused)              0       0     0   5     FB1_15  19    I/O     
-(unused)              0       0     0   5     FB1_16        (b)     
-(unused)              0       0     0   5     FB1_17  20    I/O     I
 ide_enable/ide_enable_CLKF
-                      2       0     0   3     FB1_18        (b)     (b)
+                      2       0     0   3     FB1_16        (b)     (b)
+IDE/S3_n/IDE/S3_n_CLKF
+                      2       0     0   3     FB1_17  20    I/O     I
+ide_enable            3       0     0   2     FB1_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: C1n                2: C3n              
+  1: C1n                3: IDE_OFF_n          5: ide_enable/ide_enable_CLKF 
+  2: C3n                4: RESET            
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
 ide_enable/ide_enable_CLKF 
                      XX...................................... 2
+IDE/S3_n/IDE/S3_n_CLKF 
+                     XX...................................... 2
+ide_enable           ..XXX................................... 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               37/17
-Number of signals used by logic mapping into function block:  37
+Number of function block inputs used/remaining:               39/15
+Number of signals used by logic mapping into function block:  39
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-IDE/as_delay<1>       3       0     0   2     FB2_1         (b)     (b)
-AUTOCONFIG/shutup     3       0   \/1   1     FB2_2   60    I/O     I
+RESET                 2       0     0   3     FB2_1         (b)     (b)
+IDE/as_delay<1>       3       0   \/2   0     FB2_2   60    I/O     I
 DBUS<15>              8       3<-   0   0     FB2_3   58    I/O     I/O
-IDEBUF_OE             3       0   /\2   0     FB2_4   59    I/O     O
-IDE/rom_bankSel<0>    4       0     0   1     FB2_5   61    I/O     I
+IDEBUF_OE             4       0   /\1   0     FB2_4   59    I/O     O
+AUTOCONFIG/shutup     3       0     0   2     FB2_5   61    I/O     I
 AUTOCONFIG/ide_base<7>
                       4       0     0   1     FB2_6   62    I/O     (b)
-AUTOCONFIG/ide_base<6>
-                      4       0     0   1     FB2_7         (b)     (b)
 AUTOCONFIG/ide_base<4>
-                      4       0     0   1     FB2_8   63    I/O     I
+                      4       0     0   1     FB2_7         (b)     (b)
 AUTOCONFIG/ide_base<3>
-                      4       0     0   1     FB2_9   64    GSR/I/O I
-DTACK_n               0       0     0   5     FB2_10  1     I/O     O
-AUTOCONFIG/ide_base<2>
-                      4       0     0   1     FB2_11  2     GTS/I/O I
+                      4       0   \/1   0     FB2_8   63    I/O     I
+IDE/rom_bankSel<1>    6       1<-   0   0     FB2_9   64    GSR/I/O I
+DTACK_n               0       0   \/1   4     FB2_10  1     I/O     O
+IDE/rom_bankSel<0>    6       1<-   0   0     FB2_11  2     GTS/I/O I
 (unused)              0       0     0   5     FB2_12  4     I/O     I
 (unused)              0       0     0   5     FB2_13        (b)     
 (unused)              0       0     0   5     FB2_14  5     GTS/I/O I
@@ -247,210 +250,203 @@ AUTOCONFIG/ide_base<2>
 (unused)              0       0     0   5     FB2_18        (b)     
 
 Signals Used by Logic in Function Block
-  1: $OpTx$INV$89      14: ADDR<4>                    26: CFGOUT_n 
-  2: ADDR<15>          15: ADDR<5>                    27: IDE/S3_n 
-  3: ADDR<16>          16: ADDR<6>                    28: IDE/rom_bankSel<0> 
-  4: ADDR<17>          17: ADDR<7>                    29: DBUS<15>.PIN 
-  5: ADDR<18>          18: ADDR<8>                    30: DBUS<14>.PIN 
-  6: ADDR<19>          19: AS_n                       31: DBUS<12>.PIN 
-  7: ADDR<1>           20: AS_n_S4                    32: RESET 
-  8: ADDR<20>          21: AUTOCONFIG/dtack           33: RESET_n 
-  9: ADDR<21>          22: AUTOCONFIG/ide_configured  34: RW 
- 10: ADDR<22>          23: AUTOCONFIG/shutup          35: UDS_n 
- 11: ADDR<23>          24: BERR_n                     36: ide_enable 
- 12: ADDR<2>           25: CFGIN_n                    37: ide_enable/ide_enable_CLKF 
- 13: ADDR<3>          
+  1: $OpTx$INV$24      14: ADDR<4>                    27: CFGOUT_n 
+  2: ADDR<15>          15: ADDR<5>                    28: IDE/S3_n 
+  3: ADDR<16>          16: ADDR<6>                    29: IDE/rom_bankSel<0> 
+  4: ADDR<17>          17: ADDR<7>                    30: IDE/rom_bankSel<1> 
+  5: ADDR<18>          18: ADDR<8>                    31: DBUS<15>.PIN 
+  6: ADDR<19>          19: AS_n                       32: DBUS<14>.PIN 
+  7: ADDR<1>           20: AS_n_S4                    33: DBUS<12>.PIN 
+  8: ADDR<20>          21: AUTOCONFIG/dtack           34: RESET 
+  9: ADDR<21>          22: AUTOCONFIG/ide_base<5>     35: RESET_n 
+ 10: ADDR<22>          23: AUTOCONFIG/ide_configured  36: RW 
+ 11: ADDR<23>          24: AUTOCONFIG/shutup          37: UDS_n 
+ 12: ADDR<2>           25: BERR_n                     38: ide_enable 
+ 13: ADDR<3>           26: CFGIN_n                    39: ide_enable/ide_enable_CLKF 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-IDE/as_delay<1>      ..................XX...........X....X... 4
-AUTOCONFIG/shutup    ..XXXXXXXXXXXXXXXXX.X.X.XX.....X.XX.X... 25
-DBUS<15>             ..XXXXXXXXXXXXXXXXX.....XX.....XXX..X... 23
-IDEBUF_OE            X.XXXX.XXXX.......XX...XXX......XX...... 16
-IDE/rom_bankSel<0>   XXX.......................XX.X.X.XXXX... 11
+RESET                ..................................X...X. 2
+IDE/as_delay<1>      ..................XX.............X....X. 4
+DBUS<15>             ..XXXXXXXXXXXXXXXXX......XX......XXX..X. 23
+IDEBUF_OE            X.XXXX.XXXX.......XX.X..XXX.......XX.... 17
+AUTOCONFIG/shutup    ..XXXXXXXXXXXXXXXXX.X..X.XX......X.XX.X. 25
 AUTOCONFIG/ide_base<7> 
-                     ..XXXXXXXXXXXXXXXXX.XX..XX..X..X.XX.X... 26
-AUTOCONFIG/ide_base<6> 
-                     ..XXXXXXXXXXXXXXXXX.XX..XX...X.X.XX.X... 26
+                     ..XXXXXXXXXXXXXXXXX.X.X..XX...X..X.XX.X. 26
 AUTOCONFIG/ide_base<4> 
-                     ..XXXXXXXXXXXXXXXXX.XX..XX....XX.XX.X... 26
+                     ..XXXXXXXXXXXXXXXXX.X.X..XX.....XX.XX.X. 26
 AUTOCONFIG/ide_base<3> 
-                     ..XXXXXXXXXXXXXXXXX.XX..XX..X..X.XX.X... 26
+                     ..XXXXXXXXXXXXXXXXX.X.X..XX...X..X.XX.X. 26
+IDE/rom_bankSel<1>   XXX.....X............X.....X.XX..X.XXXX. 13
 DTACK_n              ........................................ 0
-AUTOCONFIG/ide_base<2> 
-                     ..XXXXXXXXXXXXXXXXX.XX..XX...X.X.XX.X... 26
+IDE/rom_bankSel<0>   XXX.....X............X.....XX..X.X.XXXX. 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
+Number of function block inputs used/remaining:               31/23
+Number of signals used by logic mapping into function block:  31
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   /\5   0     FB3_1         (b)     (b)
-IDE/S3_n/IDE/S3_n_CLKF
-                      2       0   /\3   0     FB3_2   22    I/O     I
-IDE/S3_n              3       0     0   2     FB3_3   31    I/O     I
-ide_enable            3       0     0   2     FB3_4   32    I/O     I
-IDE/ide_enabled       3       0     0   2     FB3_5   24    I/O     I
-OVR_n_1               0       0     0   5     FB3_6   34    I/O     O
-IDE/rom_bankSel<1>    4       0   \/1   0     FB3_7         (b)     (b)
+IDE/ide_enabled      22      17<-   0   0     FB3_1         (b)     (b)
+(unused)              0       0   /\5   0     FB3_2   22    I/O     I
+(unused)              0       0   /\5   0     FB3_3   31    I/O     I
+(unused)              0       0   \/5   0     FB3_4   32    I/O     I
+$OpTx$INV$24         14       9<-   0   0     FB3_5   24    I/O     I
+OVR_n_1               0       0   /\4   1     FB3_6   34    I/O     O
+(unused)              0       0   \/5   0     FB3_7         (b)     (b)
 (unused)              0       0   \/5   0     FB3_8   25    I/O     I
-$OpTx$INV$89         16      11<-   0   0     FB3_9   27    I/O     I
-(unused)              0       0   /\5   0     FB3_10  39    I/O     I
+(unused)              0       0   \/5   0     FB3_9   27    I/O     I
+$OpTx$FX_DC$38       19      15<- \/1   0     FB3_10  39    I/O     I
 IDE_ROMEN            19      14<-   0   0     FB3_11  33    I/O     O
 (unused)              0       0   /\5   0     FB3_12  40    I/O     I
 (unused)              0       0   /\5   0     FB3_13        (b)     (b)
-OVR_n_2               0       0   /\4   1     FB3_14  35    I/O     O
+OVR_n_2               0       0   /\3   2     FB3_14  35    I/O     O
 ROM_BANK<1>           1       0     0   4     FB3_15  36    I/O     O
-CFGOUT_n              3       0   \/1   1     FB3_16  42    I/O     O
-(unused)              0       0   \/5   0     FB3_17  38    I/O     I
-$OpTx$FX_DC$102      19      14<-   0   0     FB3_18        (b)     (b)
+CFGOUT_n              3       0     0   2     FB3_16  42    I/O     O
+IDE/S3_n              3       0   \/2   0     FB3_17  38    I/O     I
+(unused)              0       0   \/5   0     FB3_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: $OpTx$INV$89      13: AS_n                       25: CFGOUT_n 
-  2: ADDR<12>          14: AUTOCONFIG/ide_base<1>     26: IDE/S3_n 
-  3: ADDR<13>          15: AUTOCONFIG/ide_base<2>     27: IDE/S3_n/IDE/S3_n_CLKF 
-  4: ADDR<15>          16: AUTOCONFIG/ide_base<3>     28: IDE/ide_enabled 
-  5: ADDR<16>          17: AUTOCONFIG/ide_base<4>     29: IDE/rom_bankSel<1> 
-  6: ADDR<17>          18: AUTOCONFIG/ide_base<5>     30: IDE_OFF_n 
-  7: ADDR<18>          19: AUTOCONFIG/ide_base<6>     31: DBUS<15>.PIN 
-  8: ADDR<19>          20: AUTOCONFIG/ide_base<7>     32: RESET 
-  9: ADDR<20>          21: AUTOCONFIG/ide_configured  33: RW 
- 10: ADDR<21>          22: AUTOCONFIG/shutup          34: UDS_n 
- 11: ADDR<22>          23: C1n                        35: ide_enable 
- 12: ADDR<23>          24: C3n                        36: ide_enable/ide_enable_CLKF 
+  1: ADDR<12>          12: AS_n                       22: CFGOUT_n 
+  2: ADDR<13>          13: AUTOCONFIG/ide_base<1>     23: IDE/S3_n 
+  3: ADDR<15>          14: AUTOCONFIG/ide_base<2>     24: IDE/S3_n/IDE/S3_n_CLKF 
+  4: ADDR<16>          15: AUTOCONFIG/ide_base<3>     25: IDE/ide_enabled 
+  5: ADDR<17>          16: AUTOCONFIG/ide_base<4>     26: IDE/rom_bankSel<1> 
+  6: ADDR<18>          17: AUTOCONFIG/ide_base<5>     27: RESET 
+  7: ADDR<19>          18: AUTOCONFIG/ide_base<6>     28: RW 
+  8: ADDR<20>          19: AUTOCONFIG/ide_base<7>     29: UDS_n 
+  9: ADDR<21>          20: AUTOCONFIG/ide_configured  30: ide_enable 
+ 10: ADDR<22>          21: AUTOCONFIG/shutup          31: ide_enable/ide_enable_CLKF 
+ 11: ADDR<23>         
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-IDE/S3_n/IDE/S3_n_CLKF 
-                     ......................XX................ 2
-IDE/S3_n             ............X.............X....X........ 3
-ide_enable           .............................X.X...X.... 3
-IDE/ide_enabled      X..XX....................X.X...XXXXX.... 10
+IDE/ide_enabled      ....XXXXXXX.XXXXXXXX.XX.X.XXXXX......... 23
+$OpTx$INV$24         ....XXXX.XX.XXXX.XXX.X.................. 14
 OVR_n_1              ........................................ 0
-IDE/rom_bankSel<1>   X..XX....................X..X.XXXXXX.... 11
-$OpTx$INV$89         .....XXXXXXX.XXXXXXXX...X............... 16
-IDE_ROMEN            .XX.XXXXXXXXXXXXXXXXX...X..X............ 21
+$OpTx$FX_DC$38       ..XXXXXXXXX.XXXXXXXX.X..X............... 19
+IDE_ROMEN            XX.XXXXXXXXXXXXXXXXX.X..X............... 21
 OVR_n_2              ........................................ 0
-ROM_BANK<1>          ...........................XX........... 2
-CFGOUT_n             ............X.......XX.........X........ 4
-$OpTx$FX_DC$102      ...XXXXXXXXX.XXXXXXXX...X..X............ 19
+ROM_BANK<1>          ........................XX.............. 2
+CFGOUT_n             ...........X.......XX.....X............. 4
+IDE/S3_n             ...........X...........X..X............. 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               37/17
-Number of signals used by logic mapping into function block:  37
+Number of function block inputs used/remaining:               39/15
+Number of signals used by logic mapping into function block:  39
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-RESET                 2       0     0   3     FB4_1         (b)     (b)
-SLAVE_n               2       0     0   3     FB4_2   43    I/O     O
+AUTOCONFIG/dtack      5       0     0   0     FB4_1         (b)     (b)
+SLAVE_n               3       0     0   2     FB4_2   43    I/O     O
 ROM_BANK<0>           2       0     0   3     FB4_3   46    I/O     O
 IDE2_CS_n<1>          1       0     0   4     FB4_4   47    I/O     O
 IOR_n                 1       0     0   4     FB4_5   44    I/O     O
 IDE1_CS_n<1>          1       0     0   4     FB4_6   49    I/O     O
-AUTOCONFIG/ide_configured
-                      3       0     0   2     FB4_7         (b)     (b)
+AS_n_S4               3       0     0   2     FB4_7         (b)     (b)
 IOW_n                 1       0     0   4     FB4_8   45    I/O     O
-AS_n_S4               3       0     0   2     FB4_9         (b)     (b)
+AUTOCONFIG/ide_base<6>
+                      4       0     0   1     FB4_9         (b)     (b)
 AUTOCONFIG/ide_base<5>
                       4       0     0   1     FB4_10  51    I/O     I
 IDE2_CS_n<0>          1       0   \/3   1     FB4_11  48    I/O     O
 DBUS<12>              8       3<-   0   0     FB4_12  52    I/O     I/O
-AUTOCONFIG/ide_base<1>
+AUTOCONFIG/ide_base<2>
                       4       0     0   1     FB4_13        (b)     (b)
 IDE1_CS_n<0>          1       0   \/2   2     FB4_14  50    I/O     O
 DBUS<13>              7       2<-   0   0     FB4_15  56    I/O     I/O
-AUTOCONFIG/dtack      5       0     0   0     FB4_16        (b)     (b)
+AUTOCONFIG/ide_base<1>
+                      4       0   \/1   0     FB4_16        (b)     (b)
 DBUS<14>              8       3<-   0   0     FB4_17  57    I/O     I/O
-(unused)              0       0   /\3   2     FB4_18        (b)     (b)
+AUTOCONFIG/ide_configured
+                      3       0   /\2   0     FB4_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: $OpTx$FX_DC$102   14: ADDR<23>                   26: CFGOUT_n 
-  2: $OpTx$INV$89      15: ADDR<2>                    27: IDE/S3_n 
-  3: ADDR<12>          16: ADDR<3>                    28: IDE/as_delay<1> 
-  4: ADDR<13>          17: ADDR<4>                    29: IDE/ide_enabled 
-  5: ADDR<14>          18: ADDR<5>                    30: IDE/rom_bankSel<0> 
-  6: ADDR<16>          19: ADDR<6>                    31: DBUS<13>.PIN 
-  7: ADDR<17>          20: ADDR<7>                    32: RESET 
-  8: ADDR<18>          21: ADDR<8>                    33: RESET_n 
-  9: ADDR<19>          22: AS_n                       34: RW 
- 10: ADDR<1>           23: AUTOCONFIG/dtack           35: UDS_n 
- 11: ADDR<20>          24: AUTOCONFIG/ide_configured  36: ide_enable 
- 12: ADDR<21>          25: CFGIN_n                    37: ide_enable/ide_enable_CLKF 
- 13: ADDR<22>         
+  1: $OpTx$FX_DC$38    14: ADDR<23>                   27: CFGOUT_n 
+  2: $OpTx$INV$24      15: ADDR<2>                    28: IDE/S3_n 
+  3: ADDR<12>          16: ADDR<3>                    29: IDE/as_delay<1> 
+  4: ADDR<13>          17: ADDR<4>                    30: IDE/ide_enabled 
+  5: ADDR<14>          18: ADDR<5>                    31: IDE/rom_bankSel<0> 
+  6: ADDR<16>          19: ADDR<6>                    32: DBUS<14>.PIN 
+  7: ADDR<17>          20: ADDR<7>                    33: DBUS<13>.PIN 
+  8: ADDR<18>          21: ADDR<8>                    34: RESET 
+  9: ADDR<19>          22: AS_n                       35: RESET_n 
+ 10: ADDR<1>           23: AUTOCONFIG/dtack           36: RW 
+ 11: ADDR<20>          24: AUTOCONFIG/ide_base<5>     37: UDS_n 
+ 12: ADDR<21>          25: AUTOCONFIG/ide_configured  38: ide_enable 
+ 13: ADDR<22>          26: CFGIN_n                    39: ide_enable/ide_enable_CLKF 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-RESET                ................................X...X... 2
-SLAVE_n              .X...XXXX.XXXX.......X..XX.............. 12
-ROM_BANK<0>          .....X......................XX.......... 3
+AUTOCONFIG/dtack     .....XXXX.XXXX.......XX..XX......X.XX.X. 16
+SLAVE_n              .X...XXXX.XXXX.......X.X.XX............. 13
+ROM_BANK<0>          .....X.......................XX......... 3
 IDE2_CS_n<1>         X.XXX................................... 4
-IOR_n                .....................X....X......X...... 3
+IOR_n                .....................X.....X.......X.... 3
 IDE1_CS_n<1>         X.XXX................................... 4
-AUTOCONFIG/ide_configured 
-                     .....XXXXXXXXXXXXXXXXXXXXX.....X.XX.X... 25
-IOW_n                .....................X....XX.....X...... 4
-AS_n_S4              .....................X....X....X....X... 4
+AS_n_S4              .....................X.....X.....X....X. 4
+IOW_n                .....................X.....XX......X.... 4
+AUTOCONFIG/ide_base<6> 
+                     .....XXXXXXXXXXXXXXXXXX.XXX....X.X.XX.X. 26
 AUTOCONFIG/ide_base<5> 
-                     .....XXXXXXXXXXXXXXXXXXXXX....XX.XX.X... 26
+                     .....XXXXXXXXXXXXXXXXXX.XXX.....XX.XX.X. 26
 IDE2_CS_n<0>         X.XXX................................... 4
-DBUS<12>             .....XXXXXXXXXXXXXXXXX..XX.....XXX.XX... 24
-AUTOCONFIG/ide_base<1> 
-                     .....XXXXXXXXXXXXXXXXXXXXX....XX.XX.X... 26
+DBUS<12>             .....XXXXXXXXXXXXXXXXX...XX......XXX.XX. 24
+AUTOCONFIG/ide_base<2> 
+                     .....XXXXXXXXXXXXXXXXXX.XXX....X.X.XX.X. 26
 IDE1_CS_n<0>         X.XXX................................... 4
-DBUS<13>             .....XXXXXXXXXXXXXXXXX..XX.....XXX..X... 23
-AUTOCONFIG/dtack     .....XXXX.XXXX.......XX.XX.....X.XX.X... 16
-DBUS<14>             .....XXXXXXXXXXXXXXXXX..XX.....XXX..X... 23
+DBUS<13>             .....XXXXXXXXXXXXXXXXX...XX......XXX..X. 23
+AUTOCONFIG/ide_base<1> 
+                     .....XXXXXXXXXXXXXXXXXX.XXX.....XX.XX.X. 26
+DBUS<14>             .....XXXXXXXXXXXXXXXXX...XX......XXX..X. 23
+AUTOCONFIG/ide_configured 
+                     .....XXXXXXXXXXXXXXXXXX.XXX......X.XX.X. 25
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *******************************  Equations  ********************************
 
 ********** Mapped Logic **********
 
-$OpTx$FX_DC$102 = ADDR<16>
-	# !IDE/ide_enabled
+$OpTx$FX_DC$38 = ADDR<16>
 	# !AUTOCONFIG/ide_configured
 	# ADDR<15>
 	# CFGOUT_n
-;Imported pterms FB3_1
-	# ADDR<17> & !AUTOCONFIG/ide_base<1>
-	# !ADDR<17> & AUTOCONFIG/ide_base<1>
-	# AUTOCONFIG/ide_base<6> & !ADDR<22>
-	# !AUTOCONFIG/ide_base<6> & ADDR<22>
-	# AUTOCONFIG/ide_base<7> & !ADDR<23>
-;Imported pterms FB3_2
+;Imported pterms FB3_9
+	# !IDE/ide_enabled
 	# ADDR<18> & !AUTOCONFIG/ide_base<2>
 	# !ADDR<18> & AUTOCONFIG/ide_base<2>
-	# AUTOCONFIG/ide_base<5> & !ADDR<21>
-;Imported pterms FB3_17
-	# ADDR<20> & !AUTOCONFIG/ide_base<4>
-	# !ADDR<20> & AUTOCONFIG/ide_base<4>
-	# AUTOCONFIG/ide_base<3> & !ADDR<19>
-	# !AUTOCONFIG/ide_base<3> & ADDR<19>
-	# !AUTOCONFIG/ide_base<7> & ADDR<23>
-;Imported pterms FB3_16
-	# !AUTOCONFIG/ide_base<5> & ADDR<21>;    
-
-$OpTx$INV$89 = !AUTOCONFIG/ide_configured
-	# CFGOUT_n
-	# ADDR<20> & !AUTOCONFIG/ide_base<4>
-	# !ADDR<20> & AUTOCONFIG/ide_base<4>
-	# !AUTOCONFIG/ide_base<3> & ADDR<19>
-;Imported pterms FB3_8
-	# AUTOCONFIG/ide_base<3> & !ADDR<19>
 	# AUTOCONFIG/ide_base<6> & !ADDR<22>
 	# !AUTOCONFIG/ide_base<6> & ADDR<22>
+;Imported pterms FB3_8
+	# ADDR<17> & !AUTOCONFIG/ide_base<1>
+	# !ADDR<17> & AUTOCONFIG/ide_base<1>
+	# !AUTOCONFIG/ide_base<3> & ADDR<19>
 	# AUTOCONFIG/ide_base<7> & !ADDR<23>
 	# !AUTOCONFIG/ide_base<7> & ADDR<23>
 ;Imported pterms FB3_7
-	# !ADDR<18> & AUTOCONFIG/ide_base<2>
-;Imported pterms FB3_10
-	# ADDR<18> & !AUTOCONFIG/ide_base<2>
-	# ADDR<17> & !AUTOCONFIG/ide_base<1>
-	# !ADDR<17> & AUTOCONFIG/ide_base<1>
+	# ADDR<20> & !AUTOCONFIG/ide_base<4>
+	# !ADDR<20> & AUTOCONFIG/ide_base<4>
+	# AUTOCONFIG/ide_base<3> & !ADDR<19>
 	# AUTOCONFIG/ide_base<5> & !ADDR<21>
 	# !AUTOCONFIG/ide_base<5> & ADDR<21>;    
 
+$OpTx$INV$24 = !AUTOCONFIG/ide_configured
+	# CFGOUT_n
+	# ADDR<18> & !AUTOCONFIG/ide_base<2>
+	# AUTOCONFIG/ide_base<6> & !ADDR<22>
+	# !AUTOCONFIG/ide_base<6> & ADDR<22>
+;Imported pterms FB3_4
+	# !ADDR<18> & AUTOCONFIG/ide_base<2>
+	# ADDR<17> & !AUTOCONFIG/ide_base<1>
+	# !ADDR<17> & AUTOCONFIG/ide_base<1>
+	# AUTOCONFIG/ide_base<7> & !ADDR<23>
+	# !AUTOCONFIG/ide_base<7> & ADDR<23>
+;Imported pterms FB3_6
+	# ADDR<20> & !AUTOCONFIG/ide_base<4>
+	# !ADDR<20> & AUTOCONFIG/ide_base<4>
+	# AUTOCONFIG/ide_base<3> & !ADDR<19>
+	# !AUTOCONFIG/ide_base<3> & ADDR<19>;    
+
 !AS_n_S4.D = !AS_n & !IDE/S3_n;
    AS_n_S4.CLK = ide_enable/ide_enable_CLKF;
    AS_n_S4.AP = !RESET;    
@@ -586,9 +582,10 @@ CFGOUT_n.D = !AUTOCONFIG/ide_configured & !AUTOCONFIG/shutup;
 
 !DBUS<14>.D = !ADDR<8> & !ADDR<7> & !ADDR<5> & !ADDR<2> & 
 	ADDR<1> & !ADDR<6> & !ADDR<3>
-;Imported pterms FB4_18
+;Imported pterms FB4_16
 	# !ADDR<8> & !ADDR<7> & !ADDR<5> & !ADDR<4> & 
 	!ADDR<2> & ADDR<6> & !ADDR<3>
+;Imported pterms FB4_18
 	# !ADDR<8> & !ADDR<7> & !ADDR<5> & !ADDR<4> & 
 	ADDR<1> & !ADDR<6> & !ADDR<3>
 	# !ADDR<8> & !ADDR<7> & !ADDR<5> & ADDR<4> & 
@@ -607,9 +604,9 @@ CFGOUT_n.D = !AUTOCONFIG/ide_configured & !AUTOCONFIG/shutup;
 ;Imported pterms FB2_2
 	# !ADDR<8> & !ADDR<7> & !ADDR<5> & !ADDR<4> & 
 	!ADDR<2> & ADDR<1> & !ADDR<3>
-;Imported pterms FB2_4
 	# !ADDR<8> & !ADDR<7> & ADDR<5> & !ADDR<4> & 
 	ADDR<2> & ADDR<1> & !ADDR<6> & ADDR<3>
+;Imported pterms FB2_4
 	# !ADDR<8> & !ADDR<7> & !ADDR<5> & ADDR<4> & 
 	ADDR<2> & ADDR<1> & !ADDR<6> & !ADDR<3>;
    DBUS<15>.CLK = ide_enable/ide_enable_CLKF;
@@ -635,44 +632,92 @@ IDE/S3_n/IDE/S3_n_CLKF = C1n
    IDE/as_delay<1>.CLK = ide_enable/ide_enable_CLKF;
    IDE/as_delay<1>.AP = !RESET;    
 
-IDE/ide_enabled.T = !ADDR<16> & !UDS_n & !RW & !IDE/ide_enabled & 
-	!IDE/S3_n & ide_enable & !ADDR<15> & !$OpTx$INV$89;
+!IDE/ide_enabled.D = RW & !IDE/ide_enabled
+	# !IDE/ide_enabled & !AUTOCONFIG/ide_configured
+	# !IDE/ide_enabled & CFGOUT_n
+;Imported pterms FB3_2
+	# ADDR<20> & !AUTOCONFIG/ide_base<4> & 
+	!IDE/ide_enabled
+	# !ADDR<20> & AUTOCONFIG/ide_base<4> & 
+	!IDE/ide_enabled
+	# ADDR<17> & !AUTOCONFIG/ide_base<1> & 
+	!IDE/ide_enabled
+	# AUTOCONFIG/ide_base<5> & !ADDR<21> & 
+	!IDE/ide_enabled
+	# !AUTOCONFIG/ide_base<5> & ADDR<21> & 
+	!IDE/ide_enabled
+;Imported pterms FB3_3
+	# !ADDR<18> & AUTOCONFIG/ide_base<2> & 
+	!IDE/ide_enabled
+	# AUTOCONFIG/ide_base<6> & !ADDR<22> & 
+	!IDE/ide_enabled
+	# !AUTOCONFIG/ide_base<6> & ADDR<22> & 
+	!IDE/ide_enabled
+	# AUTOCONFIG/ide_base<7> & !ADDR<23> & 
+	!IDE/ide_enabled
+	# !AUTOCONFIG/ide_base<7> & ADDR<23> & 
+	!IDE/ide_enabled
+;Imported pterms FB3_18
+	# UDS_n & !IDE/ide_enabled
+	# !IDE/ide_enabled & IDE/S3_n
+	# !IDE/ide_enabled & !ide_enable
+	# AUTOCONFIG/ide_base<3> & !ADDR<19> & 
+	!IDE/ide_enabled
+	# !AUTOCONFIG/ide_base<3> & ADDR<19> & 
+	!IDE/ide_enabled
+;Imported pterms FB3_17
+	# ADDR<18> & !AUTOCONFIG/ide_base<2> & 
+	!IDE/ide_enabled
+	# !ADDR<17> & AUTOCONFIG/ide_base<1> & 
+	!IDE/ide_enabled;
    IDE/ide_enabled.CLK = ide_enable/ide_enable_CLKF;
    IDE/ide_enabled.AR = !RESET;    
 
 IDE/rom_bankSel<0>.T = !ADDR<16> & !UDS_n & DBUS<14>.PIN & 
-	!IDE/rom_bankSel<0> & !RW & !IDE/S3_n & ide_enable & ADDR<15> & 
-	!$OpTx$INV$89
+	AUTOCONFIG/ide_base<5> & !IDE/rom_bankSel<0> & ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
+	# !ADDR<16> & !UDS_n & DBUS<14>.PIN & 
+	!AUTOCONFIG/ide_base<5> & !IDE/rom_bankSel<0> & !ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
 	# !ADDR<16> & !UDS_n & !DBUS<14>.PIN & 
-	IDE/rom_bankSel<0> & !RW & !IDE/S3_n & ide_enable & ADDR<15> & 
-	!$OpTx$INV$89;
+	AUTOCONFIG/ide_base<5> & IDE/rom_bankSel<0> & ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
+;Imported pterms FB2_10
+	# !ADDR<16> & !UDS_n & !DBUS<14>.PIN & 
+	!AUTOCONFIG/ide_base<5> & IDE/rom_bankSel<0> & !ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24;
    IDE/rom_bankSel<0>.CLK = ide_enable/ide_enable_CLKF;
    IDE/rom_bankSel<0>.AR = !RESET;    
 
 IDE/rom_bankSel<1>.T = !ADDR<16> & !UDS_n & DBUS<15>.PIN & 
-	!IDE/rom_bankSel<1> & !RW & !IDE/S3_n & ide_enable & ADDR<15> & 
-	!$OpTx$INV$89
+	AUTOCONFIG/ide_base<5> & !IDE/rom_bankSel<1> & ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
+	# !ADDR<16> & !UDS_n & DBUS<15>.PIN & 
+	!AUTOCONFIG/ide_base<5> & !IDE/rom_bankSel<1> & !ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
 	# !ADDR<16> & !UDS_n & !DBUS<15>.PIN & 
-	IDE/rom_bankSel<1> & !RW & !IDE/S3_n & ide_enable & ADDR<15> & 
-	!$OpTx$INV$89;
+	AUTOCONFIG/ide_base<5> & IDE/rom_bankSel<1> & ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24
+;Imported pterms FB2_8
+	# !ADDR<16> & !UDS_n & !DBUS<15>.PIN & 
+	!AUTOCONFIG/ide_base<5> & IDE/rom_bankSel<1> & !ADDR<21> & !RW & !IDE/S3_n & 
+	ide_enable & ADDR<15> & !$OpTx$INV$24;
    IDE/rom_bankSel<1>.CLK = ide_enable/ide_enable_CLKF;
    IDE/rom_bankSel<1>.AR = !RESET;    
 
-!IDE1_CS_n<0> = ADDR<12> & !ADDR<13> & !ADDR<14> & 
-	!$OpTx$FX_DC$102;    
+!IDE1_CS_n<0> = ADDR<12> & !ADDR<13> & !ADDR<14> & !$OpTx$FX_DC$38;    
 
-!IDE1_CS_n<1> = ADDR<12> & !ADDR<13> & ADDR<14> & 
-	!$OpTx$FX_DC$102;    
+!IDE1_CS_n<1> = ADDR<12> & !ADDR<13> & ADDR<14> & !$OpTx$FX_DC$38;    
 
-!IDE2_CS_n<0> = !ADDR<12> & ADDR<13> & !ADDR<14> & 
-	!$OpTx$FX_DC$102;    
+!IDE2_CS_n<0> = !ADDR<12> & ADDR<13> & !ADDR<14> & !$OpTx$FX_DC$38;    
 
-!IDE2_CS_n<1> = !ADDR<12> & ADDR<13> & ADDR<14> & 
-	!$OpTx$FX_DC$102;    
+!IDE2_CS_n<1> = !ADDR<12> & ADDR<13> & ADDR<14> & !$OpTx$FX_DC$38;    
 
 !IDEBUF_OE = !RW
-	# !AS_n & RESET_n & !AS_n_S4 & BERR_n & 
-	!$OpTx$INV$89
+	# AUTOCONFIG/ide_base<5> & ADDR<21> & !AS_n & 
+	RESET_n & !AS_n_S4 & BERR_n & !$OpTx$INV$24
+	# !AUTOCONFIG/ide_base<5> & !ADDR<21> & !AS_n & 
+	RESET_n & !AS_n_S4 & BERR_n & !$OpTx$INV$24
 	# !CFGIN_n & !ADDR<20> & !ADDR<18> & !ADDR<17> & 
 	!ADDR<16> & ADDR<23> & ADDR<22> & ADDR<21> & ADDR<19> & 
 	!AS_n & RESET_n & !AS_n_S4 & BERR_n & CFGOUT_n;    
@@ -682,21 +727,22 @@ IDE_ROMEN = AS_n
 	# CFGOUT_n
 	# AUTOCONFIG/ide_base<3> & !ADDR<19>
 	# !AUTOCONFIG/ide_base<3> & ADDR<19>
-;Imported pterms FB3_12
+;Imported pterms FB3_10
 	# ADDR<20> & !AUTOCONFIG/ide_base<4>
+;Imported pterms FB3_12
 	# !ADDR<20> & AUTOCONFIG/ide_base<4>
 	# ADDR<17> & !AUTOCONFIG/ide_base<1>
+	# !ADDR<17> & AUTOCONFIG/ide_base<1>
 	# AUTOCONFIG/ide_base<5> & !ADDR<21>
 	# !AUTOCONFIG/ide_base<5> & ADDR<21>
 ;Imported pterms FB3_13
 	# ADDR<18> & !AUTOCONFIG/ide_base<2>
 	# !ADDR<18> & AUTOCONFIG/ide_base<2>
-	# !ADDR<17> & AUTOCONFIG/ide_base<1>
 	# AUTOCONFIG/ide_base<6> & !ADDR<22>
 	# !AUTOCONFIG/ide_base<6> & ADDR<22>
+	# !AUTOCONFIG/ide_base<7> & ADDR<23>
 ;Imported pterms FB3_14
 	# AUTOCONFIG/ide_base<7> & !ADDR<23>
-	# !AUTOCONFIG/ide_base<7> & ADDR<23>
 	# !ADDR<16> & ADDR<12> & !ADDR<13> & 
 	IDE/ide_enabled
 	# !ADDR<16> & !ADDR<12> & ADDR<13> & 
@@ -720,7 +766,10 @@ ROM_BANK<0> = ADDR<16> & !IDE/ide_enabled
 
 ROM_BANK<1> = IDE/rom_bankSel<1> & IDE/ide_enabled;    
 
-!SLAVE_n = !AS_n & !$OpTx$INV$89
+!SLAVE_n = AUTOCONFIG/ide_base<5> & ADDR<21> & !AS_n & 
+	!$OpTx$INV$24
+	# !AUTOCONFIG/ide_base<5> & !ADDR<21> & !AS_n & 
+	!$OpTx$INV$24
 	# !CFGIN_n & !ADDR<20> & !ADDR<18> & !ADDR<17> & 
 	!ADDR<16> & ADDR<23> & ADDR<22> & ADDR<21> & ADDR<19> & 
 	!AS_n & CFGOUT_n;    
diff --git a/RTL/RIPPLE.tim b/RTL/RIPPLE.tim
index 0979d77..ead4308 100644
--- a/RTL/RIPPLE.tim
+++ b/RTL/RIPPLE.tim
@@ -5,12 +5,12 @@ Design:     RIPPLE
 Device:     XC9572XL-10-VQ64
 Speed File: Version 3.0
 Program:    Timing Report Generator:  version P.20131013
-Date:       Sat Mar  2 02:58:55 2024
+Date:       Thu Apr 18 04:18:38 2024
 
 Performance Summary:
 
-Pad to Pad (tPD)                          :         23.6ns (2 macrocell levels)
-Pad 'ADDR<18>' to Pad 'IDE1_CS_n<0>'                              
+Pad to Pad (tPD)                          :         24.0ns (2 macrocell levels)
+Pad 'ADDR<19>' to Pad 'IDE1_CS_n<0>'                              
 
 Clock net 'AS_n' path delays:
 
@@ -23,36 +23,36 @@ Clock Pad 'AS_n' to Output Pad 'IDE1_CS_n<0>'                     (Pterm Clock)
 
 Clock net 'C3n' path delays:
 
-Clock Pad to Output Pad (tCO)             :         39.2ns (4 macrocell levels)
+Clock Pad to Output Pad (tCO)             :         39.6ns (4 macrocell levels)
 Clock Pad 'C3n' to Output Pad 'IDE1_CS_n<0>'                      (Pterm Clock)
 
-Clock to Setup (tCYC)                     :         19.1ns (2 macrocell levels)
-Clock to Q, net 'AUTOCONFIG/ide_base<2>.Q' to TFF Setup(D) at 'IDE/rom_bankSel<0>.D'(Pterm Clock)
+Clock to Setup (tCYC)                     :         19.7ns (2 macrocell levels)
+Clock to Q, net 'AUTOCONFIG/ide_base<1>.Q' to TFF Setup(D) at 'IDE/rom_bankSel<0>.D'(Pterm Clock)
 Target FF drives output net 'IDE/rom_bankSel<0>'
 
-Setup to Clock at the Pad (tSU)           :          3.5ns (1 macrocell levels)
-Data signal 'ADDR<18>' to TFF D input Pin at 'IDE/rom_bankSel<0>.D'
+Setup to Clock at the Pad (tSU)           :          4.1ns (1 macrocell levels)
+Data signal 'ADDR<17>' to TFF D input Pin at 'IDE/rom_bankSel<0>.D'
 Clock pad 'C3n'                                                   (Pterm Clock)
 
-                          Minimum Clock Period: 19.1ns
-                     Maximum Internal Clock Speed: 52.3Mhz
+                          Minimum Clock Period: 19.7ns
+                     Maximum Internal Clock Speed: 50.7Mhz
                             (Limited by Cycle Time)
 
 Clock net 'C1n' path delays:
 
-Clock Pad to Output Pad (tCO)             :         39.2ns (4 macrocell levels)
+Clock Pad to Output Pad (tCO)             :         39.6ns (4 macrocell levels)
 Clock Pad 'C1n' to Output Pad 'IDE1_CS_n<0>'                      (Pterm Clock)
 
-Clock to Setup (tCYC)                     :         19.1ns (2 macrocell levels)
-Clock to Q, net 'AUTOCONFIG/ide_base<2>.Q' to TFF Setup(D) at 'IDE/rom_bankSel<0>.D'(Pterm Clock)
+Clock to Setup (tCYC)                     :         19.7ns (2 macrocell levels)
+Clock to Q, net 'AUTOCONFIG/ide_base<1>.Q' to TFF Setup(D) at 'IDE/rom_bankSel<0>.D'(Pterm Clock)
 Target FF drives output net 'IDE/rom_bankSel<0>'
 
-Setup to Clock at the Pad (tSU)           :          3.5ns (1 macrocell levels)
-Data signal 'ADDR<18>' to TFF D input Pin at 'IDE/rom_bankSel<0>.D'
+Setup to Clock at the Pad (tSU)           :          4.1ns (1 macrocell levels)
+Data signal 'ADDR<17>' to TFF D input Pin at 'IDE/rom_bankSel<0>.D'
 Clock pad 'C1n'                                                   (Pterm Clock)
 
-                          Minimum Clock Period: 19.1ns
-                     Maximum Internal Clock Speed: 52.3Mhz
+                          Minimum Clock Period: 19.7ns
+                     Maximum Internal Clock Speed: 50.7Mhz
                             (Limited by Cycle Time)
 
 --------------------------------------------------------------------------------
@@ -76,16 +76,16 @@ DBUS<12>                              11.0  11.0  11.0  11.0  11.0  11.0  11.0
 DBUS<13>                              11.0  11.0  11.0  11.0  11.0  11.0  11.0
 DBUS<14>                              11.0  11.0  11.0  11.0  11.0  11.0  11.0
 DBUS<15>                              11.0  11.0  11.0  11.0  11.0  11.0  11.0
-IDE1_CS_n<0>  14.5  14.5  14.5  22.2  22.2  23.2  23.6  23.2  23.2  23.6  23.2
-IDE1_CS_n<1>  14.5  14.5  14.5  22.2  22.2  23.2  23.6  23.2  23.2  23.6  23.2
-IDE2_CS_n<0>  14.5  14.5  14.5  22.2  22.2  23.2  23.6  23.2  23.2  23.6  23.2
-IDE2_CS_n<1>  14.5  14.5  14.5  22.2  22.2  23.2  23.6  23.2  23.2  23.6  23.2
-IDEBUF_OE                             14.5  23.2  23.6  23.2  22.2  23.2  23.2
-IDE_ROMEN     16.3  16.3              16.3  15.9  15.9  14.5  15.5  15.5  15.9
+IDE1_CS_n<0>  14.5  14.5  14.5  22.2  22.2  23.6  23.2  24.0  24.0  24.0  23.2
+IDE1_CS_n<1>  14.5  14.5  14.5  22.2  22.2  23.6  23.2  24.0  24.0  24.0  23.2
+IDE2_CS_n<0>  14.5  14.5  14.5  22.2  22.2  23.6  23.2  24.0  24.0  24.0  23.2
+IDE2_CS_n<1>  14.5  14.5  14.5  22.2  22.2  23.6  23.2  24.0  24.0  24.0  23.2
+IDEBUF_OE                             14.5  23.2  23.2  23.2  23.2  14.5  22.2
+IDE_ROMEN     16.3  16.3              16.3  15.5  15.9  14.5  15.5  15.5  15.9
 IOR_n                                                                         
 IOW_n                                                                         
 ROM_BANK<0>                           14.5                                    
-SLAVE_n                               14.5  23.2  23.6  23.2  22.2  23.2  23.2
+SLAVE_n                               14.5  23.2  23.2  23.2  23.2  14.5  22.2
 
 --------------------------------------------------------------------------------
                             Pad to Pad (tPD) (nsec)
@@ -108,10 +108,10 @@ DBUS<12>      11.0              11.0  11.0  11.0
 DBUS<13>      11.0              11.0  11.0  11.0
 DBUS<14>      11.0              11.0  11.0  11.0
 DBUS<15>      11.0              11.0  11.0  11.0
-IDE1_CS_n<0>  23.2                              
-IDE1_CS_n<1>  23.2                              
-IDE2_CS_n<0>  23.2                              
-IDE2_CS_n<1>  23.2                              
+IDE1_CS_n<0>  23.6                              
+IDE1_CS_n<1>  23.6                              
+IDE2_CS_n<0>  23.6                              
+IDE2_CS_n<1>  23.6                              
 IDEBUF_OE     23.2  14.5  14.5  14.5  14.5  14.5
 IDE_ROMEN     16.3  14.5                        
 IOR_n               14.5                    14.5
@@ -141,17 +141,17 @@ DBUS<12>      18.9  22.4  22.4
 DBUS<13>      18.9  22.4  22.4
 DBUS<14>      18.9  22.4  22.4
 DBUS<15>      18.9  22.4  22.4
-IDE1_CS_n<0>  30.1  39.2  39.2
-IDE1_CS_n<1>  30.1  39.2  39.2
-IDE2_CS_n<0>  30.1  39.2  39.2
-IDE2_CS_n<1>  30.1  39.2  39.2
-IDEBUF_OE     30.1  39.2  39.2
+IDE1_CS_n<0>  30.1  39.6  39.6
+IDE1_CS_n<1>  30.1  39.6  39.6
+IDE2_CS_n<0>  30.1  39.6  39.6
+IDE2_CS_n<1>  30.1  39.6  39.6
+IDEBUF_OE     30.1  38.8  38.8
 IDE_ROMEN     22.4  31.9  31.9
 IOR_n               30.1  30.1
 IOW_n               30.1  30.1
 ROM_BANK<0>         30.1  30.1
 ROM_BANK<1>         30.1  30.1
-SLAVE_n       30.1  39.2  39.2
+SLAVE_n       30.1  38.8  38.8
 
 --------------------------------------------------------------------------------
                    Setup to Clock at Pad (tSU or tSUF) (nsec)
@@ -167,16 +167,16 @@ SLAVE_n       30.1  39.2  39.2
         \            
   To     \------------
 
-ADDR<15>   -5.6  -5.6
-ADDR<16>   -5.6  -5.6
-ADDR<17>    3.1   3.1
-ADDR<18>    3.5   3.5
-ADDR<19>    3.1   3.1
+ADDR<15>   -4.6  -4.6
+ADDR<16>   -4.6  -4.6
+ADDR<17>    4.1   4.1
+ADDR<18>    4.1   4.1
+ADDR<19>    4.1   4.1
 ADDR<1>    -4.6  -4.6
-ADDR<20>    2.1   2.1
-ADDR<21>    3.1   3.1
+ADDR<20>    4.1   4.1
+ADDR<21>   -4.6  -4.6
 ADDR<22>    3.1   3.1
-ADDR<23>    3.1   3.1
+ADDR<23>    4.1   4.1
 ADDR<2>    -4.6  -4.6
 ADDR<3>    -4.6  -4.6
 ADDR<4>    -4.6  -4.6
@@ -188,12 +188,12 @@ AS_n       -5.6  -5.6
 CFGIN_n    -5.6  -5.6
 DBUS<12>   -5.6  -5.6
 DBUS<13>   -5.6  -5.6
-DBUS<14>   -5.6  -5.6
-DBUS<15>   -5.6  -5.6
+DBUS<14>   -4.6  -4.6
+DBUS<15>   -4.6  -4.6
 IDE_OFF_n  -5.6  -5.6
 RESET_n    -5.6  -5.6
-RW         -5.6  -5.6
-UDS_n      -5.6  -5.6
+RW         -4.6  -4.6
+UDS_n      -4.6  -4.6
 
 --------------------------------------------------------------------------------
                           Clock to Setup (tCYC) (nsec)
@@ -242,9 +242,9 @@ AUTOCONFIG/ide_configured.CE        10.0
 AUTOCONFIG/shutup.CE                10.0                                    
 DBUS<12>.D                                                                  
 IDE/as_delay<1>.D             10.0                                          
-IDE/ide_enabled.D                         18.7  19.1  18.7  17.7  18.7  18.7
-IDE/rom_bankSel<0>.D                      18.7  19.1  18.7  17.7  18.7  18.7
-IDE/rom_bankSel<1>.D                      18.7  19.1  18.7  17.7  18.7  18.7
+IDE/ide_enabled.D                         11.4  11.4  11.0  11.0  11.0  11.4
+IDE/rom_bankSel<0>.D                      19.7  19.7  19.7  19.7  11.0  18.7
+IDE/rom_bankSel<1>.D                      19.7  19.7  19.7  19.7  11.0  18.7
 ide_enable.CE                                                               
 
 --------------------------------------------------------------------------------
@@ -294,9 +294,9 @@ AUTOCONFIG/ide_configured.CE        10.0
 AUTOCONFIG/shutup.CE                      10.0                              
 DBUS<12>.D                                                                  
 IDE/as_delay<1>.D                                                           
-IDE/ide_enabled.D             18.7  17.7        10.0  10.0                  
-IDE/rom_bankSel<0>.D          18.7  17.7        10.0        10.0            
-IDE/rom_bankSel<1>.D          18.7  17.7        10.0              10.0      
+IDE/ide_enabled.D             11.4  10.0        11.0  11.4                  
+IDE/rom_bankSel<0>.D          19.7  18.7        11.0        11.0            
+IDE/rom_bankSel<1>.D          19.7  18.7        11.0              11.0      
 ide_enable.CE                                                           10.0
 
 --------------------------------------------------------------------------------
@@ -346,9 +346,9 @@ AUTOCONFIG/ide_configured.CE
 AUTOCONFIG/shutup.CE              
 DBUS<12>.D                    10.0
 IDE/as_delay<1>.D                 
-IDE/ide_enabled.D             10.0
-IDE/rom_bankSel<0>.D          10.0
-IDE/rom_bankSel<1>.D          10.0
+IDE/ide_enabled.D             11.0
+IDE/rom_bankSel<0>.D          11.0
+IDE/rom_bankSel<1>.D          11.0
 ide_enable.CE                     
 
 --------------------------------------------------------------------------------
@@ -398,9 +398,9 @@ AUTOCONFIG/ide_configured.CE        10.0
 AUTOCONFIG/shutup.CE                10.0                                    
 DBUS<12>.D                                                                  
 IDE/as_delay<1>.D             10.0                                          
-IDE/ide_enabled.D                         18.7  19.1  18.7  17.7  18.7  18.7
-IDE/rom_bankSel<0>.D                      18.7  19.1  18.7  17.7  18.7  18.7
-IDE/rom_bankSel<1>.D                      18.7  19.1  18.7  17.7  18.7  18.7
+IDE/ide_enabled.D                         11.4  11.4  11.0  11.0  11.0  11.4
+IDE/rom_bankSel<0>.D                      19.7  19.7  19.7  19.7  11.0  18.7
+IDE/rom_bankSel<1>.D                      19.7  19.7  19.7  19.7  11.0  18.7
 ide_enable.CE                                                               
 
 --------------------------------------------------------------------------------
@@ -450,9 +450,9 @@ AUTOCONFIG/ide_configured.CE        10.0
 AUTOCONFIG/shutup.CE                      10.0                              
 DBUS<12>.D                                                                  
 IDE/as_delay<1>.D                                                           
-IDE/ide_enabled.D             18.7  17.7        10.0  10.0                  
-IDE/rom_bankSel<0>.D          18.7  17.7        10.0        10.0            
-IDE/rom_bankSel<1>.D          18.7  17.7        10.0              10.0      
+IDE/ide_enabled.D             11.4  10.0        11.0  11.4                  
+IDE/rom_bankSel<0>.D          19.7  18.7        11.0        11.0            
+IDE/rom_bankSel<1>.D          19.7  18.7        11.0              11.0      
 ide_enable.CE                                                           10.0
 
 --------------------------------------------------------------------------------
@@ -502,9 +502,9 @@ AUTOCONFIG/ide_configured.CE
 AUTOCONFIG/shutup.CE              
 DBUS<12>.D                    10.0
 IDE/as_delay<1>.D                 
-IDE/ide_enabled.D             10.0
-IDE/rom_bankSel<0>.D          10.0
-IDE/rom_bankSel<1>.D          10.0
+IDE/ide_enabled.D             11.0
+IDE/rom_bankSel<0>.D          11.0
+IDE/rom_bankSel<1>.D          11.0
 ide_enable.CE                     
 
 Path Type Definition: