LIV2/CIDER
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Matt Harlum 175e8119a6 CFLASH: fixup usage text
2023-02-23 11:11:56 +00:00
.github/workflows
GH Actions: Package software inside LHA & ADF
2023-02-21 17:16:52 +00:00
Binary
RTL: Latch ranger_enable on reset
2023-02-19 21:59:04 +00:00
Docs
PCB: Fix drill/component grid & U10 missing from bom
2023-02-09 15:57:40 +01:00
Gerbers
PCB: Fix drill/component grid & U10 missing from bom
2023-02-09 15:57:40 +01:00
Kicad
GH Actions: Generate kicad outputs
2023-02-21 14:13:52 +00:00
RTL
RTL: Latch ranger_enable on reset
2023-02-19 21:59:04 +00:00
Software
CFLASH: fixup usage text
2023-02-23 11:11:56 +00:00
.gitignore
Begin PCB design
2023-01-22 14:34:16 +01:00
LICENSE.md
Add License
2023-01-30 22:00:06 +01:00
README.md
PCB: Add 22 Ohm series resistors for SDRAM
2023-01-30 21:49:50 +01:00

README.md

CDTV IDE + RAM

PCB

Description
No description provided
Readme 40 MiB
Languages
Verilog 90.4%
Makefile 9.2%
SystemVerilog 0.4%