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RTL: Add DBLT

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This commit is contained in:
Stefan Reinauer 2025-05-07 00:04:05 +08:00
parent 0f8fdc2de6
commit 9584898714
1 changed files with 7 additions and 1 deletions
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RTL/top.v
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@ -133,7 +133,8 @@ wire ABOEL_n_int;
wire ABOEH_n_int;
wire D2Z_n_int;
wire Z2D_n_int;
// dblt
wire DBLT_int;
always @(posedge CLK or negedge IORST_n)
begin
@ -282,6 +283,11 @@ assign ABOEH_n = ABOEH_n_int;
assign D2Z_n = D2Z_n_int;
assign Z2D_n = Z2D_n_int;
assign DBLT_int = !BMASTER && !MASTER && configured && !READ && !slave_cycle && !FCS_n_sync[1] && !LOCK;
assign DBLT = DBLT_int;
intreg_access INTREG_ACCESS (
.CLK(CLK),
.RESET_n(IORST_n),